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From: Zong Li <zong.li@sifive.com>
To: Conor Dooley <Conor.Dooley@microchip.com>
Cc: Rob Herring <robh+dt@kernel.org>,
	krzysztof.kozlowski+dt@linaro.org,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Greentime Hu <greentime.hu@sifive.com>,
	"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
	<devicetree@vger.kernel.org>,
	linux-riscv <linux-riscv@lists.infradead.org>,
	"linux-kernel@vger.kernel.org List"
	<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 1/3] dt-bindings: sifive-ccache: rename SiFive L2 cache to composible cache
Date: Mon, 29 Aug 2022 15:38:38 +0800	[thread overview]
Message-ID: <CANXhq0qECPDehan6U4-R166EkZww5VMFntDToOkYjsOiELPi9A@mail.gmail.com> (raw)
In-Reply-To: <d009d829-54d5-7b96-cfbb-3f75515a29fe@microchip.com>

On Mon, Aug 29, 2022 at 2:45 PM <Conor.Dooley@microchip.com> wrote:
>
> Hey Zong,
> Couple quick comments for you:
>
> On 29/08/2022 07:22, Zong Li wrote:
> > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> >
> > Since composible cache may be L3 cache if private L2 cache exists, it
>
> s/composible/composable
>
> > should use its original name composible cache to prevent confusion.
>
> s/composible/composable
>

I will fix it in each patch.

> >
> > Signed-off-by: Greentime Hu <greentime.hu@sifive.com>
> > Signed-off-by: Zong Li <zong.li@sifive.com>
> > ---
> >   .../riscv/{sifive-l2-cache.yaml => sifive-ccache.yaml}      | 6 ++++--
> >   1 file changed, 4 insertions(+), 2 deletions(-)
> >   rename Documentation/devicetree/bindings/riscv/{sifive-l2-cache.yaml => sifive-ccache.yaml} (92%)
> >
> > diff --git a/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml b/Documentation/devicetree/bindings/riscv/sifive-ccache.yaml
> > similarity index 92%
> > rename from Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml
> > rename to Documentation/devicetree/bindings/riscv/sifive-ccache.yaml
> > index 69cdab18d629..1a64a5384e36 100644
> > --- a/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml
> > +++ b/Documentation/devicetree/bindings/riscv/sifive-ccache.yaml
>
> Binding filenames are supposed to match the first compatible. Since
> it was not named that way in the first place, I suppose naming after
> the generic compatible makes the most sense. The correct filename
> would then be "sifive,ccache0.yaml"
>

Thanks for pointing this out. Let me change the filename.

> > @@ -12,8 +12,8 @@ maintainers:
> >     - Paul Walmsley  <paul.walmsley@sifive.com>
> >
> >   description:
> > -  The SiFive Level 2 Cache Controller is used to provide access to fast copies
> > -  of memory for masters in a Core Complex. The Level 2 Cache Controller also
> > +  The SiFive Composable Cache Controller is used to provide access to fast copies
> > +  of memory for masters in a Core Complex. The Composable Cache Controller also
> >     acts as directory-based coherency manager.
> >     All the properties in ePAPR/DeviceTree specification applies for this platform.
> >
> > @@ -27,6 +27,7 @@ select:
> >           enum:
> >             - sifive,fu540-c000-ccache
> >             - sifive,fu740-c000-ccache
> > +          - sifive,ccache0
>
> Despite what the commit message says, this is more than a rename.
> Thanks,
> Conor.
>
> >
> >     required:
> >       - compatible
> > @@ -37,6 +38,7 @@ properties:
> >         - enum:
> >             - sifive,fu540-c000-ccache
> >             - sifive,fu740-c000-ccache
> > +          - sifive,ccache0
> >         - const: cache
> >
> >     cache-block-size:
> > --
> > 2.17.1
> >
>

  reply	other threads:[~2022-08-29  7:38 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-08-29  6:21 [PATCH 0/3] Rename sifive L2 cache to sifive CCACHE Zong Li
2022-08-29  6:22 ` [PATCH 1/3] dt-bindings: sifive-ccache: rename SiFive L2 cache to composible cache Zong Li
2022-08-29  6:45   ` Conor.Dooley
2022-08-29  7:38     ` Zong Li [this message]
2022-08-29 18:42   ` Rob Herring
2022-08-30  2:57     ` Zong Li
2022-10-07  2:58   ` Palmer Dabbelt
2022-10-07  3:51     ` Zong Li
2022-08-29  6:22 ` [PATCH 2/3] soc: sifive: l2 cache: Rename " Zong Li
2022-08-29  7:05   ` Conor.Dooley
2022-08-29  8:40     ` Zong Li
2022-08-30  8:41       ` Conor.Dooley
2022-08-31  5:31         ` Zong Li
2022-08-30  8:18   ` Ben Dooks
2022-08-29  6:22 ` [PATCH 3/3] EDAC/sifive: use sifive_ccache instead of sifive_l2 Zong Li
2022-10-07  2:58   ` Palmer Dabbelt
2022-08-30  7:59 ` [PATCH 0/3] Rename sifive L2 cache to sifive CCACHE Ben Dooks
2022-08-31  8:23   ` Zong Li
2022-08-30 12:51 ` [RESEND PATCH] dt-bindings: sifive-ccache: fix cache level for l3 cache Ben Dooks
2022-08-30 12:56   ` Conor.Dooley
2022-08-30 12:58     ` Ben Dooks
2022-08-30 13:49       ` Conor.Dooley
2022-08-30 16:49         ` Ben Dooks
2022-08-30 17:08           ` Conor.Dooley
2022-08-31  5:17             ` Zong Li
2022-08-31  6:25               ` Conor.Dooley
2022-09-02 19:36   ` Rob Herring

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