From: Tomi Valkeinen <tomi.valkeinen@ti.com>
To: Yuti Amonkar <yamonkar@cadence.com>,
<linux-kernel@vger.kernel.org>, <dri-devel@lists.freedesktop.org>,
<devicetree@vger.kernel.org>, <robh+dt@kernel.org>,
<maxime@cerno.tech>, <airlied@linux.ie>, <daniel@ffwll.ch>,
<mark.rutland@arm.com>, <a.hajda@samsung.com>,
<narmstrong@baylibre.com>, <Laurent.pinchart@ideasonboard.com>,
<jonas@kwiboo.se>, <jernej.skrabec@siol.net>
Cc: <praneeth@ti.com>, <jsarha@ti.com>, <mparab@cadence.com>,
<sjakhade@cadence.com>
Subject: Re: [PATCH v5 1/3] dt-bindings: drm/bridge: Document Cadence MHDP bridge bindings.
Date: Thu, 13 Feb 2020 11:16:51 +0200 [thread overview]
Message-ID: <b97283b0-e4a5-4b96-e509-b9b5cdd78991@ti.com> (raw)
In-Reply-To: <1581481604-24499-2-git-send-email-yamonkar@cadence.com>
On 12/02/2020 06:26, Yuti Amonkar wrote:
> Document the bindings used for the Cadence MHDP DPI/DP bridge in
> yaml format.
>
> Signed-off-by: Yuti Amonkar <yamonkar@cadence.com>
> Reviewed-by: Rob Herring <robh@kernel.org>
> ---
> .../bindings/display/bridge/cdns,mhdp.yaml | 125 ++++++++++++++++++
> 1 file changed, 125 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/display/bridge/cdns,mhdp.yaml
>
> diff --git a/Documentation/devicetree/bindings/display/bridge/cdns,mhdp.yaml b/Documentation/devicetree/bindings/display/bridge/cdns,mhdp.yaml
> new file mode 100644
> index 000000000000..e7f84ed1d2da
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/display/bridge/cdns,mhdp.yaml
> @@ -0,0 +1,125 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: "http://devicetree.org/schemas/display/bridge/cdns,mhdp.yaml#"
> +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
> +
> +title: Cadence MHDP bridge
> +
> +maintainers:
> + - Swapnil Jakhade <sjakhade@cadence.com>
> + - Yuti Amonkar <yamonkar@cadence.com>
> +
> +properties:
> + compatible:
> + enum:
> + - cdns,mhdp8546
> + - ti,j721e-mhdp8546
> +
> + reg:
> + minItems: 1
> + maxItems: 2
> + items:
> + - description:
> + Register block of mhdptx apb registers upto PHY mapped area(AUX_CONFIG_P).
"up to". Add space before (.
> + The AUX and PMA registers are mapped to associated phy driver.
> + - description:
> + Register block for DSS_EDP0_INTG_CFG_VP registers in case of TI J7 SoCs.
> +
> + reg-names:
> + minItems: 1
> + maxItems: 2
> + items:
> + - const: mhdptx
> + - const: j721e-intg
> +
> + clocks:
> + maxItems: 1
> + description:
> + DP bridge clock, it's used by the IP to know how to translate a number of
> + clock cycles into a time (which is used to comply with DP standard timings
> + and delays).
> +
> + phys:
> + description: Phandle to the DisplyPort phy.
"Display"
Tomi
--
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
next prev parent reply other threads:[~2020-02-13 9:17 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-12 4:26 [PATCH v5 0/3] drm: Add support for Cadence MHDP DPI/DP bridge and J721E wrapper Yuti Amonkar
2020-02-12 4:26 ` [PATCH v5 1/3] dt-bindings: drm/bridge: Document Cadence MHDP bridge bindings Yuti Amonkar
2020-02-13 9:16 ` Tomi Valkeinen [this message]
2020-02-16 15:28 ` Laurent Pinchart
2020-02-16 15:31 ` Laurent Pinchart
2020-02-16 15:33 ` Laurent Pinchart
2020-02-12 4:26 ` [PATCH v5 2/3] drm: bridge: Add support for Cadence MHDP DPI/DP bridge Yuti Amonkar
2020-02-13 9:19 ` Tomi Valkeinen
2020-02-12 4:26 ` [PATCH v5 3/3] drm: bridge: cdns-mhdp: add j721e wrapper Yuti Amonkar
2020-02-13 10:29 ` Tomi Valkeinen
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