Re: [PATCH v7 06/12] dmaengine: ti: Add cppi5 header for K3 NAVSS/UDMA

From: Peter Ujfalusi <peter.ujfalusi@ti.com>
To: Vinod Koul <vkoul@kernel.org>
Cc: <robh+dt@kernel.org>, <nm@ti.com>, <ssantosh@kernel.org>,
	<dan.j.williams@intel.com>, <dmaengine@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<grygorii.strashko@ti.com>, <lokeshvutla@ti.com>,
	<t-kristo@ti.com>, <tony@atomide.com>, <j-keerthy@ti.com>,
	<vigneshr@ti.com>
Subject: Re: [PATCH v7 06/12] dmaengine: ti: Add cppi5 header for K3 NAVSS/UDMA
Date: Mon, 23 Dec 2019 09:11:17 +0200	[thread overview]
Message-ID: <dc251d90-2e1f-ae3e-2a29-4191e8eefb7a@ti.com> (raw)
In-Reply-To: <d5bd6bcf-9c1e-8633-fdc4-ee787100b44c@ti.com>

Hi Vinod,

On 20/12/2019 12.42, Peter Ujfalusi wrote:
> Hi Vinod,
> 
> On 20/12/2019 11.54, Vinod Koul wrote:
>> On 09-12-19, 11:43, Peter Ujfalusi wrote:
>>
>>> +#define CPPI5_INFO2_DESC_RETPUSHPOLICY		BIT(16)
>>> +#define CPPI5_INFO2_DESC_RETP_MASK		GENMASK(18, 16)
>>> +
>>> +#define CPPI5_INFO2_DESC_RETQ_SHIFT		(0)
>>> +#define CPPI5_INFO2_DESC_RETQ_MASK		GENMASK(15, 0)
>>> +
>>> +#define CPPI5_INFO3_DESC_SRCTAG_SHIFT		(16U)
>>> +#define CPPI5_INFO3_DESC_SRCTAG_MASK		GENMASK(31, 16)
>>> +#define CPPI5_INFO3_DESC_DSTTAG_SHIFT		(0)
>>> +#define CPPI5_INFO3_DESC_DSTTAG_MASK		GENMASK(15, 0)
>>> +
>>> +#define CPPI5_BUFINFO1_HDESC_DATA_LEN_SHIFT	(0)
>>> +#define CPPI5_BUFINFO1_HDESC_DATA_LEN_MASK	GENMASK(27, 0)
>>> +
>>> +#define CPPI5_OBUFINFO0_HDESC_BUF_LEN_SHIFT	(0)
>>> +#define CPPI5_OBUFINFO0_HDESC_BUF_LEN_MASK	GENMASK(27, 0)
>>
>> I think you can remove the SHIFT defines and use ffs() to get the bit
>> position for shift
> 
> Right. I'll convert to use ffs()

I rather keep the defines.
While ffs() is simple, it is going to have effect in speeds gigabit or
beyond.

>>> +static inline u32 cppi5_hdesc_calc_size(bool epib, u32 psdata_size,
>>> +					u32 sw_data_size)
>>> +{
>>> +	u32 desc_size;
>>> +
>>> +	if (psdata_size > CPPI5_INFO0_HDESC_PSDATA_MAX_SIZE)
>>> +		return 0;
>>> +
>>> +	desc_size = sizeof(struct cppi5_host_desc_t) + psdata_size +
>>> +		    sw_data_size;
>>
>> I think there was an API for this kind of mem allocation of struct and
>> buffer attached...
> 
> The returned size is not only used when allocating memory or setting up
> the dma_pool, but for UDMAP's fetch size parameter.
> 
>>> +static inline void cppi5_hdesc_reset_hbdesc(struct cppi5_host_desc_t *desc)
>>> +{
>>> +	desc->hdr = (struct cppi5_desc_hdr_t) { 0 };
>>> +	desc->next_desc = 0;
>>
>> would this not be superfluous? Or if you want a memset call?
> 
> The intention is to reset the header and the next descriptor link but
> leave the backing buffer information intact. This allows the reuse of a
> descriptor+buffer and we only need to set the header bits + next
> descriptor pointer if any.
> 
>>> +static inline u32 *cppi5_hdesc_get_psdata32(struct cppi5_host_desc_t *desc)
>>> +{
>>> +	return (u32 *)cppi5_hdesc_get_psdata(desc);
>>
>> you dont need casts away from void *
> 
> Hrm, or just remove this, clients can use the cppi5_hdesc_get_psdata()
> directly.
> 
> 
> - Péter
> 
> Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
> Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
> 

- Péter

Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki