From: Sekhar Nori <nsekhar@ti.com>
To: David Lechner <david@lechnology.com>,
linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Cc: Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@codeaurora.org>,
Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Kevin Hilman <khilman@kernel.org>, Adam Ford <aford173@gmail.com>,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v5 10/44] clk: davinci: New driver for davinci PSC clocks
Date: Tue, 16 Jan 2018 16:33:32 +0530 [thread overview]
Message-ID: <e0a9af55-a8b1-c359-fe88-d038648e02f1@ti.com> (raw)
In-Reply-To: <1515377863-20358-11-git-send-email-david@lechnology.com>
On Monday 08 January 2018 07:47 AM, David Lechner wrote:
> This adds a new driver for mach-davinci PSC clocks. This is porting the
> code from arch/arm/mach-davinci/psc.c to the common clock framework and
> is converting it to use regmap to simplify the code. Additionally, it adds
> device tree support for these clocks.
>
> Note: although there are similar clocks for TI Keystone we are not able
> to share the code for a few reasons. The keystone clocks are device tree
> only and use legacy one-node-per-clock bindings. Also the keystone driver
> makes the assumption that there is only one PSC per SoC and uses global
> variables, but here we have two controllers per SoC.
>
> Signed-off-by: David Lechner <david@lechnology.com>
> ---
> drivers/clk/davinci/Makefile | 2 +
> drivers/clk/davinci/psc.c | 282 +++++++++++++++++++++++++++++++++++++++++++
> drivers/clk/davinci/psc.h | 49 ++++++++
> 3 files changed, 333 insertions(+)
> create mode 100644 drivers/clk/davinci/psc.c
> create mode 100644 drivers/clk/davinci/psc.h
>
> diff --git a/drivers/clk/davinci/Makefile b/drivers/clk/davinci/Makefile
> index d471386..cd1bf2c 100644
> --- a/drivers/clk/davinci/Makefile
> +++ b/drivers/clk/davinci/Makefile
> @@ -8,4 +8,6 @@ obj-$(CONFIG_ARCH_DAVINCI_DM355) += pll-dm355.o
> obj-$(CONFIG_ARCH_DAVINCI_DM365) += pll-dm365.o
> obj-$(CONFIG_ARCH_DAVINCI_DM644x) += pll-dm644x.o
> obj-$(CONFIG_ARCH_DAVINCI_DM646x) += pll-dm646x.o
> +
> +obj-y += psc.o
> endif
> diff --git a/drivers/clk/davinci/psc.c b/drivers/clk/davinci/psc.c
> new file mode 100644
> index 0000000..a8b5f57
> --- /dev/null
> +++ b/drivers/clk/davinci/psc.c
> @@ -0,0 +1,282 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Clock driver for TI Davinci PSC controllers
> + *
> + * Copyright (C) 2017 David Lechner <david@lechnology.com>
2018
> + *
> + * Based on: drivers/clk/keystone/gate.c
> + * Copyright (C) 2013 Texas Instruments.
> + * Murali Karicheri <m-karicheri2@ti.com>
> + * Santosh Shilimkar <santosh.shilimkar@ti.com>
> + *
> + * And: arch/arm/mach-davinci/psc.c
> + * Copyright (C) 2006 Texas Instruments.
> + */
> +
> +#include <linux/clk-provider.h>
> +#include <linux/clk/davinci.h>
> +#include <linux/clkdev.h>
> +#include <linux/err.h>
> +#include <linux/of_address.h>
> +#include <linux/of.h>
> +#include <linux/regmap.h>
> +#include <linux/slab.h>
> +#include <linux/types.h>
> +
> +#include "psc.h"
> +
> +/* PSC register offsets */
> +#define EPCPR 0x070
> +#define PTCMD 0x120
> +#define PTSTAT 0x128
> +#define PDSTAT(n) (0x200 + 4 * (n))
> +#define PDCTL(n) (0x300 + 4 * (n))
> +#define MDSTAT(n) (0x800 + 4 * (n))
> +#define MDCTL(n) (0xa00 + 4 * (n))
> +
> +/* PSC module states */
> +enum davinci_psc_state {
> + PSC_STATE_SWRSTDISABLE = 0,
> + PSC_STATE_SYNCRST = 1,
> + PSC_STATE_DISABLE = 2,
> + PSC_STATE_ENABLE = 3,
> +};
> +
> +#define MDSTAT_STATE_MASK 0x3f> +#define MDSTAT_MCKOUT BIT(12)
> +#define PDSTAT_STATE_MASK 0x1f
GENMASK() for masks.
> +#define MDCTL_FORCE BIT(31)
> +#define MDCTL_LRESET BIT(8)
> +#define PDCTL_EPCGOOD BIT(8)
> +#define PDCTL_NEXT BIT(0)
> +
> +/**
> + * struct davinci_psc_clk - PSC clock structure
> + * @hw: clk_hw for the psc
> + * @regmap: PSC MMIO region
> + * @lpsc: Local PSC number (module id)
> + * @pd: Power domain
> + * @flags: LPSC_* quirk flags
> + */
> +struct davinci_psc_clk {
> + struct clk_hw hw;
> + struct regmap *regmap;
> + u32 lpsc;
> + u32 pd;
> + u32 flags;
> +};
> +
> +#define to_davinci_psc_clk(_hw) container_of(_hw, struct davinci_psc_clk, hw)
> +
> +static void psc_config(struct davinci_psc_clk *psc,
> + enum davinci_psc_state next_state)
> +{
> + u32 epcpr, pdstat, mdstat, mdctl, ptstat;
> +
> + mdctl = next_state;
> + if (psc->flags & LPSC_FORCE)
> + mdctl |= MDCTL_FORCE;
> + regmap_write_bits(psc->regmap, MDCTL(psc->lpsc), MDSTAT_STATE_MASK,
> + mdctl);
Wont this ignore the MDCTL_FORCE bit since MDSTAT_STATE_MASK does not
cover that?
> +
> + regmap_read(psc->regmap, PDSTAT(psc->pd), &pdstat);
> + if ((pdstat & PDSTAT_STATE_MASK) == 0) {
> + regmap_write_bits(psc->regmap, PDSTAT(psc->pd),
> + PDSTAT_STATE_MASK, PDCTL_NEXT);
Shouldn't this be a write to PDCTL register?
> +
> + regmap_write(psc->regmap, PTCMD, BIT(psc->pd));
> +
> + regmap_read_poll_timeout(psc->regmap, EPCPR, epcpr,
> + epcpr & BIT(psc->pd), 0, 0);
> +
> + regmap_write_bits(psc->regmap, PDCTL(psc->pd), PDCTL_EPCGOOD,
> + PDCTL_EPCGOOD);
> + } else {
> + regmap_write(psc->regmap, PTCMD, BIT(psc->pd));
> + }
> +
> + regmap_read_poll_timeout(psc->regmap, PTSTAT, ptstat,
> + !(ptstat & BIT(psc->pd)), 0, 0);
> +
> + regmap_read_poll_timeout(psc->regmap, MDSTAT(psc->lpsc), mdstat,
> + (mdstat & MDSTAT_STATE_MASK) == next_state,
> + 0, 0);
> +}
> +
[...]
> +
> +/**
> + * davinci_psc_clk_register - register psc clock
> + * @dev: device that is registering this clock
No dev parameter below.
> + * @name: name of this clock
> + * @parent_name: name of clock's parent
> + * @regmap: PSC MMIO region
> + * @lpsc: local PSC number
> + * @pd: power domain
> + * @flags: LPSC_* flags
> + */
> +static struct clk *davinci_psc_clk_register(const char *name,
> + const char *parent_name,
> + struct regmap *regmap,
> + u32 lpsc, u32 pd, u32 flags)
> +{
> + struct clk_init_data init;
> + struct davinci_psc_clk *psc;
> + struct clk *clk;
> +
> + psc = kzalloc(sizeof(*psc), GFP_KERNEL);
> + if (!psc)
> + return ERR_PTR(-ENOMEM);
> +
> + init.name = name;
> + init.ops = &davinci_psc_clk_ops;
> + init.parent_names = (parent_name ? &parent_name : NULL);
> + init.num_parents = (parent_name ? 1 : 0);
> + init.flags = CLK_SET_RATE_PARENT;
Is this needed since PSC does not cause any rate change?
> +
> + if (flags & LPSC_ALWAYS_ENABLED)
> + init.flags |= CLK_IS_CRITICAL;
> +
> + psc->regmap = regmap;
> + psc->hw.init = &init;
> + psc->lpsc = lpsc;
> + psc->pd = pd;
> + psc->flags = flags;
> +
> + clk = clk_register(NULL, &psc->hw);
> + if (IS_ERR(clk))
> + kfree(psc);
> +
> + return clk;
> +}
> +
> +/*
> + * FIXME: This needs to be converted to a reset controller. But, the reset
> + * framework is currently device tree only.
Yeah, I see that __reset_control_get() fails with -EINVAL if there is no
of_node.
> + */
> +
> +static int davinci_psc_clk_reset(struct davinci_psc_clk *psc, bool reset)
> +{
> + u32 mdctl;
> +
> + if (IS_ERR_OR_NULL(psc))
> + return -EINVAL;
> +
> + mdctl = reset ? 0 : MDCTL_LRESET;
> + regmap_write_bits(psc->regmap, MDCTL(psc->lpsc), MDCTL_LRESET, mdctl);
> +
> + return 0;
> +}
> +
> +int davinci_clk_reset_assert(struct clk *clk)
> +{
> + struct davinci_psc_clk *psc = to_davinci_psc_clk(__clk_get_hw(clk));
> +
> + return davinci_psc_clk_reset(psc, true);
> +}
> +EXPORT_SYMBOL(davinci_clk_reset_assert);
> +
> +int davinci_clk_reset_deassert(struct clk *clk)
> +{
> + struct davinci_psc_clk *psc = to_davinci_psc_clk(__clk_get_hw(clk));
> +
> + return davinci_psc_clk_reset(psc, false);
> +}
> +EXPORT_SYMBOL(davinci_clk_reset_deassert);
> +
[...]
> diff --git a/drivers/clk/davinci/psc.h b/drivers/clk/davinci/psc.h
> new file mode 100644
> index 0000000..6022f6e
> --- /dev/null
> +++ b/drivers/clk/davinci/psc.h
> @@ -0,0 +1,49 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Clock driver for TI Davinci PSC controllers
> + *
> + * Copyright (C) 2017 David Lechner <david@lechnology.com>
> + */
> +
> +#ifndef __CLK_DAVINCI_PSC_H__
> +#define __CLK_DAVINCI_PSC_H__
> +
> +#include <linux/types.h>
> +
> +/* PSC quirk flags */
> +#define LPSC_ALWAYS_ENABLED BIT(1) /* never disable this clock */
> +#define LPSC_FORCE BIT(2) /* requires MDCTL FORCE bit */
> +#define LPSC_LOCAL_RESET BIT(3) /* acts as reset provider */
> +
> +struct clk_onecell_data;
Rather clk-provider.h should be included in this file?
Thanks,
Sekhar
next prev parent reply other threads:[~2018-01-16 11:03 UTC|newest]
Thread overview: 121+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-01-08 2:16 [PATCH v5 00/44] ARM: davinci: convert to common clock framework David Lechner
2018-01-08 2:17 ` [PATCH v5 01/44] dt-bindings: clock: Add new bindings for TI Davinci PLL clocks David Lechner
[not found] ` <1515377863-20358-2-git-send-email-david-nq/r/kbU++upp/zk7JDF2g@public.gmane.org>
2018-01-08 14:00 ` Sekhar Nori
2018-01-08 16:29 ` David Lechner
2018-01-09 12:35 ` Sekhar Nori
[not found] ` <0f90b5f7-f21e-5f81-1154-9a815bbb786d-l0cyMroinI0@public.gmane.org>
2018-01-10 3:01 ` David Lechner
2018-01-10 18:52 ` Sekhar Nori
2018-01-10 22:24 ` Adam Ford
[not found] ` <CAHCN7x+ZYezmEU_0mF=6_gF14DZxKnuDp1Cx=aC2=eN_QLNdJQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2018-01-11 2:50 ` David Lechner
2018-01-11 12:45 ` Adam Ford
2018-01-11 15:47 ` Sekhar Nori
[not found] ` <14320e05-c6f7-fa2d-35cd-c01414c59f2f-l0cyMroinI0@public.gmane.org>
2018-01-11 16:14 ` Adam Ford
2018-01-11 17:22 ` David Lechner
2018-01-11 18:09 ` Adam Ford
2018-01-11 18:29 ` David Lechner
2018-01-11 18:50 ` Adam Ford
[not found] ` <CAHCN7x+G5pxOeD7TahqiQUePEu1Z4Hyinkjq_bcSM+Hz36xoSg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2018-01-11 20:04 ` David Lechner
2018-01-11 20:58 ` Adam Ford
[not found] ` <CAHCN7x+EtQs6NHAYbVga7vU1U+qQLqOxdf+1MW6HewaT+ZF_Xg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2018-01-11 21:04 ` David Lechner
[not found] ` <5832fd62-16aa-e167-7e52-2ce493e33cdc-nq/r/kbU++upp/zk7JDF2g@public.gmane.org>
2018-01-11 21:34 ` Adam Ford
2018-01-11 21:46 ` David Lechner
[not found] ` <c1e27013-cbad-3b09-0e0d-f68d75162c1f-nq/r/kbU++upp/zk7JDF2g@public.gmane.org>
2018-01-12 6:03 ` Sekhar Nori
2018-01-16 11:22 ` Sekhar Nori
2018-01-16 12:21 ` Adam Ford
2018-01-16 16:41 ` David Lechner
2018-01-11 23:20 ` David Lechner
2018-01-11 2:54 ` David Lechner
2018-01-08 2:17 ` [PATCH v5 02/44] clk: davinci: New driver for davinci " David Lechner
2018-01-12 9:21 ` Sekhar Nori
2018-01-12 15:25 ` David Lechner
[not found] ` <01fbde0e-36a0-2b19-e385-e63bc4a3ae4a-nq/r/kbU++upp/zk7JDF2g@public.gmane.org>
2018-01-12 15:30 ` Adam Ford
[not found] ` <CAHCN7xK44_zv27xe5yxL8Efey=VC-nypK6hY6VWqsoLqnKe04g-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2018-01-12 15:48 ` David Lechner
2018-01-12 16:18 ` Sekhar Nori
[not found] ` <eb2b1a63-9c7c-aeca-170f-d38642442438-l0cyMroinI0@public.gmane.org>
2018-01-13 1:11 ` David Lechner
2018-01-16 6:48 ` Sekhar Nori
2018-01-13 2:13 ` David Lechner
2018-01-16 6:32 ` Sekhar Nori
2018-01-08 2:17 ` [PATCH v5 03/44] clk: davinci: Add platform information for TI DA830 PLL David Lechner
[not found] ` <1515377863-20358-4-git-send-email-david-nq/r/kbU++upp/zk7JDF2g@public.gmane.org>
2018-01-12 9:41 ` Sekhar Nori
2018-01-08 2:17 ` [PATCH v5 04/44] clk: davinci: Add platform information for TI DA850 PLL David Lechner
2018-01-16 8:37 ` Sekhar Nori
2018-01-08 2:17 ` [PATCH v5 05/44] clk: davinci: Add platform information for TI DM355 PLL David Lechner
2018-01-16 8:38 ` Sekhar Nori
2018-01-08 2:17 ` [PATCH v5 06/44] clk: davinci: Add platform information for TI DM365 PLL David Lechner
[not found] ` <1515377863-20358-7-git-send-email-david-nq/r/kbU++upp/zk7JDF2g@public.gmane.org>
2018-01-16 8:48 ` Sekhar Nori
2018-01-08 2:17 ` [PATCH v5 07/44] clk: davinci: Add platform information for TI DM644x PLL David Lechner
[not found] ` <1515377863-20358-8-git-send-email-david-nq/r/kbU++upp/zk7JDF2g@public.gmane.org>
2018-01-16 8:56 ` Sekhar Nori
2018-01-08 2:17 ` [PATCH v5 08/44] clk: davinci: Add platform information for TI DM646x PLL David Lechner
2018-01-16 9:01 ` Sekhar Nori
2018-01-08 2:17 ` [PATCH v5 09/44] dt-bindings: clock: New bindings for TI Davinci PSC David Lechner
[not found] ` <1515377863-20358-10-git-send-email-david-nq/r/kbU++upp/zk7JDF2g@public.gmane.org>
2018-01-11 21:22 ` Rob Herring
2018-01-08 2:17 ` [PATCH v5 10/44] clk: davinci: New driver for davinci PSC clocks David Lechner
2018-01-16 11:03 ` Sekhar Nori [this message]
2018-01-16 16:51 ` David Lechner
[not found] ` <83f3d207-9645-cbdf-d6cf-b6e6a8458abe-nq/r/kbU++upp/zk7JDF2g@public.gmane.org>
2018-01-17 12:25 ` Sekhar Nori
2018-01-17 17:28 ` David Lechner
2018-01-08 2:17 ` [PATCH v5 11/44] clk: davinci: Add platform information for TI DA830 PSC David Lechner
[not found] ` <1515377863-20358-12-git-send-email-david-nq/r/kbU++upp/zk7JDF2g@public.gmane.org>
2018-01-16 13:38 ` Sekhar Nori
[not found] ` <91fe16dc-907e-6dbb-c8db-c27561132093-l0cyMroinI0@public.gmane.org>
2018-01-16 17:16 ` David Lechner
[not found] ` <4dd36ca7-e41d-58d8-ec8c-787978307943-nq/r/kbU++upp/zk7JDF2g@public.gmane.org>
2018-01-17 12:18 ` Sekhar Nori
[not found] ` <86581de6-a982-7a7b-9a83-22c869417211-l0cyMroinI0@public.gmane.org>
2018-01-17 17:32 ` David Lechner
2018-01-18 7:53 ` Sekhar Nori
[not found] ` <1515377863-20358-1-git-send-email-david-nq/r/kbU++upp/zk7JDF2g@public.gmane.org>
2018-01-08 2:17 ` [PATCH v5 12/44] clk: davinci: Add platform information for TI DA850 PSC David Lechner
[not found] ` <1515377863-20358-13-git-send-email-david-nq/r/kbU++upp/zk7JDF2g@public.gmane.org>
2018-01-16 14:00 ` Sekhar Nori
2018-01-16 17:21 ` David Lechner
2018-01-17 11:57 ` Sekhar Nori
2018-01-17 17:33 ` David Lechner
2018-01-17 19:08 ` David Lechner
2018-01-18 6:37 ` Sekhar Nori
2018-02-09 16:22 ` Bartosz Golaszewski
2018-02-09 16:48 ` Michael Turquette
2018-02-12 3:03 ` David Lechner
2018-04-05 13:09 ` Sekhar Nori
2018-04-05 13:44 ` Bartosz Golaszewski
2018-04-05 14:36 ` Sekhar Nori
2018-04-05 15:37 ` David Lechner
2018-04-05 15:51 ` Bartosz Golaszewski
2018-04-06 9:37 ` Sekhar Nori
2018-04-06 16:46 ` Stephen Boyd
2018-04-23 14:59 ` David Lechner
2018-04-24 8:28 ` Sekhar Nori
2018-04-24 16:11 ` David Lechner
2018-04-25 6:07 ` Sekhar Nori
2018-04-25 10:09 ` Bartosz Golaszewski
2018-04-25 10:26 ` Bartosz Golaszewski
2018-01-08 2:17 ` [PATCH v5 13/44] clk: davinci: Add platform information for TI DM355 PSC David Lechner
[not found] ` <1515377863-20358-14-git-send-email-david-nq/r/kbU++upp/zk7JDF2g@public.gmane.org>
2018-01-16 14:15 ` Sekhar Nori
2018-01-08 2:17 ` [PATCH v5 14/44] clk: davinci: Add platform information for TI DM365 PSC David Lechner
2018-01-16 14:16 ` Sekhar Nori
2018-01-08 2:17 ` [PATCH v5 15/44] clk: davinci: Add platform information for TI DM644x PSC David Lechner
2018-01-17 13:57 ` Sekhar Nori
2018-01-08 2:17 ` [PATCH v5 16/44] clk: davinci: Add platform information for TI DM646x PSC David Lechner
2018-01-17 14:59 ` Sekhar Nori
2018-01-08 2:17 ` [PATCH v5 17/44] dt-bindings: clock: Add bindings for DA8XX CFGCHIP gate clocks David Lechner
[not found] ` <1515377863-20358-18-git-send-email-david-nq/r/kbU++upp/zk7JDF2g@public.gmane.org>
2018-01-11 21:45 ` Rob Herring
2018-01-11 21:51 ` David Lechner
2018-01-08 2:17 ` [PATCH v5 18/44] dt-bindings: clock: Add binding for TI DA8XX CFGCHIP mux clocks David Lechner
2018-01-08 2:17 ` [PATCH v5 19/44] clk: davinci: New driver for TI DA8XX CFGCHIP clocks David Lechner
2018-01-17 15:31 ` Sekhar Nori
2018-01-17 17:35 ` David Lechner
2018-01-08 2:17 ` [PATCH v5 20/44] dt-bindings: clock: Add bindings for TI DA8XX USB PHY clocks David Lechner
2018-01-18 12:10 ` Sekhar Nori
[not found] ` <33f0feba-adee-e365-54d5-16fe3d49302d-l0cyMroinI0@public.gmane.org>
2018-01-18 19:00 ` David Lechner
2018-01-19 6:17 ` Sekhar Nori
2018-01-08 2:17 ` [PATCH v5 21/44] clk: davinci: New driver " David Lechner
2018-01-18 13:05 ` Sekhar Nori
[not found] ` <493e4809-6b77-7772-70c7-ad0fa04e9033-l0cyMroinI0@public.gmane.org>
2018-01-18 18:49 ` David Lechner
2018-01-19 5:04 ` Sekhar Nori
2018-01-08 2:17 ` [PATCH v5 22/44] ARM: davinci: move davinci_clk_init() to init_time David Lechner
2018-01-08 2:17 ` [PATCH v5 23/44] ARM: da830: add new clock init using common clock framework David Lechner
2018-01-08 2:17 ` [PATCH v5 24/44] ARM: da850: " David Lechner
[not found] ` <1515377863-20358-25-git-send-email-david-nq/r/kbU++upp/zk7JDF2g@public.gmane.org>
2018-01-18 15:24 ` Sekhar Nori
2018-01-08 2:17 ` [PATCH v5 25/44] ARM: dm355: " David Lechner
2018-01-08 2:17 ` [PATCH v5 26/44] ARM: dm365: " David Lechner
2018-01-08 2:17 ` [PATCH v5 27/44] ARM: dm644x: " David Lechner
2018-01-08 2:17 ` [PATCH v5 28/44] ARM: dm646x: " David Lechner
2018-01-08 2:17 ` [PATCH v5 29/44] ARM: da8xx: add new USB PHY " David Lechner
2018-01-18 15:14 ` Sekhar Nori
[not found] ` <83dfab9a-be30-6313-d756-50fa018e757e-l0cyMroinI0@public.gmane.org>
2018-01-18 18:43 ` David Lechner
2018-01-19 5:08 ` Sekhar Nori
2018-01-08 2:17 ` [PATCH v5 35/44] ARM: da850: Remove legacy clock init David Lechner
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=e0a9af55-a8b1-c359-fe88-d038648e02f1@ti.com \
--to=nsekhar@ti.com \
--cc=aford173@gmail.com \
--cc=david@lechnology.com \
--cc=devicetree@vger.kernel.org \
--cc=khilman@kernel.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-clk@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=mark.rutland@arm.com \
--cc=mturquette@baylibre.com \
--cc=robh+dt@kernel.org \
--cc=sboyd@codeaurora.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).