* [PATCH v2 0/2] Enable gcov for RISC-V
@ 2020-01-02 4:14 Zong Li
2020-01-02 4:14 ` [PATCH 1/2] riscv: gcov: enable " Zong Li
2020-01-02 4:14 ` [PATCH 2/2] Documentation/features: support gcov on RISC-V Zong Li
0 siblings, 2 replies; 3+ messages in thread
From: Zong Li @ 2020-01-02 4:14 UTC (permalink / raw)
To: corbet, paul.walmsley, palmer, aou, anup, linux-doc,
linux-kernel, linux-riscv
Cc: Zong Li
These patches enable GCOV code coverage measurement on RISC-V and update
the status of RISC-V arch in documentation.
Lightly tested on QEMU and Hifive Unleashed board, seems to work as
expected.
Changes in v2:
- Split into two patches for kconfig and documentation respectively.
Zong Li (2):
riscv: gcov: enable gcov for RISC-V
Documentation/features: support gcov on RISC-V
Documentation/features/debug/gcov-profile-all/arch-support.txt | 2 +-
arch/riscv/Kconfig | 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
--
2.24.1
^ permalink raw reply [flat|nested] 3+ messages in thread
* [PATCH 1/2] riscv: gcov: enable gcov for RISC-V
2020-01-02 4:14 [PATCH v2 0/2] Enable gcov for RISC-V Zong Li
@ 2020-01-02 4:14 ` Zong Li
2020-01-02 4:14 ` [PATCH 2/2] Documentation/features: support gcov on RISC-V Zong Li
1 sibling, 0 replies; 3+ messages in thread
From: Zong Li @ 2020-01-02 4:14 UTC (permalink / raw)
To: corbet, paul.walmsley, palmer, aou, anup, linux-doc,
linux-kernel, linux-riscv
Cc: Zong Li
This patch enables GCOV code coverage measurement on RISC-V.
Lightly tested on QEMU and Hifive Unleashed board, seems to work as
expected.
Signed-off-by: Zong Li <zong.li@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
arch/riscv/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index d8efbaa78d67..a31169b02ec0 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -64,6 +64,7 @@ config RISCV
select SPARSEMEM_STATIC if 32BIT
select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU
select HAVE_ARCH_MMAP_RND_BITS if MMU
+ select ARCH_HAS_GCOV_PROFILE_ALL
config ARCH_MMAP_RND_BITS_MIN
default 18 if 64BIT
--
2.24.1
^ permalink raw reply related [flat|nested] 3+ messages in thread
* [PATCH 2/2] Documentation/features: support gcov on RISC-V
2020-01-02 4:14 [PATCH v2 0/2] Enable gcov for RISC-V Zong Li
2020-01-02 4:14 ` [PATCH 1/2] riscv: gcov: enable " Zong Li
@ 2020-01-02 4:14 ` Zong Li
1 sibling, 0 replies; 3+ messages in thread
From: Zong Li @ 2020-01-02 4:14 UTC (permalink / raw)
To: corbet, paul.walmsley, palmer, aou, anup, linux-doc,
linux-kernel, linux-riscv
Cc: Zong Li
Change status to "ok" for RISC-V architecture.
Lightly tested on QEMU and Hifive Unleashed board, seems to work as
expected.
Signed-off-by: Zong Li <zong.li@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
---
Documentation/features/debug/gcov-profile-all/arch-support.txt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/features/debug/gcov-profile-all/arch-support.txt b/Documentation/features/debug/gcov-profile-all/arch-support.txt
index 059d58a549c7..6fb2b0671994 100644
--- a/Documentation/features/debug/gcov-profile-all/arch-support.txt
+++ b/Documentation/features/debug/gcov-profile-all/arch-support.txt
@@ -23,7 +23,7 @@
| openrisc: | TODO |
| parisc: | TODO |
| powerpc: | ok |
- | riscv: | TODO |
+ | riscv: | ok |
| s390: | ok |
| sh: | ok |
| sparc: | TODO |
--
2.24.1
^ permalink raw reply related [flat|nested] 3+ messages in thread
end of thread, other threads:[~2020-01-02 4:15 UTC | newest]
Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
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2020-01-02 4:14 [PATCH v2 0/2] Enable gcov for RISC-V Zong Li
2020-01-02 4:14 ` [PATCH 1/2] riscv: gcov: enable " Zong Li
2020-01-02 4:14 ` [PATCH 2/2] Documentation/features: support gcov on RISC-V Zong Li
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