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From: Andrew Lunn <andrew@lunn.ch>
To: "Madalin Bucur (OSS)" <madalin.bucur@oss.nxp.com>
Cc: Russell King - ARM Linux admin <linux@armlinux.org.uk>,
	Florian Fainelli <f.fainelli@gmail.com>,
	Heiner Kallweit <hkallweit1@gmail.com>,
	"David S. Miller" <davem@davemloft.net>,
	Jonathan Corbet <corbet@lwn.net>,
	Kishon Vijay Abraham I <kishon@ti.com>,
	"linux-doc@vger.kernel.org" <linux-doc@vger.kernel.org>,
	"netdev@vger.kernel.org" <netdev@vger.kernel.org>
Subject: Re: [PATCH net-next 0/2] Fix 10G PHY interface types
Date: Fri, 3 Jan 2020 17:47:45 +0100	[thread overview]
Message-ID: <20200103164745.GL1397@lunn.ch> (raw)
In-Reply-To: <DB8PR04MB698518D97251CB15938279C3EC230@DB8PR04MB6985.eurprd04.prod.outlook.com>

> And here is a LS1046A SoC document that describes XFI and 10GBASE_KR:
> 
> https://www.mouser.com/pdfdocs/LS1046A.pdf

I don't see any register descriptions here. So you failed to answer my
question. What do you actually need to configure? What needs to go
into DT? 

You keep avoiding the questions Russell and I pose, which is not
helping your argument. We need details, not hand waiving.

	Andrew

  reply	other threads:[~2020-01-03 16:47 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-01-03 11:51 [PATCH net-next 0/2] Fix 10G PHY interface types Russell King - ARM Linux admin
2020-01-03 11:52 ` [PATCH net-next 1/2] net: phy: add PHY_INTERFACE_MODE_10GBASER Russell King
2020-01-03 20:22   ` Andrew Lunn
2020-01-03 11:52 ` [PATCH net-next 2/2] net: switch to using PHY_INTERFACE_MODE_10GBASER rather than 10GKR Russell King
2020-01-03 20:25   ` Andrew Lunn
2020-01-03 20:41     ` Russell King - ARM Linux admin
2020-01-03 12:22 ` [PATCH net-next 0/2] Fix 10G PHY interface types Madalin Bucur (OSS)
2020-01-03 12:57   ` Russell King - ARM Linux admin
2020-01-03 14:17   ` Andrew Lunn
2020-01-03 16:33     ` Madalin Bucur (OSS)
2020-01-03 16:47       ` Andrew Lunn [this message]
2020-01-06  9:16         ` Madalin Bucur (OSS)
2020-01-03 20:29 ` David Miller

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