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From: Chris Packham <chris.packham@alliedtelesis.co.nz>
To: bp@alien8.de, robh+dt@kernel.org, mark.rutland@arm.com,
	linux@armlinux.org.uk, patches@armlinux.org.uk,
	mchehab@kernel.org, james.morse@arm.com, jlu@pengutronix.de
Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-edac@vger.kernel.org, linux-kernel@vger.kernel.org,
	Gregory CLEMENT <gregory.clement@free-electrons.com>,
	Chris Packham <chris.packham@alliedtelesis.co.nz>
Subject: [PATCH v9 1/8] ARM: aurora-l2: add prefix to MAX_RANGE_SIZE
Date: Fri, 12 Jul 2019 15:48:57 +1200	[thread overview]
Message-ID: <20190712034904.5747-2-chris.packham@alliedtelesis.co.nz> (raw)
In-Reply-To: <20190712034904.5747-1-chris.packham@alliedtelesis.co.nz>

From: Jan Luebbe <jlu@pengutronix.de>

The macro name is too generic, so add a AURORA_ prefix.

Signed-off-by: Jan Luebbe <jlu@pengutronix.de>
Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
---
 arch/arm/include/asm/hardware/cache-aurora-l2.h | 2 +-
 arch/arm/mm/cache-l2x0.c                        | 4 ++--
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm/include/asm/hardware/cache-aurora-l2.h b/arch/arm/include/asm/hardware/cache-aurora-l2.h
index c86124769831..dc5c479ec4c3 100644
--- a/arch/arm/include/asm/hardware/cache-aurora-l2.h
+++ b/arch/arm/include/asm/hardware/cache-aurora-l2.h
@@ -41,7 +41,7 @@
 #define AURORA_ACR_FORCE_WRITE_THRO_POLICY	\
 	(2 << AURORA_ACR_FORCE_WRITE_POLICY_OFFSET)
 
-#define MAX_RANGE_SIZE		1024
+#define AURORA_MAX_RANGE_SIZE	1024
 
 #define AURORA_WAY_SIZE_SHIFT	2
 
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
index 428d08718107..83b733a1f1e6 100644
--- a/arch/arm/mm/cache-l2x0.c
+++ b/arch/arm/mm/cache-l2x0.c
@@ -1352,8 +1352,8 @@ static unsigned long aurora_range_end(unsigned long start, unsigned long end)
 	 * since cache range operations stall the CPU pipeline
 	 * until completion.
 	 */
-	if (end > start + MAX_RANGE_SIZE)
-		end = start + MAX_RANGE_SIZE;
+	if (end > start + AURORA_MAX_RANGE_SIZE)
+		end = start + AURORA_MAX_RANGE_SIZE;
 
 	/*
 	 * Cache range operations can't straddle a page boundary.
-- 
2.22.0


  reply	other threads:[~2019-07-12  3:49 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-07-12  3:48 [PATCH v9 0/8] EDAC drivers for Armada XP L2 and DDR Chris Packham
2019-07-12  3:48 ` Chris Packham [this message]
2019-08-23 10:46   ` [PATCH v9 1/8] ARM: aurora-l2: add prefix to MAX_RANGE_SIZE Russell King - ARM Linux admin
2019-08-23 10:50     ` Russell King - ARM Linux admin
2019-08-26  0:46       ` Chris Packham
2019-08-27  9:13         ` Russell King - ARM Linux admin
2019-08-27 20:56           ` Chris Packham
2019-08-27 21:07             ` Russell King - ARM Linux admin
2019-08-27 21:13               ` Chris Packham
2019-08-27 21:15                 ` Russell King - ARM Linux admin
2019-07-12  3:48 ` [PATCH v9 2/8] ARM: aurora-l2: add defines for parity and ECC registers Chris Packham
2019-07-12  3:48 ` [PATCH v9 3/8] ARM: l2x0: support parity-enable/disable on aurora Chris Packham
2019-07-12  3:49 ` [PATCH v9 4/8] dt-bindings: ARM: document marvell,ecc-enable binding Chris Packham
2019-07-12  3:49 ` [PATCH v9 5/8] ARM: l2x0: add marvell,ecc-enable property for aurora Chris Packham
2019-07-12  3:49 ` [PATCH v9 6/8] EDAC: Add missing debugfs_create_x32 wrapper Chris Packham
2019-07-12  3:49 ` [PATCH v9 7/8] EDAC: Add driver for the Marvell Armada XP SDRAM and L2 cache ECC Chris Packham
2019-07-12  3:49 ` [PATCH v9 8/8] EDAC: armada_xp: Add support for more SoCs Chris Packham
2019-07-26 14:51   ` James Morse
2019-07-28 20:52     ` Chris Packham
2019-07-26 14:53 ` [PATCH v9 0/8] EDAC drivers for Armada XP L2 and DDR James Morse
2019-07-28 20:33   ` Chris Packham

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