* [PATCH] pinctrl: qcom: Pass irqchip when adding gpiochip
@ 2019-07-24 8:38 Linus Walleij
2019-07-24 20:00 ` Bjorn Andersson
0 siblings, 1 reply; 6+ messages in thread
From: Linus Walleij @ 2019-07-24 8:38 UTC (permalink / raw)
To: linux-gpio; +Cc: Linus Walleij, Bjorn Andersson, Thierry Reding
We need to convert all old gpio irqchips to pass the irqchip
setup along when adding the gpio_chip.
For chained irqchips this is a pretty straight-forward
conversion.
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Thierry Reding <treding@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
drivers/pinctrl/qcom/pinctrl-msm.c | 27 +++++++++++++--------------
1 file changed, 13 insertions(+), 14 deletions(-)
diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c b/drivers/pinctrl/qcom/pinctrl-msm.c
index 7f35c196bb3e..73062e329f6f 100644
--- a/drivers/pinctrl/qcom/pinctrl-msm.c
+++ b/drivers/pinctrl/qcom/pinctrl-msm.c
@@ -1002,6 +1002,7 @@ static bool msm_gpio_needs_valid_mask(struct msm_pinctrl *pctrl)
static int msm_gpio_init(struct msm_pinctrl *pctrl)
{
struct gpio_chip *chip;
+ struct gpio_irq_chip *girq;
int ret;
unsigned ngpio = pctrl->soc->ngpios;
@@ -1027,6 +1028,18 @@ static int msm_gpio_init(struct msm_pinctrl *pctrl)
pctrl->irq_chip.irq_request_resources = msm_gpio_irq_reqres;
pctrl->irq_chip.irq_release_resources = msm_gpio_irq_relres;
+ girq = &chip->irq;
+ girq->chip = &pctrl->irq_chip;
+ girq->parent_handler = msm_gpio_irq_handler;
+ girq->num_parents = 1;
+ girq->parents = devm_kcalloc(pctrl->dev, 1, sizeof(*girq->parents),
+ GFP_KERNEL);
+ if (!girq->parents)
+ return -ENOMEM;
+ girq->default_type = IRQ_TYPE_NONE;
+ girq->handler = handle_bad_irq;
+ girq->parents[0] = pctrl->irq;
+
ret = gpiochip_add_data(&pctrl->chip, pctrl);
if (ret) {
dev_err(pctrl->dev, "Failed register gpiochip\n");
@@ -1053,20 +1066,6 @@ static int msm_gpio_init(struct msm_pinctrl *pctrl)
}
}
- ret = gpiochip_irqchip_add(chip,
- &pctrl->irq_chip,
- 0,
- handle_edge_irq,
- IRQ_TYPE_NONE);
- if (ret) {
- dev_err(pctrl->dev, "Failed to add irqchip to gpiochip\n");
- gpiochip_remove(&pctrl->chip);
- return -ENOSYS;
- }
-
- gpiochip_set_chained_irqchip(chip, &pctrl->irq_chip, pctrl->irq,
- msm_gpio_irq_handler);
-
return 0;
}
--
2.21.0
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH] pinctrl: qcom: Pass irqchip when adding gpiochip
2019-07-24 8:38 [PATCH] pinctrl: qcom: Pass irqchip when adding gpiochip Linus Walleij
@ 2019-07-24 20:00 ` Bjorn Andersson
2019-07-25 15:16 ` Lina Iyer
2019-07-28 22:38 ` Linus Walleij
0 siblings, 2 replies; 6+ messages in thread
From: Bjorn Andersson @ 2019-07-24 20:00 UTC (permalink / raw)
To: Linus Walleij, Lina Iyer; +Cc: linux-gpio, Thierry Reding
On Wed 24 Jul 01:38 PDT 2019, Linus Walleij wrote:
> We need to convert all old gpio irqchips to pass the irqchip
> setup along when adding the gpio_chip.
Could you please elaborate on why we have this need?
>
> For chained irqchips this is a pretty straight-forward
> conversion.
>
> Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
> Cc: Thierry Reding <treding@nvidia.com>
> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
> ---
> drivers/pinctrl/qcom/pinctrl-msm.c | 27 +++++++++++++--------------
> 1 file changed, 13 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c b/drivers/pinctrl/qcom/pinctrl-msm.c
> index 7f35c196bb3e..73062e329f6f 100644
> --- a/drivers/pinctrl/qcom/pinctrl-msm.c
> +++ b/drivers/pinctrl/qcom/pinctrl-msm.c
> @@ -1002,6 +1002,7 @@ static bool msm_gpio_needs_valid_mask(struct msm_pinctrl *pctrl)
> static int msm_gpio_init(struct msm_pinctrl *pctrl)
> {
> struct gpio_chip *chip;
> + struct gpio_irq_chip *girq;
> int ret;
> unsigned ngpio = pctrl->soc->ngpios;
>
> @@ -1027,6 +1028,18 @@ static int msm_gpio_init(struct msm_pinctrl *pctrl)
> pctrl->irq_chip.irq_request_resources = msm_gpio_irq_reqres;
> pctrl->irq_chip.irq_release_resources = msm_gpio_irq_relres;
>
> + girq = &chip->irq;
> + girq->chip = &pctrl->irq_chip;
> + girq->parent_handler = msm_gpio_irq_handler;
> + girq->num_parents = 1;
> + girq->parents = devm_kcalloc(pctrl->dev, 1, sizeof(*girq->parents),
> + GFP_KERNEL);
> + if (!girq->parents)
> + return -ENOMEM;
> + girq->default_type = IRQ_TYPE_NONE;
> + girq->handler = handle_bad_irq;
It's been a while since i poked at this, but I think it's fine to change
this from handle_edge_irq to handle_bad_irq.
So this change does looks like a nice cleanup to me, but adding Lina wrt
her PDC integration patch series.
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Regards,
Bjorn
> + girq->parents[0] = pctrl->irq;
> +
> ret = gpiochip_add_data(&pctrl->chip, pctrl);
> if (ret) {
> dev_err(pctrl->dev, "Failed register gpiochip\n");
> @@ -1053,20 +1066,6 @@ static int msm_gpio_init(struct msm_pinctrl *pctrl)
> }
> }
>
> - ret = gpiochip_irqchip_add(chip,
> - &pctrl->irq_chip,
> - 0,
> - handle_edge_irq,
> - IRQ_TYPE_NONE);
> - if (ret) {
> - dev_err(pctrl->dev, "Failed to add irqchip to gpiochip\n");
> - gpiochip_remove(&pctrl->chip);
> - return -ENOSYS;
> - }
> -
> - gpiochip_set_chained_irqchip(chip, &pctrl->irq_chip, pctrl->irq,
> - msm_gpio_irq_handler);
> -
> return 0;
> }
>
> --
> 2.21.0
>
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] pinctrl: qcom: Pass irqchip when adding gpiochip
2019-07-24 20:00 ` Bjorn Andersson
@ 2019-07-25 15:16 ` Lina Iyer
2019-07-28 22:43 ` Linus Walleij
2019-07-28 22:38 ` Linus Walleij
1 sibling, 1 reply; 6+ messages in thread
From: Lina Iyer @ 2019-07-25 15:16 UTC (permalink / raw)
To: Bjorn Andersson; +Cc: Linus Walleij, linux-gpio, Thierry Reding
On Wed, Jul 24 2019 at 14:00 -0600, Bjorn Andersson wrote:
>On Wed 24 Jul 01:38 PDT 2019, Linus Walleij wrote:
>
>> We need to convert all old gpio irqchips to pass the irqchip
>> setup along when adding the gpio_chip.
>
>Could you please elaborate on why we have this need?
>
>>
>> For chained irqchips this is a pretty straight-forward
>> conversion.
>>
>> Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
>> Cc: Thierry Reding <treding@nvidia.com>
>> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
>> ---
>> drivers/pinctrl/qcom/pinctrl-msm.c | 27 +++++++++++++--------------
>> 1 file changed, 13 insertions(+), 14 deletions(-)
>>
>> diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c b/drivers/pinctrl/qcom/pinctrl-msm.c
>> index 7f35c196bb3e..73062e329f6f 100644
>> --- a/drivers/pinctrl/qcom/pinctrl-msm.c
>> +++ b/drivers/pinctrl/qcom/pinctrl-msm.c
>> @@ -1002,6 +1002,7 @@ static bool msm_gpio_needs_valid_mask(struct msm_pinctrl *pctrl)
>> static int msm_gpio_init(struct msm_pinctrl *pctrl)
>> {
>> struct gpio_chip *chip;
>> + struct gpio_irq_chip *girq;
>> int ret;
>> unsigned ngpio = pctrl->soc->ngpios;
>>
>> @@ -1027,6 +1028,18 @@ static int msm_gpio_init(struct msm_pinctrl *pctrl)
>> pctrl->irq_chip.irq_request_resources = msm_gpio_irq_reqres;
>> pctrl->irq_chip.irq_release_resources = msm_gpio_irq_relres;
>>
>> + girq = &chip->irq;
>> + girq->chip = &pctrl->irq_chip;
>> + girq->parent_handler = msm_gpio_irq_handler;
>> + girq->num_parents = 1;
>> + girq->parents = devm_kcalloc(pctrl->dev, 1, sizeof(*girq->parents),
>> + GFP_KERNEL);
>> + if (!girq->parents)
>> + return -ENOMEM;
>> + girq->default_type = IRQ_TYPE_NONE;
>> + girq->handler = handle_bad_irq;
>
>It's been a while since i poked at this, but I think it's fine to change
>this from handle_edge_irq to handle_bad_irq.
>
>
>So this change does looks like a nice cleanup to me, but adding Lina wrt
>her PDC integration patch series.
>
Thanks Bjorn.
I had something similar in mind [1] as part of my series reworked on top
of Linus's GPIO hierarchy series. This patch is not far from it.
Thanks,
Lina
[1].
https://github.com/i-lina/linux/commit/f88c3fca1739eebdd8111d9baeaf048c9f957473
>Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
>
>Regards,
>Bjorn
>
>> + girq->parents[0] = pctrl->irq;
>> +
>> ret = gpiochip_add_data(&pctrl->chip, pctrl);
>> if (ret) {
>> dev_err(pctrl->dev, "Failed register gpiochip\n");
>> @@ -1053,20 +1066,6 @@ static int msm_gpio_init(struct msm_pinctrl *pctrl)
>> }
>> }
>>
>> - ret = gpiochip_irqchip_add(chip,
>> - &pctrl->irq_chip,
>> - 0,
>> - handle_edge_irq,
>> - IRQ_TYPE_NONE);
>> - if (ret) {
>> - dev_err(pctrl->dev, "Failed to add irqchip to gpiochip\n");
>> - gpiochip_remove(&pctrl->chip);
>> - return -ENOSYS;
>> - }
>> -
>> - gpiochip_set_chained_irqchip(chip, &pctrl->irq_chip, pctrl->irq,
>> - msm_gpio_irq_handler);
>> -
>> return 0;
>> }
>>
>> --
>> 2.21.0
>>
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] pinctrl: qcom: Pass irqchip when adding gpiochip
2019-07-24 20:00 ` Bjorn Andersson
2019-07-25 15:16 ` Lina Iyer
@ 2019-07-28 22:38 ` Linus Walleij
1 sibling, 0 replies; 6+ messages in thread
From: Linus Walleij @ 2019-07-28 22:38 UTC (permalink / raw)
To: Bjorn Andersson; +Cc: Lina Iyer, open list:GPIO SUBSYSTEM, Thierry Reding
On Wed, Jul 24, 2019 at 9:58 PM Bjorn Andersson
<bjorn.andersson@linaro.org> wrote:
> On Wed 24 Jul 01:38 PDT 2019, Linus Walleij wrote:
>
> > We need to convert all old gpio irqchips to pass the irqchip
> > setup along when adding the gpio_chip.
>
> Could you please elaborate on why we have this need?
We have two codepaths inside gpiolib depending on if the gpio_chip
is passed in along with the chip like this, or the separate calls
to set up the chain. It is a maintenance nightmare.
> > + girq->default_type = IRQ_TYPE_NONE;
> > + girq->handler = handle_bad_irq;
>
> It's been a while since i poked at this, but I think it's fine to change
> this from handle_edge_irq to handle_bad_irq.
>
>
> So this change does looks like a nice cleanup to me, but adding Lina wrt
> her PDC integration patch series.
>
> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Thanks!
Linus Walleij
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] pinctrl: qcom: Pass irqchip when adding gpiochip
2019-07-25 15:16 ` Lina Iyer
@ 2019-07-28 22:43 ` Linus Walleij
2019-07-30 17:26 ` Lina Iyer
0 siblings, 1 reply; 6+ messages in thread
From: Linus Walleij @ 2019-07-28 22:43 UTC (permalink / raw)
To: Lina Iyer; +Cc: Bjorn Andersson, open list:GPIO SUBSYSTEM, Thierry Reding
On Thu, Jul 25, 2019 at 5:16 PM Lina Iyer <ilina@codeaurora.org> wrote:
> On Wed, Jul 24 2019 at 14:00 -0600, Bjorn Andersson wrote:
> >On Wed 24 Jul 01:38 PDT 2019, Linus Walleij wrote:
> I had something similar in mind [1] as part of my series reworked on top
> of Linus's GPIO hierarchy series. This patch is not far from it.
Sorry for constantly doubleworking and stepping on your toes here :(
Adding a Co-developed-by: since it is pretty much the same.
Indeed the hierarchical irqchip will need that the set-up is done
with this contemporary method.
I will try to respin the hierarchical GPIO too with Brians changes
so we can get that merged and create a Perfect (fingers crossed)
base for your development.
Yours,
Linus Walleij
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] pinctrl: qcom: Pass irqchip when adding gpiochip
2019-07-28 22:43 ` Linus Walleij
@ 2019-07-30 17:26 ` Lina Iyer
0 siblings, 0 replies; 6+ messages in thread
From: Lina Iyer @ 2019-07-30 17:26 UTC (permalink / raw)
To: Linus Walleij; +Cc: Bjorn Andersson, open list:GPIO SUBSYSTEM, Thierry Reding
On Mon, Jul 29 2019 at 16:43 -0600, Linus Walleij wrote:
>On Thu, Jul 25, 2019 at 5:16 PM Lina Iyer <ilina@codeaurora.org> wrote:
>> On Wed, Jul 24 2019 at 14:00 -0600, Bjorn Andersson wrote:
>> >On Wed 24 Jul 01:38 PDT 2019, Linus Walleij wrote:
>
>> I had something similar in mind [1] as part of my series reworked on top
>> of Linus's GPIO hierarchy series. This patch is not far from it.
>
>Sorry for constantly doubleworking and stepping on your toes here :(
>Adding a Co-developed-by: since it is pretty much the same.
>
Oh, no worries, it is not necessary. :)
>Indeed the hierarchical irqchip will need that the set-up is done
>with this contemporary method.
>
>I will try to respin the hierarchical GPIO too with Brians changes
>so we can get that merged and create a Perfect (fingers crossed)
>base for your development.
>
Waiting on your series to post my next revision.
--Lina
^ permalink raw reply [flat|nested] 6+ messages in thread
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2019-07-24 8:38 [PATCH] pinctrl: qcom: Pass irqchip when adding gpiochip Linus Walleij
2019-07-24 20:00 ` Bjorn Andersson
2019-07-25 15:16 ` Lina Iyer
2019-07-28 22:43 ` Linus Walleij
2019-07-30 17:26 ` Lina Iyer
2019-07-28 22:38 ` Linus Walleij
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