From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: Mika Westerberg <mika.westerberg@linux.intel.com>,
linux-gpio@vger.kernel.org,
Bartosz Golaszewski <bgolaszewski@baylibre.com>,
Linus Walleij <linus.walleij@linaro.org>
Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Subject: [PATCH v1 3/8] pinctrl: lynxpoint: Correct amount of pins
Date: Wed, 6 Nov 2019 16:48:24 +0200 [thread overview]
Message-ID: <20191106144829.32275-4-andriy.shevchenko@linux.intel.com> (raw)
In-Reply-To: <20191106144829.32275-1-andriy.shevchenko@linux.intel.com>
When we count from 0 it's possible to get into off-by-one error.
That's what had happened to this driver. So, correct amount of pins
and related typos in the code.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
---
drivers/pinctrl/intel/pinctrl-lynxpoint.c | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/pinctrl/intel/pinctrl-lynxpoint.c b/drivers/pinctrl/intel/pinctrl-lynxpoint.c
index 6467095523cc..ebc523233df4 100644
--- a/drivers/pinctrl/intel/pinctrl-lynxpoint.c
+++ b/drivers/pinctrl/intel/pinctrl-lynxpoint.c
@@ -18,9 +18,9 @@
#include <linux/slab.h>
#include <linux/types.h>
-/* LynxPoint chipset has support for 94 gpio pins */
+/* LynxPoint chipset has support for 95 GPIO pins */
-#define LP_NUM_GPIO 94
+#define LP_NUM_GPIO 95
/* Bitmapped register offsets */
#define LP_ACPI_OWNED 0x00 /* Bitmap, set by bios, 0: pin reserved for ACPI */
@@ -54,11 +54,11 @@ struct lp_gpio {
/*
* Lynxpoint gpios are controlled through both bitmapped registers and
* per gpio specific registers. The bitmapped registers are in chunks of
- * 3 x 32bit registers to cover all 94 gpios
+ * 3 x 32bit registers to cover all 95 GPIOs
*
* per gpio specific registers consist of two 32bit registers per gpio
- * (LP_CONFIG1 and LP_CONFIG2), with 94 gpios there's a total of
- * 188 config registers.
+ * (LP_CONFIG1 and LP_CONFIG2), with 95 GPIOs there's a total of
+ * 190 config registers.
*
* A simplified view of the register layout look like this:
*
@@ -67,7 +67,7 @@ struct lp_gpio {
* LP_ACPI_OWNED[94:64] gpio ownerships for gpios 63-94
* ...
* LP_INT_ENABLE[31:0] ...
- * LP_INT_ENABLE[63:31] ...
+ * LP_INT_ENABLE[63:32] ...
* LP_INT_ENABLE[94:64] ...
* LP0_CONFIG1 (gpio 0) config1 reg for gpio 0 (per gpio registers)
* LP0_CONFIG2 (gpio 0) config2 reg for gpio 0
--
2.24.0.rc1
next prev parent reply other threads:[~2019-11-06 14:48 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-06 14:48 [PATCH v1 0/8] pinctrl: intel: Move Lynxpoint to pin control umbrella Andy Shevchenko
2019-11-06 14:48 ` [PATCH v1 1/8] pinctrl: lynxpoint: Move GPIO driver to pin controller folder Andy Shevchenko
2019-11-07 13:48 ` Mika Westerberg
2019-11-07 14:47 ` Andy Shevchenko
2019-11-13 9:54 ` Linus Walleij
2019-11-13 13:40 ` Andy Shevchenko
2019-11-06 14:48 ` [PATCH v1 2/8] pinctrl: lynxpoint: Use raw_spinlock for locking Andy Shevchenko
2019-11-06 14:48 ` Andy Shevchenko [this message]
2019-11-06 14:48 ` [PATCH v1 4/8] pinctrl: lynxpoint: Keep pointer to struct device instead of its container Andy Shevchenko
2019-11-06 14:48 ` [PATCH v1 5/8] pinctrl: lynxpoint: Use %pR to print IO resource Andy Shevchenko
2019-11-06 14:48 ` [PATCH v1 6/8] pinctrl: lynxpoint: Switch to memory mapped IO accessors Andy Shevchenko
2019-11-06 14:48 ` [PATCH v1 7/8] pinctrl: lynxpoint: Convert unsigned to unsigned int Andy Shevchenko
2019-11-06 14:48 ` [PATCH v1 8/8] pinctrl: lynxpoint: Move ->remove closer to ->probe() Andy Shevchenko
2019-11-13 9:54 ` [PATCH v1 0/8] pinctrl: intel: Move Lynxpoint to pin control umbrella Linus Walleij
2019-11-25 12:02 ` Andy Shevchenko
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