From: Matthias Kaehlcke <mka@chromium.org>
To: Akash Asthana <akashast@codeaurora.org>
Cc: gregkh@linuxfoundation.org, agross@kernel.org,
bjorn.andersson@linaro.org, wsa@the-dreams.de,
broonie@kernel.org, mark.rutland@arm.com, robh+dt@kernel.org,
linux-i2c@vger.kernel.org, linux-spi@vger.kernel.org,
devicetree@vger.kernel.org, swboyd@chromium.org,
mgautam@codeaurora.org, linux-arm-msm@vger.kernel.org,
linux-serial@vger.kernel.org, dianders@chromium.org,
evgreen@chromium.org, georgi.djakov@linaro.org
Subject: Re: [PATCH V5 3/7] i2c: i2c-qcom-geni: Add interconnect support
Date: Fri, 8 May 2020 11:16:44 -0700 [thread overview]
Message-ID: <20200508181644.GC4525@google.com> (raw)
In-Reply-To: <1588919619-21355-4-git-send-email-akashast@codeaurora.org>
On Fri, May 08, 2020 at 12:03:35PM +0530, Akash Asthana wrote:
> Get the interconnect paths for I2C based Serial Engine device
> and vote according to the bus speed of the driver.
>
> Signed-off-by: Akash Asthana <akashast@codeaurora.org>
> ---
> Changes in V2:
> - As per Bjorn's comment, removed se == NULL check from geni_i2c_icc_get
> - As per Bjorn's comment, removed code to set se->icc_path* to NULL in failure
> - As per Bjorn's comment, introduced and using devm_of_icc_get API for getting
> path handle
> - As per Matthias comment, added error handling for icc_set_bw call
>
> Changes in V3:
> - As per Matthias comment, use common library APIs defined in geni-se
> driver for ICC functionality.
>
> Changes in V4:
> - Move peak_bw guess as twice of avg_bw if nothing mentioned explicitly
> to ICC core.
>
> Changes in V5:
> - Use icc_enable/disable in power on/off call.
>
> drivers/i2c/busses/i2c-qcom-geni.c | 29 ++++++++++++++++++++++++++++-
> 1 file changed, 28 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/i2c/busses/i2c-qcom-geni.c b/drivers/i2c/busses/i2c-qcom-geni.c
> index 18d1e4f..f2e786d 100644
> --- a/drivers/i2c/busses/i2c-qcom-geni.c
> +++ b/drivers/i2c/busses/i2c-qcom-geni.c
> @@ -557,6 +557,25 @@ static int geni_i2c_probe(struct platform_device *pdev)
> gi2c->adap.dev.of_node = dev->of_node;
> strlcpy(gi2c->adap.name, "Geni-I2C", sizeof(gi2c->adap.name));
>
> + ret = geni_icc_get(&gi2c->se, "qup-memory");
> + if (ret)
> + return ret;
> + /*
> + * Set the bus quota for core and cpu to a reasonable value for
> + * register access.
> + * Set quota for DDR based on bus speed.
> + */
> + geni_icc_bw_init(&gi2c->se.icc_paths[GENI_TO_CORE], GENI_DEFAULT_BW,
> + 0);
> + geni_icc_bw_init(&gi2c->se.icc_paths[CPU_TO_GENI], GENI_DEFAULT_BW,
> + 0);
> + geni_icc_bw_init(&gi2c->se.icc_paths[GENI_TO_DDR],
> + Bps_to_icc(gi2c->clk_freq_out), 0);
> +
> + ret = geni_icc_set_bw(&gi2c->se);
> + if (ret)
> + return ret;
> +
> ret = geni_se_resources_on(&gi2c->se);
> if (ret) {
> dev_err(dev, "Error turning on resources %d\n", ret);
> @@ -579,6 +598,10 @@ static int geni_i2c_probe(struct platform_device *pdev)
> return ret;
> }
>
> + ret = geni_icc_disable(&gi2c->se);
> + if (ret)
> + return ret;
> +
> dev_dbg(dev, "i2c fifo/se-dma mode. fifo depth:%d\n", tx_depth);
>
> gi2c->suspended = 1;
> @@ -623,7 +646,7 @@ static int __maybe_unused geni_i2c_runtime_suspend(struct device *dev)
> gi2c->suspended = 1;
> }
>
> - return 0;
> + return geni_icc_disable(&gi2c->se);
> }
>
> static int __maybe_unused geni_i2c_runtime_resume(struct device *dev)
> @@ -631,6 +654,10 @@ static int __maybe_unused geni_i2c_runtime_resume(struct device *dev)
> int ret;
> struct geni_i2c_dev *gi2c = dev_get_drvdata(dev);
>
> + ret = geni_icc_enable(&gi2c->se);
> + if (ret)
> + return ret;
> +
> ret = geni_se_resources_on(&gi2c->se);
> if (ret)
> return ret;
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
next prev parent reply other threads:[~2020-05-08 18:16 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-08 6:33 [PATCH V5 0/7] Add interconnect support to QSPI and QUP drivers Akash Asthana
2020-05-08 6:33 ` [PATCH V5 1/7] soc: qcom: geni: Support for ICC voting Akash Asthana
2020-05-08 17:13 ` Matthias Kaehlcke
2020-05-12 14:02 ` Akash Asthana
2020-05-08 19:03 ` Matthias Kaehlcke
2020-05-12 14:26 ` Akash Asthana
2020-05-08 6:33 ` [PATCH V5 2/7] soc: qcom-geni-se: Add interconnect support to fix earlycon crash Akash Asthana
2020-05-08 17:59 ` Matthias Kaehlcke
2020-05-08 19:14 ` Matthias Kaehlcke
2020-05-14 7:03 ` Akash Asthana
2020-05-14 6:45 ` Akash Asthana
2020-05-09 12:11 ` Andy Shevchenko
2020-05-14 7:34 ` Akash Asthana
2020-05-08 6:33 ` [PATCH V5 3/7] i2c: i2c-qcom-geni: Add interconnect support Akash Asthana
2020-05-08 18:16 ` Matthias Kaehlcke [this message]
2020-05-15 10:03 ` Wolfram Sang
2020-05-08 6:33 ` [PATCH V5 4/7] spi: spi-geni-qcom: " Akash Asthana
2020-05-08 10:16 ` Mark Brown
2020-05-08 18:25 ` Matthias Kaehlcke
2020-05-14 7:37 ` Akash Asthana
2020-05-08 6:33 ` [PATCH V5 5/7] tty: serial: qcom_geni_serial: " Akash Asthana
2020-05-08 18:38 ` Matthias Kaehlcke
2020-05-08 6:33 ` [PATCH V5 6/7] spi: spi-qcom-qspi: " Akash Asthana
2020-05-08 10:16 ` Mark Brown
2020-05-08 18:53 ` Matthias Kaehlcke
2020-05-18 13:10 ` Akash Asthana
2020-05-08 6:33 ` [PATCH V5 7/7] arm64: dts: sc7180: Add interconnect for QUP and QSPI Akash Asthana
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