* [PATCH v2 0/2] iio: adc: ti-ads8344: driver improvements
@ 2020-04-16 20:54 Alexandre Belloni
2020-04-16 20:54 ` [PATCH v2 1/2] iio: adc: ti-ads8344: properly byte swap value Alexandre Belloni
2020-04-16 20:54 ` [PATCH v2 2/2] iio: adc: ti-ads8344: optimize consumption Alexandre Belloni
0 siblings, 2 replies; 12+ messages in thread
From: Alexandre Belloni @ 2020-04-16 20:54 UTC (permalink / raw)
To: Jonathan Cameron
Cc: Hartmut Knaack, Lars-Peter Clausen, Peter Meerwald-Stadler,
Gregory CLEMENT, linux-iio, linux-kernel, Alexandre Belloni
Hello,
This series improves the ads8344 driver.
The first patch is a fix and can be backported.
The last one is improving power consumption by shutting down the ADC
while it is not used.
Changes in v2:
- keep the SPI buffer in the driver data structure as suggested by Lars.
Alexandre Belloni (2):
iio: adc: ti-ads8344: properly byte swap value
iio: adc: ti-ads8344: optimize consumption
drivers/iio/adc/ti-ads8344.c | 17 +++++++++++------
1 file changed, 11 insertions(+), 6 deletions(-)
--
2.25.2
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH v2 1/2] iio: adc: ti-ads8344: properly byte swap value
2020-04-16 20:54 [PATCH v2 0/2] iio: adc: ti-ads8344: driver improvements Alexandre Belloni
@ 2020-04-16 20:54 ` Alexandre Belloni
2020-04-17 10:44 ` Andy Shevchenko
` (2 more replies)
2020-04-16 20:54 ` [PATCH v2 2/2] iio: adc: ti-ads8344: optimize consumption Alexandre Belloni
1 sibling, 3 replies; 12+ messages in thread
From: Alexandre Belloni @ 2020-04-16 20:54 UTC (permalink / raw)
To: Jonathan Cameron
Cc: Hartmut Knaack, Lars-Peter Clausen, Peter Meerwald-Stadler,
Gregory CLEMENT, linux-iio, linux-kernel, Alexandre Belloni
The first received byte is the MSB, followed by the LSB so the value needs
to be byte swapped.
Also, the ADC actually has a delay of one clock on the SPI bus. Read three
bytes to get the last bit.
Fixes: 8dd2d7c0fed7 ("iio: adc: Add driver for the TI ADS8344 A/DC chips")
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
---
drivers/iio/adc/ti-ads8344.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/iio/adc/ti-ads8344.c b/drivers/iio/adc/ti-ads8344.c
index 9a460807d46d..abe4b56c847c 100644
--- a/drivers/iio/adc/ti-ads8344.c
+++ b/drivers/iio/adc/ti-ads8344.c
@@ -29,7 +29,7 @@ struct ads8344 {
struct mutex lock;
u8 tx_buf ____cacheline_aligned;
- u16 rx_buf;
+ u8 rx_buf[3];
};
#define ADS8344_VOLTAGE_CHANNEL(chan, si) \
@@ -89,11 +89,11 @@ static int ads8344_adc_conversion(struct ads8344 *adc, int channel,
udelay(9);
- ret = spi_read(spi, &adc->rx_buf, 2);
+ ret = spi_read(spi, adc->rx_buf, sizeof(adc->rx_buf));
if (ret)
return ret;
- return adc->rx_buf;
+ return adc->rx_buf[0] << 9 | adc->rx_buf[1] << 1 | adc->rx_buf[2] >> 7;
}
static int ads8344_read_raw(struct iio_dev *iio,
--
2.25.2
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH v2 2/2] iio: adc: ti-ads8344: optimize consumption
2020-04-16 20:54 [PATCH v2 0/2] iio: adc: ti-ads8344: driver improvements Alexandre Belloni
2020-04-16 20:54 ` [PATCH v2 1/2] iio: adc: ti-ads8344: properly byte swap value Alexandre Belloni
@ 2020-04-16 20:54 ` Alexandre Belloni
2020-04-18 15:13 ` Jonathan Cameron
1 sibling, 1 reply; 12+ messages in thread
From: Alexandre Belloni @ 2020-04-16 20:54 UTC (permalink / raw)
To: Jonathan Cameron
Cc: Hartmut Knaack, Lars-Peter Clausen, Peter Meerwald-Stadler,
Gregory CLEMENT, linux-iio, linux-kernel, Alexandre Belloni
Set the clock mode only once, at probe time and then keep the ADC powered
down between conversions.
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
---
drivers/iio/adc/ti-ads8344.c | 11 ++++++++---
1 file changed, 8 insertions(+), 3 deletions(-)
diff --git a/drivers/iio/adc/ti-ads8344.c b/drivers/iio/adc/ti-ads8344.c
index abe4b56c847c..40e7a9eee189 100644
--- a/drivers/iio/adc/ti-ads8344.c
+++ b/drivers/iio/adc/ti-ads8344.c
@@ -72,7 +72,7 @@ static const struct iio_chan_spec ads8344_channels[] = {
};
static int ads8344_adc_conversion(struct ads8344 *adc, int channel,
- bool differential)
+ bool differential, u8 clock)
{
struct spi_device *spi = adc->spi;
int ret;
@@ -81,7 +81,7 @@ static int ads8344_adc_conversion(struct ads8344 *adc, int channel,
if (!differential)
adc->tx_buf |= ADS8344_SINGLE_END;
adc->tx_buf |= ADS8344_CHANNEL(channel);
- adc->tx_buf |= ADS8344_CLOCK_INTERNAL;
+ adc->tx_buf |= clock;
ret = spi_write(spi, &adc->tx_buf, 1);
if (ret)
@@ -106,7 +106,7 @@ static int ads8344_read_raw(struct iio_dev *iio,
case IIO_CHAN_INFO_RAW:
mutex_lock(&adc->lock);
*value = ads8344_adc_conversion(adc, channel->scan_index,
- channel->differential);
+ channel->differential, 0);
mutex_unlock(&adc->lock);
if (*value < 0)
return *value;
@@ -161,6 +161,11 @@ static int ads8344_probe(struct spi_device *spi)
if (ret)
return ret;
+ /* Do a dummy read and set external clock mode */
+ ret = ads8344_adc_conversion(adc, 0, 0, ADS8344_CLOCK_INTERNAL);
+ if (ret < 0)
+ return ret;
+
spi_set_drvdata(spi, indio_dev);
ret = iio_device_register(indio_dev);
--
2.25.2
^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [PATCH v2 1/2] iio: adc: ti-ads8344: properly byte swap value
2020-04-16 20:54 ` [PATCH v2 1/2] iio: adc: ti-ads8344: properly byte swap value Alexandre Belloni
@ 2020-04-17 10:44 ` Andy Shevchenko
2020-04-17 10:47 ` Andy Shevchenko
2020-04-17 13:45 ` Andy Shevchenko
2020-04-18 15:06 ` Jonathan Cameron
2 siblings, 1 reply; 12+ messages in thread
From: Andy Shevchenko @ 2020-04-17 10:44 UTC (permalink / raw)
To: Alexandre Belloni
Cc: Jonathan Cameron, Hartmut Knaack, Lars-Peter Clausen,
Peter Meerwald-Stadler, Gregory CLEMENT, linux-iio,
Linux Kernel Mailing List
On Thu, Apr 16, 2020 at 11:55 PM Alexandre Belloni
<alexandre.belloni@bootlin.com> wrote:
>
> The first received byte is the MSB, followed by the LSB so the value needs
> to be byte swapped.
>
> Also, the ADC actually has a delay of one clock on the SPI bus. Read three
> bytes to get the last bit.
>
Can you show example of what is read and what is expected to be a correct value?
Because it seems I have been reported with similar issue on other TI
ADC chip [1]. Perhaps we have to fix all of them?
[1]: https://github.com/edison-fw/meta-intel-edison/issues/108
> Fixes: 8dd2d7c0fed7 ("iio: adc: Add driver for the TI ADS8344 A/DC chips")
> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
> ---
> drivers/iio/adc/ti-ads8344.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/iio/adc/ti-ads8344.c b/drivers/iio/adc/ti-ads8344.c
> index 9a460807d46d..abe4b56c847c 100644
> --- a/drivers/iio/adc/ti-ads8344.c
> +++ b/drivers/iio/adc/ti-ads8344.c
> @@ -29,7 +29,7 @@ struct ads8344 {
> struct mutex lock;
>
> u8 tx_buf ____cacheline_aligned;
> - u16 rx_buf;
> + u8 rx_buf[3];
> };
>
> #define ADS8344_VOLTAGE_CHANNEL(chan, si) \
> @@ -89,11 +89,11 @@ static int ads8344_adc_conversion(struct ads8344 *adc, int channel,
>
> udelay(9);
>
> - ret = spi_read(spi, &adc->rx_buf, 2);
> + ret = spi_read(spi, adc->rx_buf, sizeof(adc->rx_buf));
> if (ret)
> return ret;
>
> - return adc->rx_buf;
> + return adc->rx_buf[0] << 9 | adc->rx_buf[1] << 1 | adc->rx_buf[2] >> 7;
> }
>
> static int ads8344_read_raw(struct iio_dev *iio,
> --
> 2.25.2
>
--
With Best Regards,
Andy Shevchenko
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2 1/2] iio: adc: ti-ads8344: properly byte swap value
2020-04-17 10:44 ` Andy Shevchenko
@ 2020-04-17 10:47 ` Andy Shevchenko
2020-04-17 11:13 ` Alexandre Belloni
0 siblings, 1 reply; 12+ messages in thread
From: Andy Shevchenko @ 2020-04-17 10:47 UTC (permalink / raw)
To: Alexandre Belloni
Cc: Jonathan Cameron, Hartmut Knaack, Lars-Peter Clausen,
Peter Meerwald-Stadler, Gregory CLEMENT, linux-iio,
Linux Kernel Mailing List
On Fri, Apr 17, 2020 at 1:44 PM Andy Shevchenko
<andy.shevchenko@gmail.com> wrote:
>
> On Thu, Apr 16, 2020 at 11:55 PM Alexandre Belloni
> <alexandre.belloni@bootlin.com> wrote:
> >
> > The first received byte is the MSB, followed by the LSB so the value needs
> > to be byte swapped.
> >
> > Also, the ADC actually has a delay of one clock on the SPI bus. Read three
> > bytes to get the last bit.
> >
>
> Can you show example of what is read and what is expected to be a correct value?
> Because it seems I have been reported with similar issue on other TI
> ADC chip [1]. Perhaps we have to fix all of them?
>
> [1]: https://github.com/edison-fw/meta-intel-edison/issues/108
Also, forgot to mention that TI ADC are 16 bit word, so, we need to
read two u16 rather then bytes.
Some configuration won't allow to do byte reads.
> > Fixes: 8dd2d7c0fed7 ("iio: adc: Add driver for the TI ADS8344 A/DC chips")
> > Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
--
With Best Regards,
Andy Shevchenko
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2 1/2] iio: adc: ti-ads8344: properly byte swap value
2020-04-17 10:47 ` Andy Shevchenko
@ 2020-04-17 11:13 ` Alexandre Belloni
2020-04-17 13:43 ` Andy Shevchenko
0 siblings, 1 reply; 12+ messages in thread
From: Alexandre Belloni @ 2020-04-17 11:13 UTC (permalink / raw)
To: Andy Shevchenko
Cc: Jonathan Cameron, Hartmut Knaack, Lars-Peter Clausen,
Peter Meerwald-Stadler, Gregory CLEMENT, linux-iio,
Linux Kernel Mailing List
On 17/04/2020 13:47:33+0300, Andy Shevchenko wrote:
> On Fri, Apr 17, 2020 at 1:44 PM Andy Shevchenko
> <andy.shevchenko@gmail.com> wrote:
> >
> > On Thu, Apr 16, 2020 at 11:55 PM Alexandre Belloni
> > <alexandre.belloni@bootlin.com> wrote:
> > >
> > > The first received byte is the MSB, followed by the LSB so the value needs
> > > to be byte swapped.
> > >
> > > Also, the ADC actually has a delay of one clock on the SPI bus. Read three
> > > bytes to get the last bit.
> > >
> >
> > Can you show example of what is read and what is expected to be a correct value?
> > Because it seems I have been reported with similar issue on other TI
> > ADC chip [1]. Perhaps we have to fix all of them?
> >
> > [1]: https://github.com/edison-fw/meta-intel-edison/issues/108
>
> Also, forgot to mention that TI ADC are 16 bit word, so, we need to
> read two u16 rather then bytes.
>
> Some configuration won't allow to do byte reads.
>
Both ADC families are not related, I don't think this is your issue. The
ADS8344 was from Burr-Brown.
--
Alexandre Belloni, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2 1/2] iio: adc: ti-ads8344: properly byte swap value
2020-04-17 11:13 ` Alexandre Belloni
@ 2020-04-17 13:43 ` Andy Shevchenko
0 siblings, 0 replies; 12+ messages in thread
From: Andy Shevchenko @ 2020-04-17 13:43 UTC (permalink / raw)
To: Alexandre Belloni
Cc: Jonathan Cameron, Hartmut Knaack, Lars-Peter Clausen,
Peter Meerwald-Stadler, Gregory CLEMENT, linux-iio,
Linux Kernel Mailing List
On Fri, Apr 17, 2020 at 2:13 PM Alexandre Belloni
<alexandre.belloni@bootlin.com> wrote:
> On 17/04/2020 13:47:33+0300, Andy Shevchenko wrote:
> > On Fri, Apr 17, 2020 at 1:44 PM Andy Shevchenko
> > <andy.shevchenko@gmail.com> wrote:
> > > On Thu, Apr 16, 2020 at 11:55 PM Alexandre Belloni
> > > <alexandre.belloni@bootlin.com> wrote:
> Both ADC families are not related, I don't think this is your issue. The
> ADS8344 was from Burr-Brown.
Thanks for clarification.
--
With Best Regards,
Andy Shevchenko
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2 1/2] iio: adc: ti-ads8344: properly byte swap value
2020-04-16 20:54 ` [PATCH v2 1/2] iio: adc: ti-ads8344: properly byte swap value Alexandre Belloni
2020-04-17 10:44 ` Andy Shevchenko
@ 2020-04-17 13:45 ` Andy Shevchenko
2020-04-17 14:23 ` Alexandre Belloni
2020-04-18 15:06 ` Jonathan Cameron
2 siblings, 1 reply; 12+ messages in thread
From: Andy Shevchenko @ 2020-04-17 13:45 UTC (permalink / raw)
To: Alexandre Belloni
Cc: Jonathan Cameron, Hartmut Knaack, Lars-Peter Clausen,
Peter Meerwald-Stadler, Gregory CLEMENT, linux-iio,
Linux Kernel Mailing List
On Thu, Apr 16, 2020 at 11:55 PM Alexandre Belloni
<alexandre.belloni@bootlin.com> wrote:
>
> The first received byte is the MSB, followed by the LSB so the value needs
> to be byte swapped.
>
> Also, the ADC actually has a delay of one clock on the SPI bus. Read three
> bytes to get the last bit.
> + return adc->rx_buf[0] << 9 | adc->rx_buf[1] << 1 | adc->rx_buf[2] >> 7;
I just realize, isn't it an open coded variant of ror() / rol()?
--
With Best Regards,
Andy Shevchenko
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2 1/2] iio: adc: ti-ads8344: properly byte swap value
2020-04-17 13:45 ` Andy Shevchenko
@ 2020-04-17 14:23 ` Alexandre Belloni
0 siblings, 0 replies; 12+ messages in thread
From: Alexandre Belloni @ 2020-04-17 14:23 UTC (permalink / raw)
To: Andy Shevchenko
Cc: Jonathan Cameron, Hartmut Knaack, Lars-Peter Clausen,
Peter Meerwald-Stadler, Gregory CLEMENT, linux-iio,
Linux Kernel Mailing List
On 17/04/2020 16:45:05+0300, Andy Shevchenko wrote:
> On Thu, Apr 16, 2020 at 11:55 PM Alexandre Belloni
> <alexandre.belloni@bootlin.com> wrote:
> >
> > The first received byte is the MSB, followed by the LSB so the value needs
> > to be byte swapped.
> >
> > Also, the ADC actually has a delay of one clock on the SPI bus. Read three
> > bytes to get the last bit.
>
> > + return adc->rx_buf[0] << 9 | adc->rx_buf[1] << 1 | adc->rx_buf[2] >> 7;
>
> I just realize, isn't it an open coded variant of ror() / rol()?
>
No, this byteswaps and rotates.
--
Alexandre Belloni, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2 1/2] iio: adc: ti-ads8344: properly byte swap value
2020-04-16 20:54 ` [PATCH v2 1/2] iio: adc: ti-ads8344: properly byte swap value Alexandre Belloni
2020-04-17 10:44 ` Andy Shevchenko
2020-04-17 13:45 ` Andy Shevchenko
@ 2020-04-18 15:06 ` Jonathan Cameron
2 siblings, 0 replies; 12+ messages in thread
From: Jonathan Cameron @ 2020-04-18 15:06 UTC (permalink / raw)
To: Alexandre Belloni
Cc: Hartmut Knaack, Lars-Peter Clausen, Peter Meerwald-Stadler,
Gregory CLEMENT, linux-iio, linux-kernel
On Thu, 16 Apr 2020 22:54:27 +0200
Alexandre Belloni <alexandre.belloni@bootlin.com> wrote:
> The first received byte is the MSB, followed by the LSB so the value needs
> to be byte swapped.
>
> Also, the ADC actually has a delay of one clock on the SPI bus. Read three
> bytes to get the last bit.
>
> Fixes: 8dd2d7c0fed7 ("iio: adc: Add driver for the TI ADS8344 A/DC chips")
> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Applied to the fixes-togreg branch of iio.git. Marked for stable.
Random aside that I'll probably forget to clean up.
Driver includes iio/buffer.h and doesn't use it...
Thanks,
Jonathan
> ---
> drivers/iio/adc/ti-ads8344.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/iio/adc/ti-ads8344.c b/drivers/iio/adc/ti-ads8344.c
> index 9a460807d46d..abe4b56c847c 100644
> --- a/drivers/iio/adc/ti-ads8344.c
> +++ b/drivers/iio/adc/ti-ads8344.c
> @@ -29,7 +29,7 @@ struct ads8344 {
> struct mutex lock;
>
> u8 tx_buf ____cacheline_aligned;
> - u16 rx_buf;
> + u8 rx_buf[3];
> };
>
> #define ADS8344_VOLTAGE_CHANNEL(chan, si) \
> @@ -89,11 +89,11 @@ static int ads8344_adc_conversion(struct ads8344 *adc, int channel,
>
> udelay(9);
>
> - ret = spi_read(spi, &adc->rx_buf, 2);
> + ret = spi_read(spi, adc->rx_buf, sizeof(adc->rx_buf));
> if (ret)
> return ret;
>
> - return adc->rx_buf;
> + return adc->rx_buf[0] << 9 | adc->rx_buf[1] << 1 | adc->rx_buf[2] >> 7;
> }
>
> static int ads8344_read_raw(struct iio_dev *iio,
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2 2/2] iio: adc: ti-ads8344: optimize consumption
2020-04-16 20:54 ` [PATCH v2 2/2] iio: adc: ti-ads8344: optimize consumption Alexandre Belloni
@ 2020-04-18 15:13 ` Jonathan Cameron
2020-04-30 20:17 ` Alexandre Belloni
0 siblings, 1 reply; 12+ messages in thread
From: Jonathan Cameron @ 2020-04-18 15:13 UTC (permalink / raw)
To: Alexandre Belloni
Cc: Hartmut Knaack, Lars-Peter Clausen, Peter Meerwald-Stadler,
Gregory CLEMENT, linux-iio, linux-kernel
On Thu, 16 Apr 2020 22:54:28 +0200
Alexandre Belloni <alexandre.belloni@bootlin.com> wrote:
> Set the clock mode only once, at probe time and then keep the ADC powered
> down between conversions.
>
> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Looks fine to me. I'd like to be lazy and not take this until the fix is
in my upstream (even though I suspect the merge would be fine).
Give me a poke if I seem to have forgotten this after that is true!
Thanks,
Jonathan
> ---
> drivers/iio/adc/ti-ads8344.c | 11 ++++++++---
> 1 file changed, 8 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/iio/adc/ti-ads8344.c b/drivers/iio/adc/ti-ads8344.c
> index abe4b56c847c..40e7a9eee189 100644
> --- a/drivers/iio/adc/ti-ads8344.c
> +++ b/drivers/iio/adc/ti-ads8344.c
> @@ -72,7 +72,7 @@ static const struct iio_chan_spec ads8344_channels[] = {
> };
>
> static int ads8344_adc_conversion(struct ads8344 *adc, int channel,
> - bool differential)
> + bool differential, u8 clock)
> {
> struct spi_device *spi = adc->spi;
> int ret;
> @@ -81,7 +81,7 @@ static int ads8344_adc_conversion(struct ads8344 *adc, int channel,
> if (!differential)
> adc->tx_buf |= ADS8344_SINGLE_END;
> adc->tx_buf |= ADS8344_CHANNEL(channel);
> - adc->tx_buf |= ADS8344_CLOCK_INTERNAL;
> + adc->tx_buf |= clock;
>
> ret = spi_write(spi, &adc->tx_buf, 1);
> if (ret)
> @@ -106,7 +106,7 @@ static int ads8344_read_raw(struct iio_dev *iio,
> case IIO_CHAN_INFO_RAW:
> mutex_lock(&adc->lock);
> *value = ads8344_adc_conversion(adc, channel->scan_index,
> - channel->differential);
> + channel->differential, 0);
> mutex_unlock(&adc->lock);
> if (*value < 0)
> return *value;
> @@ -161,6 +161,11 @@ static int ads8344_probe(struct spi_device *spi)
> if (ret)
> return ret;
>
> + /* Do a dummy read and set external clock mode */
> + ret = ads8344_adc_conversion(adc, 0, 0, ADS8344_CLOCK_INTERNAL);
> + if (ret < 0)
> + return ret;
> +
> spi_set_drvdata(spi, indio_dev);
>
> ret = iio_device_register(indio_dev);
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2 2/2] iio: adc: ti-ads8344: optimize consumption
2020-04-18 15:13 ` Jonathan Cameron
@ 2020-04-30 20:17 ` Alexandre Belloni
0 siblings, 0 replies; 12+ messages in thread
From: Alexandre Belloni @ 2020-04-30 20:17 UTC (permalink / raw)
To: Jonathan Cameron
Cc: Hartmut Knaack, Lars-Peter Clausen, Peter Meerwald-Stadler,
Gregory CLEMENT, linux-iio, linux-kernel
Hi,
On 18/04/2020 16:13:22+0100, Jonathan Cameron wrote:
> On Thu, 16 Apr 2020 22:54:28 +0200
> Alexandre Belloni <alexandre.belloni@bootlin.com> wrote:
>
> > Set the clock mode only once, at probe time and then keep the ADC powered
> > down between conversions.
> >
> > Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
> Looks fine to me. I'd like to be lazy and not take this until the fix is
> in my upstream (even though I suspect the merge would be fine).
>
> Give me a poke if I seem to have forgotten this after that is true!
>
It now landed in your upstream but I guess you want to take Gregory's
patch as a fix first. To be honest I don't think any of the fixes are
urgent as it seems we are the only users of the particular ADC.
--
Alexandre Belloni, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
^ permalink raw reply [flat|nested] 12+ messages in thread
end of thread, other threads:[~2020-04-30 20:18 UTC | newest]
Thread overview: 12+ messages (download: mbox.gz / follow: Atom feed)
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2020-04-16 20:54 [PATCH v2 0/2] iio: adc: ti-ads8344: driver improvements Alexandre Belloni
2020-04-16 20:54 ` [PATCH v2 1/2] iio: adc: ti-ads8344: properly byte swap value Alexandre Belloni
2020-04-17 10:44 ` Andy Shevchenko
2020-04-17 10:47 ` Andy Shevchenko
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2020-04-17 13:43 ` Andy Shevchenko
2020-04-17 13:45 ` Andy Shevchenko
2020-04-17 14:23 ` Alexandre Belloni
2020-04-18 15:06 ` Jonathan Cameron
2020-04-16 20:54 ` [PATCH v2 2/2] iio: adc: ti-ads8344: optimize consumption Alexandre Belloni
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