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From: Stephen Boyd <swboyd@chromium.org>
To: Peter Huewe <peterhuewe@gmx.de>,
	Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com>
Cc: Andrey Pronin <apronin@chromium.org>,
	linux-kernel@vger.kernel.org, linux-integrity@vger.kernel.org,
	Duncan Laurie <dlaurie@chromium.org>,
	Jason Gunthorpe <jgg@ziepe.ca>, Arnd Bergmann <arnd@arndb.de>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Guenter Roeck <groeck@chromium.org>,
	Alexander Steffen <Alexander.Steffen@infineon.com>,
	Heiko Stuebner <heiko@sntech.de>, Rob Herring <robh@kernel.org>
Subject: [PATCH v7 1/6] dt-bindings: tpm: document properties for cr50
Date: Fri, 20 Sep 2019 11:32:35 -0700
Message-ID: <20190920183240.181420-2-swboyd@chromium.org> (raw)
In-Reply-To: <20190920183240.181420-1-swboyd@chromium.org>

From: Andrey Pronin <apronin@chromium.org>

Add TPM2.0 PTP FIFO compatible SPI interface for chips with Cr50
firmware.

Cc: Andrey Pronin <apronin@chromium.org>
Cc: Duncan Laurie <dlaurie@chromium.org>
Cc: Jason Gunthorpe <jgg@ziepe.ca>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Guenter Roeck <groeck@chromium.org>
Cc: Alexander Steffen <Alexander.Steffen@infineon.com>
Cc: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Andrey Pronin <apronin@chromium.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com>
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
---
 .../bindings/security/tpm/google,cr50.txt     | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/security/tpm/google,cr50.txt

diff --git a/Documentation/devicetree/bindings/security/tpm/google,cr50.txt b/Documentation/devicetree/bindings/security/tpm/google,cr50.txt
new file mode 100644
index 000000000000..cd69c2efdd37
--- /dev/null
+++ b/Documentation/devicetree/bindings/security/tpm/google,cr50.txt
@@ -0,0 +1,19 @@
+* H1 Secure Microcontroller with Cr50 Firmware on SPI Bus.
+
+H1 Secure Microcontroller running Cr50 firmware provides several
+functions, including TPM-like functionality. It communicates over
+SPI using the FIFO protocol described in the PTP Spec, section 6.
+
+Required properties:
+- compatible: Should be "google,cr50".
+- spi-max-frequency: Maximum SPI frequency.
+
+Example:
+
+&spi0 {
+	tpm@0 {
+		compatible = "google,cr50";
+		reg = <0>;
+		spi-max-frequency = <800000>;
+	};
+};
-- 
Sent by a computer through tubes


  reply index

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-09-20 18:32 [PATCH v7 0/6] tpm: Add driver " Stephen Boyd
2019-09-20 18:32 ` Stephen Boyd [this message]
2019-09-20 18:32 ` [PATCH v7 2/6] tpm: Add a flag to indicate TPM power is managed by firmware Stephen Boyd
2019-09-20 18:32 ` [PATCH v7 3/6] tpm: tpm_tis_spi: Introduce a flow control callback Stephen Boyd
2019-09-20 18:32 ` [PATCH v7 4/6] tpm: tpm_tis_spi: Support cr50 devices Stephen Boyd
2019-10-06 22:32   ` Jarkko Sakkinen
2020-02-03  9:13   ` Alexander Steffen
2020-02-04  0:37     ` Stephen Boyd
2020-02-04  7:15       ` Alexander Steffen
2020-02-04 12:00         ` Jarkko Sakkinen
2019-09-20 18:32 ` [PATCH v7 5/6] tpm: tpm_tis_spi: Cleanup includes Stephen Boyd
2019-10-06 22:34   ` Jarkko Sakkinen
2019-09-20 18:32 ` [PATCH v7 6/6] tpm: tpm_tis_spi: Drop THIS_MODULE usage from driver struct Stephen Boyd
2019-10-06 22:35   ` Jarkko Sakkinen
2019-10-06 22:39 ` [PATCH v7 0/6] tpm: Add driver for cr50 Jarkko Sakkinen
2019-10-11  7:50   ` Heiko Stübner
2019-10-14 19:56     ` Jarkko Sakkinen
2019-10-15 20:23       ` Heiko Stuebner
2019-10-16 15:27         ` Jarkko Sakkinen

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