iommu.lists.linux-foundation.org archive mirror
 help / color / mirror / Atom feed
From: Lu Baolu <baolu.lu@linux.intel.com>
To: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>,
	Joerg Roedel <joro@8bytes.org>, Tom Murphy <murphyt7@tcd.ie>,
	David Woodhouse <dwmw2@infradead.org>,
	Christoph Hellwig <hch@infradead.org>
Cc: linux-kernel@vger.kernel.org, Intel-gfx@lists.freedesktop.org,
	Ashok Raj <ashok.raj@intel.com>,
	iommu@lists.linux-foundation.org
Subject: Re: [PATCH v3 0/6] Convert the intel iommu driver to the dma-iommu api
Date: Tue, 15 Sep 2020 09:47:24 +0800	[thread overview]
Message-ID: <001f4446-7c43-9832-42d8-55dc4a13c2ae@linux.intel.com> (raw)
In-Reply-To: <51a1baec-48d1-c0ac-181b-1fba92aa428d@linux.intel.com>

Hi Tvrtko,

On 9/14/20 4:04 PM, Tvrtko Ursulin wrote:
> 
> Hi,
> 
> On 12/09/2020 04:21, Lu Baolu wrote:
>> Tom Murphy has almost done all the work. His latest patch series was
>> posted here.
>>
>> https://lore.kernel.org/linux-iommu/20200903201839.7327-1-murphyt7@tcd.ie/
>>
>> Thanks a lot!
>>
>> This series is a follow-up with below changes:
>>
>> 1. Add a quirk for the i915 driver issue described in Tom's cover
>> letter.
> 
> Last week I have copied you on an i915 series which appears to remove the need for this quirk. so if we get those i915 patches reviewed and merged, do you still want to pursue this quirk?

It's up to the graphic guys. I don't know the details in i915 driver.
I don't think my tests could cover all cases.

> 
>> 2. Fix several bugs in patch "iommu: Allow the dma-iommu api to use
>> bounce buffers" to make the bounce buffer work for untrusted devices.
>> 3. Several cleanups in iommu/vt-d driver after the conversion.
> 
> With the previous version of the series I hit a problem on Ivybridge where apparently the dma engine width is not respected. At least that is my layman interpretation of the errors. From the older thread:
> 
> <3> [209.526605] DMAR: intel_iommu_map: iommu width (39) is not sufficient for the mapped address (ffff008000)
> 
> Relevant iommu boot related messages are:
> 
> <6>[    0.184234] DMAR: Host address width 36
> <6>[    0.184245] DMAR: DRHD base: 0x000000fed90000 flags: 0x0
> <6>[    0.184288] DMAR: dmar0: reg_base_addr fed90000 ver 1:0 cap c0000020e60262 ecap f0101a
> <6>[    0.184308] DMAR: DRHD base: 0x000000fed91000 flags: 0x1
> <6>[    0.184337] DMAR: dmar1: reg_base_addr fed91000 ver 1:0 cap c9008020660262 ecap f0105a
> <6>[    0.184357] DMAR: RMRR base: 0x000000d8d28000 end: 0x000000d8d46fff
> <6>[    0.184377] DMAR: RMRR base: 0x000000db000000 end: 0x000000df1fffff
> <6>[    0.184398] DMAR-IR: IOAPIC id 2 under DRHD base  0xfed91000 IOMMU 1
> <6>[    0.184414] DMAR-IR: HPET id 0 under DRHD base 0xfed91000
> <6>[    0.184428] DMAR-IR: Queued invalidation will be enabled to support x2apic and Intr-remapping.
> <6>[    0.185173] DMAR-IR: Enabled IRQ remapping in x2apic mode
> 
> <6>[    0.878934] DMAR: No ATSR found
> <6>[    0.878966] DMAR: dmar0: Using Queued invalidation
> <6>[    0.879007] DMAR: dmar1: Using Queued invalidation
> 
> <6>[    0.915032] DMAR: Intel(R) Virtualization Technology for Directed I/O
> <6>[    0.915060] PCI-DMA: Using software bounce buffering for IO (SWIOTLB)
> <6>[    0.915084] software IO TLB: mapped [mem 0xc80d4000-0xcc0d4000] (64MB)
> 
> (Full boot log at https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7054/fi-ivb-3770/boot0.txt, failures at https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7054/fi-ivb-3770/igt@i915_selftest@live@blt.html.)
> 
> Does this look familiar or at least plausible to you? Is this something your new series has fixed?

This happens during attaching a domain to device. It has nothing to do
with this patch series. I will look into this issue, but not in this
email thread context.

Best regards,
baolu

> 
> Regards,
> 
> Tvrtko
> 
>>
>> Please review and test.
>>
>> Best regards,
>> baolu
>>
>> Lu Baolu (2):
>>     iommu: Add quirk for Intel graphic devices in map_sg
>>     iommu/vt-d: Cleanup after converting to dma-iommu ops
>>
>> Tom Murphy (4):
>>     iommu: Handle freelists when using deferred flushing in iommu drivers
>>     iommu: Add iommu_dma_free_cpu_cached_iovas()
>>     iommu: Allow the dma-iommu api to use bounce buffers
>>     iommu/vt-d: Convert intel iommu driver to the iommu ops
>>
>>    .../admin-guide/kernel-parameters.txt         |   5 -
>>    drivers/iommu/dma-iommu.c                     | 229 ++++-
>>    drivers/iommu/intel/Kconfig                   |   1 +
>>    drivers/iommu/intel/iommu.c                   | 885 +++---------------
>>    include/linux/dma-iommu.h                     |   8 +
>>    include/linux/iommu.h                         |   1 +
>>    6 files changed, 323 insertions(+), 806 deletions(-)
>>
_______________________________________________
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu

  reply	other threads:[~2020-09-15  1:53 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-09-12  3:21 Lu Baolu
2020-09-12  3:21 ` [PATCH v3 1/6] iommu: Handle freelists when using deferred flushing in iommu drivers Lu Baolu
2020-09-12  3:21 ` [PATCH v3 2/6] iommu: Add iommu_dma_free_cpu_cached_iovas() Lu Baolu
2020-09-12  3:21 ` [PATCH v3 3/6] iommu: Allow the dma-iommu api to use bounce buffers Lu Baolu
2020-09-12  3:21 ` [PATCH v3 4/6] iommu: Add quirk for Intel graphic devices in map_sg Lu Baolu
2020-09-12  3:21 ` [PATCH v3 5/6] iommu/vt-d: Convert intel iommu driver to the iommu ops Lu Baolu
2020-09-12  3:22 ` [PATCH v3 6/6] iommu/vt-d: Cleanup after converting to dma-iommu ops Lu Baolu
2020-09-14  8:04 ` [PATCH v3 0/6] Convert the intel iommu driver to the dma-iommu api Tvrtko Ursulin
2020-09-15  1:47   ` Lu Baolu [this message]
2020-09-15  8:31     ` Tvrtko Ursulin
2020-09-22 11:05       ` Robin Murphy
2020-09-23  5:38         ` Lu Baolu
2020-09-24  2:35       ` Lu Baolu
2020-09-18 20:47 ` [Intel-gfx] " Logan Gunthorpe
2020-09-20  6:36   ` Lu Baolu
2020-09-21 15:48     ` Logan Gunthorpe
2020-09-22  0:24       ` Lu Baolu
2020-09-22 15:38         ` Logan Gunthorpe
2020-09-22  9:51   ` Robin Murphy
2020-09-22 18:45     ` Logan Gunthorpe

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=001f4446-7c43-9832-42d8-55dc4a13c2ae@linux.intel.com \
    --to=baolu.lu@linux.intel.com \
    --cc=Intel-gfx@lists.freedesktop.org \
    --cc=ashok.raj@intel.com \
    --cc=dwmw2@infradead.org \
    --cc=hch@infradead.org \
    --cc=iommu@lists.linux-foundation.org \
    --cc=joro@8bytes.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=murphyt7@tcd.ie \
    --cc=tvrtko.ursulin@linux.intel.com \
    --subject='Re: [PATCH v3 0/6] Convert the intel iommu driver to the dma-iommu api' \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).