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From: Yong Wu <yong.wu@mediatek.com>
To: Tomasz Figa <tfiga@chromium.org>
Cc: youlin.pei@mediatek.com, devicetree@vger.kernel.org,
	Nicolas Boichat <drinkcat@chromium.org>,
	srv_heupstream@mediatek.com, Tomasz Figa <tfiga@google.com>,
	Will Deacon <will@kernel.org>,
	linux-kernel@vger.kernel.org, Evan Green <evgreen@chromium.org>,
	chao.hao@mediatek.com, iommu@lists.linux-foundation.org,
	Rob Herring <robh+dt@kernel.org>,
	linux-mediatek@lists.infradead.org,
	Krzysztof Kozlowski <krzk@kernel.org>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	anan.sun@mediatek.com, Robin Murphy <robin.murphy@arm.com>,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v5 06/27] dt-bindings: mediatek: Add binding for mt8192 IOMMU
Date: Thu, 24 Dec 2020 19:35:13 +0800	[thread overview]
Message-ID: <1608809713.26323.262.camel@mhfsdcap03> (raw)
In-Reply-To: <X+L9XpkoII7tw/tX@chromium.org>

On Wed, 2020-12-23 at 17:18 +0900, Tomasz Figa wrote:
> On Wed, Dec 09, 2020 at 04:00:41PM +0800, Yong Wu wrote:
> > This patch adds decriptions for mt8192 IOMMU and SMI.
> > 
> > mt8192 also is MTK IOMMU gen2 which uses ARM Short-Descriptor translation
> > table format. The M4U-SMI HW diagram is as below:
> > 
> >                           EMI
> >                            |
> >                           M4U
> >                            |
> >                       ------------
> >                        SMI Common
> >                       ------------
> >                            |
> >   +-------+------+------+----------------------+-------+
> >   |       |      |      |       ......         |       |
> >   |       |      |      |                      |       |
> > larb0   larb1  larb2  larb4     ......      larb19   larb20
> > disp0   disp1   mdp    vdec                   IPE      IPE
> > 
> > All the connections are HW fixed, SW can NOT adjust it.
> > 
> > mt8192 M4U support 0~16GB iova range. we preassign different engines
> > into different iova ranges:
> > 
> > domain-id  module     iova-range                  larbs
> >    0       disp        0 ~ 4G                      larb0/1
> >    1       vcodec      4G ~ 8G                     larb4/5/7
> >    2       cam/mdp     8G ~ 12G             larb2/9/11/13/14/16/17/18/19/20
> 
> Why do we preassign these addresses in DT? Shouldn't it be a user's or
> integrator's decision to split the 16 GB address range into sub-ranges
> and define which larbs those sub-ranges are shared with?

The problem is that we can't split the 16GB range with the larb as unit.
The example is the below ccu0(larb13 port9/10) is a independent
range(domain), the others ports in larb13 is in another domain.

disp/vcodec/cam/mdp don't have special iova requirement, they could
access any range. vcodec also can locate 8G~12G. it don't care about
where its iova locate. here I preassign like this following with our
internal project setting.

Why set this in DT?, this is only for simplifying the code. Assume we
put it in the platform data. We have up to 32 larbs, each larb has up to
32 ports, each port may be in different iommu domains. we should have a
big array for this..however we only use a macro to get the domain in the
DT method.

When replying this mail, I happen to see there is a "dev->dev_range_map"
which has "dma-range" information, I think I could use this value to get
which domain the device belong to. then no need put domid in DT. I will
test this.

Thanks.
> 
> Best regards,
> Tomasz
> 
> >    3       CCU0    0x4000_0000 ~ 0x43ff_ffff     larb13: port 9/10
> >    4       CCU1    0x4400_0000 ~ 0x47ff_ffff     larb14: port 4/5
> > 
> > The iova range for CCU0/1(camera control unit) is HW requirement.
> > 
> > Signed-off-by: Yong Wu <yong.wu@mediatek.com>
> > Reviewed-by: Rob Herring <robh@kernel.org>
> > ---
> >  .../bindings/iommu/mediatek,iommu.yaml        |  18 +-
> >  include/dt-bindings/memory/mt8192-larb-port.h | 240 ++++++++++++++++++
> >  2 files changed, 257 insertions(+), 1 deletion(-)
> >  create mode 100644 include/dt-bindings/memory/mt8192-larb-port.h
> > 
[snip]
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  reply	other threads:[~2020-12-24 11:35 UTC|newest]

Thread overview: 56+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-12-09  8:00 [PATCH v5 00/27] MT8192 IOMMU support Yong Wu
2020-12-09  8:00 ` [PATCH v5 01/27] dt-bindings: iommu: mediatek: Convert IOMMU to DT schema Yong Wu
2020-12-09  8:00 ` [PATCH v5 02/27] dt-bindings: memory: mediatek: Add a common larb-port header file Yong Wu
2020-12-09  8:00 ` [PATCH v5 03/27] dt-bindings: memory: mediatek: Extend LARB_NR_MAX to 32 Yong Wu
2020-12-09  8:00 ` [PATCH v5 04/27] dt-bindings: memory: mediatek: Add domain definition Yong Wu
2020-12-23  8:15   ` Tomasz Figa
2020-12-24 11:26     ` Yong Wu
2021-01-13  5:22       ` Tomasz Figa
2020-12-09  8:00 ` [PATCH v5 05/27] dt-bindings: memory: mediatek: Rename header guard for SMI header file Yong Wu
2020-12-09 12:12   ` Krzysztof Kozlowski
2020-12-11  3:26   ` Rob Herring
2020-12-09  8:00 ` [PATCH v5 06/27] dt-bindings: mediatek: Add binding for mt8192 IOMMU Yong Wu
2020-12-09 12:13   ` Krzysztof Kozlowski
2020-12-23  8:18   ` Tomasz Figa
2020-12-24 11:35     ` Yong Wu [this message]
2021-01-13  5:30       ` Tomasz Figa
2021-01-13  6:45         ` Yong Wu
2021-01-20  4:15           ` Tomasz Figa
2021-01-20  7:07             ` Yong Wu
2021-01-25  4:18               ` Tomasz Figa
2021-01-25  7:33                 ` Yong Wu
2021-01-29 11:45                   ` Tomasz Figa
2021-02-01  5:36                     ` Yong Wu
2021-02-01 10:44                     ` Robin Murphy
2020-12-09  8:00 ` [PATCH v5 07/27] iommu/mediatek: Use the common mtk-smi-larb-port.h Yong Wu
2020-12-09  8:00 ` [PATCH v5 08/27] iommu/io-pgtable-arm-v7s: Use ias to check the valid iova in unmap Yong Wu
2020-12-09  8:00 ` [PATCH v5 09/27] iommu/io-pgtable-arm-v7s: Extend PA34 for MediaTek Yong Wu
2020-12-23  8:20   ` Tomasz Figa
2020-12-29 11:17     ` Yong Wu
2020-12-09  8:00 ` [PATCH v5 10/27] iommu/io-pgtable-arm-v7s: Clarify LVL_SHIFT/BITS macro Yong Wu
2020-12-09  8:00 ` [PATCH v5 11/27] iommu/io-pgtable-arm-v7s: Add cfg as a param in some macros Yong Wu
2020-12-09  8:00 ` [PATCH v5 12/27] iommu/io-pgtable-arm-v7s: Quad lvl1 pgtable for MediaTek Yong Wu
2020-12-09  8:00 ` [PATCH v5 13/27] iommu/mediatek: Add a flag for iova_34 bit case Yong Wu
2020-12-09  8:00 ` [PATCH v5 14/27] iommu/mediatek: Move hw_init into attach_device Yong Wu
2020-12-09  8:00 ` [PATCH v5 15/27] iommu/mediatek: Add fail handle for sysfs_add and device_register Yong Wu
2020-12-23  8:25   ` Tomasz Figa
2020-12-29 11:00     ` Yong Wu
2020-12-09  8:00 ` [PATCH v5 16/27] iommu/mediatek: Add device link for smi-common and m4u Yong Wu
2020-12-23  8:29   ` Tomasz Figa
2020-12-29 11:25     ` Yong Wu
2020-12-09  8:00 ` [PATCH v5 17/27] iommu/mediatek: Add pm runtime callback Yong Wu
2020-12-23  8:32   ` Tomasz Figa
2020-12-29 11:06     ` Yong Wu
2020-12-09  8:00 ` [PATCH v5 18/27] iommu/mediatek: Add power-domain operation Yong Wu
2020-12-23  8:36   ` Tomasz Figa
2020-12-29 11:06     ` Yong Wu
2021-01-08  9:54       ` Tomasz Figa
2020-12-09  8:00 ` [PATCH v5 19/27] iommu/mediatek: Add iova reserved function Yong Wu
2020-12-09  8:00 ` [PATCH v5 20/27] iommu/mediatek: Add single domain Yong Wu
2020-12-09  8:00 ` [PATCH v5 21/27] iommu/mediatek: Support master use iova over 32bit Yong Wu
2020-12-09  8:00 ` [PATCH v5 22/27] iommu/mediatek: Support up to 34bit iova in tlb flush Yong Wu
2020-12-09  8:00 ` [PATCH v5 23/27] iommu/mediatek: Support report iova 34bit translation fault in ISR Yong Wu
2020-12-09  8:00 ` [PATCH v5 24/27] iommu/mediatek: Add support for multi domain Yong Wu
2020-12-09  8:01 ` [PATCH v5 25/27] iommu/mediatek: Adjust the structure Yong Wu
2020-12-09  8:01 ` [PATCH v5 26/27] iommu/mediatek: Add mt8192 support Yong Wu
2020-12-09  8:01 ` [PATCH v5 27/27] MAINTAINERS: Add entry for MediaTek IOMMU Yong Wu

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