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From: Yong Wu <yong.wu@mediatek.com>
To: Joerg Roedel <joro@8bytes.org>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	 Rob Herring <robh+dt@kernel.org>, Will Deacon <will@kernel.org>,
	Robin Murphy <robin.murphy@arm.com>
Cc: youlin.pei@mediatek.com, devicetree@vger.kernel.org,
	Nicolas Boichat <drinkcat@chromium.org>,
	srv_heupstream@mediatek.com, chao.hao@mediatek.com,
	linux-kernel@vger.kernel.org, Evan Green <evgreen@chromium.org>,
	Tomasz Figa <tfiga@google.com>,
	iommu@lists.linux-foundation.org,
	linux-mediatek@lists.infradead.org,
	Krzysztof Kozlowski <krzk@kernel.org>,
	anan.sun@mediatek.com, linux-arm-kernel@lists.infradead.org
Subject: [PATCH v5 10/27] iommu/io-pgtable-arm-v7s: Clarify LVL_SHIFT/BITS macro
Date: Wed, 9 Dec 2020 16:00:45 +0800	[thread overview]
Message-ID: <20201209080102.26626-11-yong.wu@mediatek.com> (raw)
In-Reply-To: <20201209080102.26626-1-yong.wu@mediatek.com>

The current _ARM_V7S_LVL_BITS/ARM_V7S_LVL_SHIFT use a formula to calculate
the corresponding value for level1 and level2 to pretend the code sane.
Actually their level1 and level2 values are different from each other.
This patch only clarify the two macro. No functional change.

Suggested-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Yong Wu <yong.wu@mediatek.com>
Reviewed-by: Robin Murphy <robin.murphy@arm.com>
---
 drivers/iommu/io-pgtable-arm-v7s.c | 8 +++-----
 1 file changed, 3 insertions(+), 5 deletions(-)

diff --git a/drivers/iommu/io-pgtable-arm-v7s.c b/drivers/iommu/io-pgtable-arm-v7s.c
index 4d0aa079470f..58cc201c10a3 100644
--- a/drivers/iommu/io-pgtable-arm-v7s.c
+++ b/drivers/iommu/io-pgtable-arm-v7s.c
@@ -44,13 +44,11 @@
 
 /*
  * We have 32 bits total; 12 bits resolved at level 1, 8 bits at level 2,
- * and 12 bits in a page. With some carefully-chosen coefficients we can
- * hide the ugly inconsistencies behind these macros and at least let the
- * rest of the code pretend to be somewhat sane.
+ * and 12 bits in a page.
  */
 #define ARM_V7S_ADDR_BITS		32
-#define _ARM_V7S_LVL_BITS(lvl)		(16 - (lvl) * 4)
-#define ARM_V7S_LVL_SHIFT(lvl)		(ARM_V7S_ADDR_BITS - (4 + 8 * (lvl)))
+#define _ARM_V7S_LVL_BITS(lvl)		((lvl) == 1 ? 12 : 8)
+#define ARM_V7S_LVL_SHIFT(lvl)		((lvl) == 1 ? 20 : 12)
 #define ARM_V7S_TABLE_SHIFT		10
 
 #define ARM_V7S_PTES_PER_LVL(lvl)	(1 << _ARM_V7S_LVL_BITS(lvl))
-- 
2.18.0

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  parent reply	other threads:[~2020-12-09  8:03 UTC|newest]

Thread overview: 56+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-12-09  8:00 [PATCH v5 00/27] MT8192 IOMMU support Yong Wu
2020-12-09  8:00 ` [PATCH v5 01/27] dt-bindings: iommu: mediatek: Convert IOMMU to DT schema Yong Wu
2020-12-09  8:00 ` [PATCH v5 02/27] dt-bindings: memory: mediatek: Add a common larb-port header file Yong Wu
2020-12-09  8:00 ` [PATCH v5 03/27] dt-bindings: memory: mediatek: Extend LARB_NR_MAX to 32 Yong Wu
2020-12-09  8:00 ` [PATCH v5 04/27] dt-bindings: memory: mediatek: Add domain definition Yong Wu
2020-12-23  8:15   ` Tomasz Figa
2020-12-24 11:26     ` Yong Wu
2021-01-13  5:22       ` Tomasz Figa
2020-12-09  8:00 ` [PATCH v5 05/27] dt-bindings: memory: mediatek: Rename header guard for SMI header file Yong Wu
2020-12-09 12:12   ` Krzysztof Kozlowski
2020-12-11  3:26   ` Rob Herring
2020-12-09  8:00 ` [PATCH v5 06/27] dt-bindings: mediatek: Add binding for mt8192 IOMMU Yong Wu
2020-12-09 12:13   ` Krzysztof Kozlowski
2020-12-23  8:18   ` Tomasz Figa
2020-12-24 11:35     ` Yong Wu
2021-01-13  5:30       ` Tomasz Figa
2021-01-13  6:45         ` Yong Wu
2021-01-20  4:15           ` Tomasz Figa
2021-01-20  7:07             ` Yong Wu
2021-01-25  4:18               ` Tomasz Figa
2021-01-25  7:33                 ` Yong Wu
2021-01-29 11:45                   ` Tomasz Figa
2021-02-01  5:36                     ` Yong Wu
2021-02-01 10:44                     ` Robin Murphy
2020-12-09  8:00 ` [PATCH v5 07/27] iommu/mediatek: Use the common mtk-smi-larb-port.h Yong Wu
2020-12-09  8:00 ` [PATCH v5 08/27] iommu/io-pgtable-arm-v7s: Use ias to check the valid iova in unmap Yong Wu
2020-12-09  8:00 ` [PATCH v5 09/27] iommu/io-pgtable-arm-v7s: Extend PA34 for MediaTek Yong Wu
2020-12-23  8:20   ` Tomasz Figa
2020-12-29 11:17     ` Yong Wu
2020-12-09  8:00 ` Yong Wu [this message]
2020-12-09  8:00 ` [PATCH v5 11/27] iommu/io-pgtable-arm-v7s: Add cfg as a param in some macros Yong Wu
2020-12-09  8:00 ` [PATCH v5 12/27] iommu/io-pgtable-arm-v7s: Quad lvl1 pgtable for MediaTek Yong Wu
2020-12-09  8:00 ` [PATCH v5 13/27] iommu/mediatek: Add a flag for iova_34 bit case Yong Wu
2020-12-09  8:00 ` [PATCH v5 14/27] iommu/mediatek: Move hw_init into attach_device Yong Wu
2020-12-09  8:00 ` [PATCH v5 15/27] iommu/mediatek: Add fail handle for sysfs_add and device_register Yong Wu
2020-12-23  8:25   ` Tomasz Figa
2020-12-29 11:00     ` Yong Wu
2020-12-09  8:00 ` [PATCH v5 16/27] iommu/mediatek: Add device link for smi-common and m4u Yong Wu
2020-12-23  8:29   ` Tomasz Figa
2020-12-29 11:25     ` Yong Wu
2020-12-09  8:00 ` [PATCH v5 17/27] iommu/mediatek: Add pm runtime callback Yong Wu
2020-12-23  8:32   ` Tomasz Figa
2020-12-29 11:06     ` Yong Wu
2020-12-09  8:00 ` [PATCH v5 18/27] iommu/mediatek: Add power-domain operation Yong Wu
2020-12-23  8:36   ` Tomasz Figa
2020-12-29 11:06     ` Yong Wu
2021-01-08  9:54       ` Tomasz Figa
2020-12-09  8:00 ` [PATCH v5 19/27] iommu/mediatek: Add iova reserved function Yong Wu
2020-12-09  8:00 ` [PATCH v5 20/27] iommu/mediatek: Add single domain Yong Wu
2020-12-09  8:00 ` [PATCH v5 21/27] iommu/mediatek: Support master use iova over 32bit Yong Wu
2020-12-09  8:00 ` [PATCH v5 22/27] iommu/mediatek: Support up to 34bit iova in tlb flush Yong Wu
2020-12-09  8:00 ` [PATCH v5 23/27] iommu/mediatek: Support report iova 34bit translation fault in ISR Yong Wu
2020-12-09  8:00 ` [PATCH v5 24/27] iommu/mediatek: Add support for multi domain Yong Wu
2020-12-09  8:01 ` [PATCH v5 25/27] iommu/mediatek: Adjust the structure Yong Wu
2020-12-09  8:01 ` [PATCH v5 26/27] iommu/mediatek: Add mt8192 support Yong Wu
2020-12-09  8:01 ` [PATCH v5 27/27] MAINTAINERS: Add entry for MediaTek IOMMU Yong Wu

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