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From: Konrad Dybcio <konrad.dybcio@somainline.org>
To: ~postmarketos/upstreaming@lists.sr.ht,
	linux-arm-msm@vger.kernel.org, bjorn.andersson@linaro.org,
	linux-arm-kernel@lists.infradead.org,
	iommu@lists.linux-foundation.org
Cc: marijn.suijten@somainline.org,
	Konrad Dybcio <konrad.dybcio@somainline.org>,
	martin.botka@somainline.org, jamipkettunen@somainline.org,
	angelogioacchino.delregno@somainline.org
Subject: [PATCH 0/6] Fix and extend Qualcomm IOMMU support
Date: Fri, 27 May 2022 23:28:55 +0200	[thread overview]
Message-ID: <20220527212901.29268-1-konrad.dybcio@somainline.org> (raw)

Due to Qualcomm's software solutions, genius or otherwise, the IOMMUs on
pre-msm8998-and-sdm630 SoCs are flawed beyond reason, and conviniently
it is all due to an (almost in all cases) irreplaceable hypervisor and TZ
stack. As end users and developers, we have no choice but to adapt to that
and follow whatever the IOMMUs expect.

This series fixes and improves the existing support (adjusts the code flow
to make sure things are written in correct order and adds a way to
properly (i.e. in compliance with the firmware's expectations) reset the
IOMMUs) and extends it with features for the SoCs that came near the end
of an era of what we call "qcom_iommu" upstream, namely 8952 family
(8917, 8937, 8952, 8956/76, 8953 and possibly more) (Aarch64 pagetables
and secured QCIOMMUv2/QCIOMMU_500 ctxs)
and at the same time builds another milestone in getting msm8974/94 IOMMU
support that has been in the works for something like 7 years, and never
got upstreamed in the end (we'll get it one day, eventually...).

The dt-bindings are NOT converted to YAML as a part of this series, that
will come in a later patchset.


AngeloGioacchino Del Regno (6):
  iommu/qcom: Use the asid read from device-tree if specified
  iommu/qcom: Write TCR before TTBRs to fix ASID access behavior
  iommu/qcom: Properly reset the IOMMU context
  iommu/qcom: Add support for AArch64 IOMMU pagetables
  iommu/qcom: Index contexts by asid number to allow asid 0
  iommu/qcom: Add support for QCIOMMUv2 and QCIOMMU-500 secured contexts

 .../devicetree/bindings/iommu/qcom,iommu.txt  |   5 +
 drivers/iommu/arm/arm-smmu/qcom_iommu.c       | 137 ++++++++++++++----
 2 files changed, 114 insertions(+), 28 deletions(-)

-- 
2.36.1

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             reply	other threads:[~2022-05-27 21:39 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-27 21:28 Konrad Dybcio [this message]
2022-05-27 21:28 ` [PATCH 1/6] iommu/qcom: Use the asid read from device-tree if specified Konrad Dybcio
2022-05-31 15:46   ` Will Deacon
2022-05-31 16:15     ` Rob Clark
2022-05-31 16:19       ` Will Deacon
2022-05-31 20:57         ` Rob Clark
2022-06-03 18:03           ` Konrad Dybcio
2022-06-08 10:25             ` AngeloGioacchino Del Regno
2022-05-27 21:28 ` [PATCH 2/6] iommu/qcom: Write TCR before TTBRs to fix ASID access behavior Konrad Dybcio
2022-05-31 15:55   ` Will Deacon
2022-05-31 16:26     ` Robin Murphy
2022-06-05 22:06     ` Marijn Suijten
2022-06-08 10:27       ` AngeloGioacchino Del Regno
2022-06-08 10:54         ` Robin Murphy
2022-06-08 11:03           ` AngeloGioacchino Del Regno
2022-05-27 21:28 ` [PATCH 3/6] iommu/qcom: Properly reset the IOMMU context Konrad Dybcio
2022-05-27 21:28 ` [PATCH 4/6] iommu/qcom: Add support for AArch64 IOMMU pagetables Konrad Dybcio
2022-05-28  2:03   ` kernel test robot
2022-06-02 14:17   ` Rob Herring
2022-05-27 21:29 ` [PATCH 5/6] iommu/qcom: Index contexts by asid number to allow asid 0 Konrad Dybcio
2022-06-03 15:14   ` Brian Masney
2022-05-27 21:29 ` [PATCH 6/6] iommu/qcom: Add support for QCIOMMUv2 and QCIOMMU-500 secured contexts Konrad Dybcio

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