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From: Konrad Dybcio <konrad.dybcio@somainline.org>
To: ~postmarketos/upstreaming@lists.sr.ht,
	linux-arm-msm@vger.kernel.org, bjorn.andersson@linaro.org,
	linux-arm-kernel@lists.infradead.org,
	iommu@lists.linux-foundation.org
Cc: devicetree@vger.kernel.org, Robin Murphy <robin.murphy@arm.com>,
	Konrad Dybcio <konrad.dybcio@somainline.org>,
	linux-kernel@vger.kernel.org, jamipkettunen@somainline.org,
	Rob Herring <robh+dt@kernel.org>, Andy Gross <agross@kernel.org>,
	martin.botka@somainline.org,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	angelogioacchino.delregno@somainline.org,
	marijn.suijten@somainline.org, Will Deacon <will@kernel.org>
Subject: [PATCH 1/6] iommu/qcom: Use the asid read from device-tree if specified
Date: Fri, 27 May 2022 23:28:56 +0200	[thread overview]
Message-ID: <20220527212901.29268-2-konrad.dybcio@somainline.org> (raw)
In-Reply-To: <20220527212901.29268-1-konrad.dybcio@somainline.org>

From: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>

As specified in this driver, the context banks are 0x1000 apart.
Problem is that sometimes the context number (our asid) does not
match this logic and we end up using the wrong one: this starts
being a problem in the case that we need to send TZ commands
to do anything on a specific context.

For this reason, read the ASID from the DT if the property
"qcom,ctx-num" is present on the IOMMU context node.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
---
 .../devicetree/bindings/iommu/qcom,iommu.txt   |  1 +
 drivers/iommu/arm/arm-smmu/qcom_iommu.c        | 18 +++++++++++++++---
 2 files changed, 16 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/iommu/qcom,iommu.txt b/Documentation/devicetree/bindings/iommu/qcom,iommu.txt
index 059139abce35..ba0b77889f02 100644
--- a/Documentation/devicetree/bindings/iommu/qcom,iommu.txt
+++ b/Documentation/devicetree/bindings/iommu/qcom,iommu.txt
@@ -46,6 +46,7 @@ to non-secure vs secure interrupt line.
                      for routing of context bank irq's to secure vs non-
                      secure lines.  (Ie. if the iommu contains secure
                      context banks)
+- qcom,ctx-num     : The number associated to the context bank
 
 
 ** Examples:
diff --git a/drivers/iommu/arm/arm-smmu/qcom_iommu.c b/drivers/iommu/arm/arm-smmu/qcom_iommu.c
index 4c077c38fbd6..1728d4d7fe25 100644
--- a/drivers/iommu/arm/arm-smmu/qcom_iommu.c
+++ b/drivers/iommu/arm/arm-smmu/qcom_iommu.c
@@ -566,7 +566,8 @@ static int qcom_iommu_of_xlate(struct device *dev, struct of_phandle_args *args)
 	 * index into qcom_iommu->ctxs:
 	 */
 	if (WARN_ON(asid < 1) ||
-	    WARN_ON(asid > qcom_iommu->num_ctxs)) {
+	    WARN_ON(asid > qcom_iommu->num_ctxs) ||
+	    WARN_ON(qcom_iommu->ctxs[asid - 1] == NULL)) {
 		put_device(&iommu_pdev->dev);
 		return -EINVAL;
 	}
@@ -654,7 +655,8 @@ static int qcom_iommu_sec_ptbl_init(struct device *dev)
 
 static int get_asid(const struct device_node *np)
 {
-	u32 reg;
+	u32 reg, val;
+	int asid;
 
 	/* read the "reg" property directly to get the relative address
 	 * of the context bank, and calculate the asid from that:
@@ -662,7 +664,17 @@ static int get_asid(const struct device_node *np)
 	if (of_property_read_u32_index(np, "reg", 0, &reg))
 		return -ENODEV;
 
-	return reg / 0x1000;      /* context banks are 0x1000 apart */
+	/*
+	 * Context banks are 0x1000 apart but, in some cases, the ASID
+	 * number doesn't match to this logic and needs to be passed
+	 * from the DT configuration explicitly.
+	 */
+	if (of_property_read_u32(np, "qcom,ctx-num", &val))
+		asid = reg / 0x1000;
+	else
+		asid = val;
+
+	return asid;
 }
 
 static int qcom_iommu_ctx_probe(struct platform_device *pdev)
-- 
2.36.1

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  reply	other threads:[~2022-05-27 21:39 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-27 21:28 [PATCH 0/6] Fix and extend Qualcomm IOMMU support Konrad Dybcio
2022-05-27 21:28 ` Konrad Dybcio [this message]
2022-05-31 15:46   ` [PATCH 1/6] iommu/qcom: Use the asid read from device-tree if specified Will Deacon
2022-05-31 16:15     ` Rob Clark
2022-05-31 16:19       ` Will Deacon
2022-05-31 20:57         ` Rob Clark
2022-06-03 18:03           ` Konrad Dybcio
2022-06-08 10:25             ` AngeloGioacchino Del Regno
2022-05-27 21:28 ` [PATCH 2/6] iommu/qcom: Write TCR before TTBRs to fix ASID access behavior Konrad Dybcio
2022-05-31 15:55   ` Will Deacon
2022-05-31 16:26     ` Robin Murphy
2022-06-05 22:06     ` Marijn Suijten
2022-06-08 10:27       ` AngeloGioacchino Del Regno
2022-06-08 10:54         ` Robin Murphy
2022-06-08 11:03           ` AngeloGioacchino Del Regno
2022-05-27 21:28 ` [PATCH 3/6] iommu/qcom: Properly reset the IOMMU context Konrad Dybcio
2022-05-27 21:28 ` [PATCH 4/6] iommu/qcom: Add support for AArch64 IOMMU pagetables Konrad Dybcio
2022-05-28  2:03   ` kernel test robot
2022-06-02 14:17   ` Rob Herring
2022-05-27 21:29 ` [PATCH 5/6] iommu/qcom: Index contexts by asid number to allow asid 0 Konrad Dybcio
2022-06-03 15:14   ` Brian Masney
2022-05-27 21:29 ` [PATCH 6/6] iommu/qcom: Add support for QCIOMMUv2 and QCIOMMU-500 secured contexts Konrad Dybcio
  -- strict thread matches above, loose matches on Subject: below --
2019-09-26 12:05 [PATCH 0/6] Add support for QCOM IOMMU v2 and 500 kholk11
2019-09-26 12:05 ` [PATCH 1/6] iommu/qcom: Use the asid read from device-tree if specified kholk11
2019-09-26 20:06   ` Rob Clark

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