From: Rob Clark <robdclark@gmail.com>
To: AngeloGioacchino Del Regno <kholk11@gmail.com>
Cc: "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@vger.kernel.org>,
marijns95@gmail.com,
linux-arm-msm <linux-arm-msm@vger.kernel.org>,
"list@263.net:IOMMU DRIVERS <iommu@lists.linux-foundation.org>,
Joerg Roedel <joro@8bytes.org>,
" <iommu@lists.linux-foundation.org>,
Andy Gross <agross@kernel.org>
Subject: Re: [PATCH 1/6] iommu/qcom: Use the asid read from device-tree if specified
Date: Thu, 26 Sep 2019 13:06:03 -0700 [thread overview]
Message-ID: <CAF6AEGs-+SGEJYA4FgGcMXVghLoXmDWbBMjS_BHm=7+9FfYv5g@mail.gmail.com> (raw)
In-Reply-To: <20190926120516.4981-2-kholk11@gmail.com>
On Thu, Sep 26, 2019 at 5:05 AM <kholk11@gmail.com> wrote:
>
> From: AngeloGioacchino Del Regno <kholk11@gmail.com>
>
> As specified in this driver, the context banks are 0x1000 apart.
> Problem is that sometimes the context number (our asid) does not
> match this logic and we end up using the wrong one: this starts
> being a problem in the case that we need to send TZ commands
> to do anything on a specific context.
>
> For this reason, read the ASID from the DT if the property
> "qcom,ctx-num" is present on the IOMMU context node.
>
> Signed-off-by: AngeloGioacchino Del Regno <kholk11@gmail.com>
> ---
> .../devicetree/bindings/iommu/qcom,iommu.txt | 1 +
> drivers/iommu/qcom_iommu.c | 17 ++++++++++++++---
> 2 files changed, 15 insertions(+), 3 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/iommu/qcom,iommu.txt b/Documentation/devicetree/bindings/iommu/qcom,iommu.txt
> index 059139abce35..98102b323196 100644
> --- a/Documentation/devicetree/bindings/iommu/qcom,iommu.txt
> +++ b/Documentation/devicetree/bindings/iommu/qcom,iommu.txt
> @@ -38,6 +38,7 @@ to non-secure vs secure interrupt line.
> - "qcom,msm-iommu-v1-sec" : secure context bank
> - reg : Base address and size of context bank within the iommu
> - interrupts : The context fault irq.
> + - qcom,ctx-num : The number associated to the context bank
I guess this should be more like:
+ and the following optional properties:
+ - qcom,ctx-num : The number associated to the context bank
(since this is an optional property)
BR,
-R
>
> ** Optional properties:
>
> diff --git a/drivers/iommu/qcom_iommu.c b/drivers/iommu/qcom_iommu.c
> index dadc707573a2..5837556af147 100644
> --- a/drivers/iommu/qcom_iommu.c
> +++ b/drivers/iommu/qcom_iommu.c
> @@ -557,7 +557,8 @@ static int qcom_iommu_of_xlate(struct device *dev, struct of_phandle_args *args)
> * index into qcom_iommu->ctxs:
> */
> if (WARN_ON(asid < 1) ||
> - WARN_ON(asid > qcom_iommu->num_ctxs))
> + WARN_ON(asid > qcom_iommu->num_ctxs) ||
> + WARN_ON(qcom_iommu->ctxs[asid - 1] == NULL))
> return -EINVAL;
>
> if (!fwspec->iommu_priv) {
> @@ -665,7 +666,8 @@ static int qcom_iommu_sec_ptbl_init(struct device *dev)
>
> static int get_asid(const struct device_node *np)
> {
> - u32 reg;
> + u32 reg, val;
> + int asid;
>
> /* read the "reg" property directly to get the relative address
> * of the context bank, and calculate the asid from that:
> @@ -673,7 +675,16 @@ static int get_asid(const struct device_node *np)
> if (of_property_read_u32_index(np, "reg", 0, ®))
> return -ENODEV;
>
> - return reg / 0x1000; /* context banks are 0x1000 apart */
> + /* Context banks are 0x1000 apart but, in some cases, the ASID
> + * number doesn't match to this logic and needs to be passed
> + * from the DT configuration explicitly.
> + */
> + if (of_property_read_u32(np, "qcom,ctx-num", &val))
> + asid = reg / 0x1000;
> + else
> + asid = val;
> +
> + return asid;
> }
>
> static int qcom_iommu_ctx_probe(struct platform_device *pdev)
> --
> 2.21.0
>
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next prev parent reply other threads:[~2019-09-26 20:06 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-09-26 12:05 [PATCH 0/6] Add support for QCOM IOMMU v2 and 500 kholk11
2019-09-26 12:05 ` [PATCH 1/6] iommu/qcom: Use the asid read from device-tree if specified kholk11
2019-09-26 20:06 ` Rob Clark [this message]
2019-09-26 12:05 ` [PATCH 2/6] iommu/qcom: Write TCR before TTBRs to fix ASID access behavior kholk11
2019-09-26 12:05 ` [PATCH 3/6] iommu/qcom: Properly reset the IOMMU context kholk11
2019-09-26 12:05 ` [PATCH 4/6] iommu/qcom: Add support for AArch64 IOMMU pagetables kholk11
2019-09-26 12:05 ` [PATCH 5/6] iommu/qcom: Index contexts by asid number to allow asid 0 kholk11
2019-09-26 12:05 ` [PATCH 6/6] iommu/qcom: Add support for QCIOMMUv2 and QCIOMMU-500 secured contexts kholk11
2022-05-27 21:28 [PATCH 0/6] Fix and extend Qualcomm IOMMU support Konrad Dybcio
2022-05-27 21:28 ` [PATCH 1/6] iommu/qcom: Use the asid read from device-tree if specified Konrad Dybcio
2022-05-31 15:46 ` Will Deacon
2022-05-31 16:15 ` Rob Clark
2022-05-31 16:19 ` Will Deacon
2022-05-31 20:57 ` Rob Clark
2022-06-03 18:03 ` Konrad Dybcio
2022-06-08 10:25 ` AngeloGioacchino Del Regno
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