* [PATCH 1/2] x86/apic: Allow reprogramming IOAPIC pins the first time for non-legacy IRQs
@ 2023-10-20 3:38 Mario Limonciello
2023-10-20 3:38 ` [PATCH 2/2] x86/irq/i8259: Configure null pic to have one legacy IRQ Mario Limonciello
2023-10-23 13:26 ` [PATCH 1/2] x86/apic: Allow reprogramming IOAPIC pins the first time for non-legacy IRQs Mario Limonciello
0 siblings, 2 replies; 3+ messages in thread
From: Mario Limonciello @ 2023-10-20 3:38 UTC (permalink / raw)
To: tglx, mingo, bp, dave.hansen
Cc: x86, hpa, linux-kernel, dlazar, hdegoede, Mario Limonciello
If the system is set up without legacy IRQs configured
acpi_register_gsi_ioapic() still needs to be able to program the IOAPIC
to match the values from _CRS which might not match what is already
programmed to the IOAPIC.
Reported-by: dlazar@gmail.com
Closes: https://bugzilla.kernel.org/show_bug.cgi?id=218003
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
---
arch/x86/kernel/apic/io_apic.c | 8 ++------
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index 00da6cf6b07d..27dd279dcc7b 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -928,12 +928,8 @@ static bool mp_check_pin_attr(int irq, struct irq_alloc_info *info)
{
struct mp_chip_data *data = irq_get_chip_data(irq);
- /*
- * setup_IO_APIC_irqs() programs all legacy IRQs with default trigger
- * and polarity attributes. So allow the first user to reprogram the
- * pin with real trigger and polarity attributes.
- */
- if (irq < nr_legacy_irqs() && data->count == 1) {
+ /* allow the first user to reprogram the pin with real trigger and polarity */
+ if (data->count == 1) {
if (info->ioapic.is_level != data->is_level)
mp_register_handler(irq, info->ioapic.is_level);
data->entry.is_level = data->is_level = info->ioapic.is_level;
--
2.34.1
^ permalink raw reply related [flat|nested] 3+ messages in thread
* [PATCH 2/2] x86/irq/i8259: Configure null pic to have one legacy IRQ
2023-10-20 3:38 [PATCH 1/2] x86/apic: Allow reprogramming IOAPIC pins the first time for non-legacy IRQs Mario Limonciello
@ 2023-10-20 3:38 ` Mario Limonciello
2023-10-23 13:26 ` [PATCH 1/2] x86/apic: Allow reprogramming IOAPIC pins the first time for non-legacy IRQs Mario Limonciello
1 sibling, 0 replies; 3+ messages in thread
From: Mario Limonciello @ 2023-10-20 3:38 UTC (permalink / raw)
To: tglx, mingo, bp, dave.hansen
Cc: x86, hpa, linux-kernel, dlazar, hdegoede, Mario Limonciello
If the system is configured with the NULL PIC, the system should
still be able to set up the timer IRQ at IRQ 0.
Link: https://lore.kernel.org/linux-kernel/878r7z4kb4.ffs@tglx/
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
---
arch/x86/kernel/i8259.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/x86/kernel/i8259.c b/arch/x86/kernel/i8259.c
index 43c1c24e934b..885687e64e4e 100644
--- a/arch/x86/kernel/i8259.c
+++ b/arch/x86/kernel/i8259.c
@@ -424,7 +424,7 @@ static int legacy_pic_probe(void)
}
struct legacy_pic null_legacy_pic = {
- .nr_legacy_irqs = 0,
+ .nr_legacy_irqs = 1,
.chip = &dummy_irq_chip,
.mask = legacy_pic_uint_noop,
.unmask = legacy_pic_uint_noop,
--
2.34.1
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH 1/2] x86/apic: Allow reprogramming IOAPIC pins the first time for non-legacy IRQs
2023-10-20 3:38 [PATCH 1/2] x86/apic: Allow reprogramming IOAPIC pins the first time for non-legacy IRQs Mario Limonciello
2023-10-20 3:38 ` [PATCH 2/2] x86/irq/i8259: Configure null pic to have one legacy IRQ Mario Limonciello
@ 2023-10-23 13:26 ` Mario Limonciello
1 sibling, 0 replies; 3+ messages in thread
From: Mario Limonciello @ 2023-10-23 13:26 UTC (permalink / raw)
To: tglx, mingo, bp, dave.hansen; +Cc: x86, hpa, linux-kernel, dlazar, hdegoede
On 10/19/2023 22:38, Mario Limonciello wrote:
> If the system is set up without legacy IRQs configured
> acpi_register_gsi_ioapic() still needs to be able to program the IOAPIC
> to match the values from _CRS which might not match what is already
> programmed to the IOAPIC.
>
> Reported-by: dlazar@gmail.com
> Closes: https://bugzilla.kernel.org/show_bug.cgi?id=218003
> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
> ---
> arch/x86/kernel/apic/io_apic.c | 8 ++------
> 1 file changed, 2 insertions(+), 6 deletions(-)
>
> diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
> index 00da6cf6b07d..27dd279dcc7b 100644
> --- a/arch/x86/kernel/apic/io_apic.c
> +++ b/arch/x86/kernel/apic/io_apic.c
> @@ -928,12 +928,8 @@ static bool mp_check_pin_attr(int irq, struct irq_alloc_info *info)
> {
> struct mp_chip_data *data = irq_get_chip_data(irq);
>
> - /*
> - * setup_IO_APIC_irqs() programs all legacy IRQs with default trigger
> - * and polarity attributes. So allow the first user to reprogram the
> - * pin with real trigger and polarity attributes.
> - */
> - if (irq < nr_legacy_irqs() && data->count == 1) {
> + /* allow the first user to reprogram the pin with real trigger and polarity */
> + if (data->count == 1) {
> if (info->ioapic.is_level != data->is_level)
> mp_register_handler(irq, info->ioapic.is_level);
> data->entry.is_level = data->is_level = info->ioapic.is_level;
David mentioned it on the Bugzilla, but for the benefit of those not
looking there, this series is confirmed to fix the problem.
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2023-10-23 13:27 UTC | newest]
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2023-10-20 3:38 [PATCH 1/2] x86/apic: Allow reprogramming IOAPIC pins the first time for non-legacy IRQs Mario Limonciello
2023-10-20 3:38 ` [PATCH 2/2] x86/irq/i8259: Configure null pic to have one legacy IRQ Mario Limonciello
2023-10-23 13:26 ` [PATCH 1/2] x86/apic: Allow reprogramming IOAPIC pins the first time for non-legacy IRQs Mario Limonciello
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