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* MMC: Ingenic: Add support for 8bit mode and LPM and JZ4760 Soc
@ 2019-09-05  7:38 Zhou Yanjie
  2019-09-05  7:38 ` [PATCH 1/4] MMC: Ingenic: Adjust the macro definition name Zhou Yanjie
                   ` (3 more replies)
  0 siblings, 4 replies; 8+ messages in thread
From: Zhou Yanjie @ 2019-09-05  7:38 UTC (permalink / raw)
  To: linux-mips
  Cc: linux-kernel, linux-mmc, devicetree, ulf.hansson, paul.burton,
	linus.walleij, paul, malat, yuehaibing, ezequiel, robh+dt,
	mark.rutland, syq, jiaxun.yang

1.adjust the macro definition name to match the corresponding
  register name in the datasheet.
2.add support for 8bit mode, now supports 1bit/4bit/8bit modes.
3.add support for probing mmc driver on the JZ4760 Soc from Ingenic.
4.add support for Low Power Mode of Ingenic's MMC/SD Controller.



^ permalink raw reply	[flat|nested] 8+ messages in thread

* [PATCH 1/4] MMC: Ingenic: Adjust the macro definition name.
  2019-09-05  7:38 MMC: Ingenic: Add support for 8bit mode and LPM and JZ4760 Soc Zhou Yanjie
@ 2019-09-05  7:38 ` Zhou Yanjie
  2019-09-13 15:32   ` Ezequiel Garcia
  2019-09-05  7:38 ` [PATCH 2/4] MMC: Ingenic: Add 8bit mode support Zhou Yanjie
                   ` (2 subsequent siblings)
  3 siblings, 1 reply; 8+ messages in thread
From: Zhou Yanjie @ 2019-09-05  7:38 UTC (permalink / raw)
  To: linux-mips
  Cc: linux-kernel, linux-mmc, devicetree, ulf.hansson, paul.burton,
	linus.walleij, paul, malat, yuehaibing, ezequiel, robh+dt,
	mark.rutland, syq, jiaxun.yang

Adjust the macro definition name to match the corresponding
register name in the datasheet.

Signed-off-by: Zhou Yanjie <zhouyanjie@zoho.com>
---
 drivers/mmc/host/jz4740_mmc.c | 18 +++++++++---------
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/drivers/mmc/host/jz4740_mmc.c b/drivers/mmc/host/jz4740_mmc.c
index ffdbfaa..1b1fcb7 100644
--- a/drivers/mmc/host/jz4740_mmc.c
+++ b/drivers/mmc/host/jz4740_mmc.c
@@ -28,7 +28,7 @@
 #include <asm/mach-jz4740/dma.h>
 
 #define JZ_REG_MMC_STRPCL	0x00
-#define JZ_REG_MMC_STATUS	0x04
+#define JZ_REG_MMC_STAT		0x04
 #define JZ_REG_MMC_CLKRT	0x08
 #define JZ_REG_MMC_CMDAT	0x0C
 #define JZ_REG_MMC_RESTO	0x10
@@ -40,7 +40,7 @@
 #define JZ_REG_MMC_IREG		0x28
 #define JZ_REG_MMC_CMD		0x2C
 #define JZ_REG_MMC_ARG		0x30
-#define JZ_REG_MMC_RESP_FIFO	0x34
+#define JZ_REG_MMC_RES		0x34
 #define JZ_REG_MMC_RXFIFO	0x38
 #define JZ_REG_MMC_TXFIFO	0x3C
 #define JZ_REG_MMC_DMAC		0x44
@@ -391,7 +391,7 @@ static void jz4740_mmc_clock_disable(struct jz4740_mmc_host *host)
 
 	writew(JZ_MMC_STRPCL_CLOCK_STOP, host->base + JZ_REG_MMC_STRPCL);
 	do {
-		status = readl(host->base + JZ_REG_MMC_STATUS);
+		status = readl(host->base + JZ_REG_MMC_STAT);
 	} while (status & JZ_MMC_STATUS_CLK_EN && --timeout);
 }
 
@@ -403,7 +403,7 @@ static void jz4740_mmc_reset(struct jz4740_mmc_host *host)
 	writew(JZ_MMC_STRPCL_RESET, host->base + JZ_REG_MMC_STRPCL);
 	udelay(10);
 	do {
-		status = readl(host->base + JZ_REG_MMC_STATUS);
+		status = readl(host->base + JZ_REG_MMC_STAT);
 	} while (status & JZ_MMC_STATUS_IS_RESETTING && --timeout);
 }
 
@@ -446,7 +446,7 @@ static void jz4740_mmc_transfer_check_state(struct jz4740_mmc_host *host,
 {
 	int status;
 
-	status = readl(host->base + JZ_REG_MMC_STATUS);
+	status = readl(host->base + JZ_REG_MMC_STAT);
 	if (status & JZ_MMC_STATUS_WRITE_ERROR_MASK) {
 		if (status & (JZ_MMC_STATUS_TIMEOUT_WRITE)) {
 			host->req->cmd->error = -ETIMEDOUT;
@@ -580,10 +580,10 @@ static bool jz4740_mmc_read_data(struct jz4740_mmc_host *host,
 	/* For whatever reason there is sometime one word more in the fifo then
 	 * requested */
 	timeout = 1000;
-	status = readl(host->base + JZ_REG_MMC_STATUS);
+	status = readl(host->base + JZ_REG_MMC_STAT);
 	while (!(status & JZ_MMC_STATUS_DATA_FIFO_EMPTY) && --timeout) {
 		d = readl(fifo_addr);
-		status = readl(host->base + JZ_REG_MMC_STATUS);
+		status = readl(host->base + JZ_REG_MMC_STAT);
 	}
 
 	return false;
@@ -614,7 +614,7 @@ static void jz4740_mmc_read_response(struct jz4740_mmc_host *host,
 {
 	int i;
 	uint16_t tmp;
-	void __iomem *fifo_addr = host->base + JZ_REG_MMC_RESP_FIFO;
+	void __iomem *fifo_addr = host->base + JZ_REG_MMC_RES;
 
 	if (cmd->flags & MMC_RSP_136) {
 		tmp = readw(fifo_addr);
@@ -797,7 +797,7 @@ static irqreturn_t jz_mmc_irq(int irq, void *devid)
 	struct mmc_command *cmd = host->cmd;
 	uint32_t irq_reg, status, tmp;
 
-	status = readl(host->base + JZ_REG_MMC_STATUS);
+	status = readl(host->base + JZ_REG_MMC_STAT);
 	irq_reg = jz4740_mmc_read_irq_reg(host);
 
 	tmp = irq_reg;
-- 
2.7.4



^ permalink raw reply	[flat|nested] 8+ messages in thread

* [PATCH 2/4] MMC: Ingenic: Add 8bit mode support.
  2019-09-05  7:38 MMC: Ingenic: Add support for 8bit mode and LPM and JZ4760 Soc Zhou Yanjie
  2019-09-05  7:38 ` [PATCH 1/4] MMC: Ingenic: Adjust the macro definition name Zhou Yanjie
@ 2019-09-05  7:38 ` Zhou Yanjie
  2019-09-05  7:38 ` [PATCH 3/4] dt-bindings: MMC: Add JZ4760 bindings Zhou Yanjie
  2019-09-05  7:38 ` [PATCH 4/4] MMC: Ingenic: Add support for JZ4760 and support for LPM Zhou Yanjie
  3 siblings, 0 replies; 8+ messages in thread
From: Zhou Yanjie @ 2019-09-05  7:38 UTC (permalink / raw)
  To: linux-mips
  Cc: linux-kernel, linux-mmc, devicetree, ulf.hansson, paul.burton,
	linus.walleij, paul, malat, yuehaibing, ezequiel, robh+dt,
	mark.rutland, syq, jiaxun.yang

Add support for 8bit mode, now supports 1bit/4bit/8bit modes.

Signed-off-by: Zhou Yanjie <zhouyanjie@zoho.com>
---
 drivers/mmc/host/jz4740_mmc.c | 12 ++++++++++--
 1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/drivers/mmc/host/jz4740_mmc.c b/drivers/mmc/host/jz4740_mmc.c
index 1b1fcb7..d6811a7 100644
--- a/drivers/mmc/host/jz4740_mmc.c
+++ b/drivers/mmc/host/jz4740_mmc.c
@@ -79,6 +79,8 @@
 
 #define JZ_MMC_CMDAT_IO_ABORT BIT(11)
 #define JZ_MMC_CMDAT_BUS_WIDTH_4BIT BIT(10)
+#define JZ_MMC_CMDAT_BUS_WIDTH_8BIT (BIT(10) | BIT(9))
+#define	JZ_MMC_CMDAT_BUS_WIDTH_MASK (BIT(10) | BIT(9))
 #define JZ_MMC_CMDAT_DMA_EN BIT(8)
 #define JZ_MMC_CMDAT_INIT BIT(7)
 #define JZ_MMC_CMDAT_BUSY BIT(6)
@@ -899,11 +901,16 @@ static void jz4740_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
 
 	switch (ios->bus_width) {
 	case MMC_BUS_WIDTH_1:
-		host->cmdat &= ~JZ_MMC_CMDAT_BUS_WIDTH_4BIT;
+		host->cmdat &= ~JZ_MMC_CMDAT_BUS_WIDTH_MASK;
 		break;
 	case MMC_BUS_WIDTH_4:
+		host->cmdat &= ~JZ_MMC_CMDAT_BUS_WIDTH_MASK;
 		host->cmdat |= JZ_MMC_CMDAT_BUS_WIDTH_4BIT;
 		break;
+	case MMC_BUS_WIDTH_8:
+		host->cmdat &= ~JZ_MMC_CMDAT_BUS_WIDTH_MASK;
+		host->cmdat |= JZ_MMC_CMDAT_BUS_WIDTH_8BIT;
+		break;
 	default:
 		break;
 	}
@@ -1034,7 +1041,8 @@ static int jz4740_mmc_probe(struct platform_device* pdev)
 
 	dev_info(&pdev->dev, "Using %s, %d-bit mode\n",
 		 host->use_dma ? "DMA" : "PIO",
-		 (mmc->caps & MMC_CAP_4_BIT_DATA) ? 4 : 1);
+		 (mmc->caps & MMC_CAP_8_BIT_DATA) ? 8 :
+		 ((mmc->caps & MMC_CAP_4_BIT_DATA) ? 4 : 1));
 
 	return 0;
 
-- 
2.7.4



^ permalink raw reply	[flat|nested] 8+ messages in thread

* [PATCH 3/4] dt-bindings: MMC: Add JZ4760 bindings.
  2019-09-05  7:38 MMC: Ingenic: Add support for 8bit mode and LPM and JZ4760 Soc Zhou Yanjie
  2019-09-05  7:38 ` [PATCH 1/4] MMC: Ingenic: Adjust the macro definition name Zhou Yanjie
  2019-09-05  7:38 ` [PATCH 2/4] MMC: Ingenic: Add 8bit mode support Zhou Yanjie
@ 2019-09-05  7:38 ` Zhou Yanjie
  2019-09-13 14:36   ` Rob Herring
  2019-09-05  7:38 ` [PATCH 4/4] MMC: Ingenic: Add support for JZ4760 and support for LPM Zhou Yanjie
  3 siblings, 1 reply; 8+ messages in thread
From: Zhou Yanjie @ 2019-09-05  7:38 UTC (permalink / raw)
  To: linux-mips
  Cc: linux-kernel, linux-mmc, devicetree, ulf.hansson, paul.burton,
	linus.walleij, paul, malat, yuehaibing, ezequiel, robh+dt,
	mark.rutland, syq, jiaxun.yang

Add the MMC bindings for the JZ4760 Soc from Ingenic.

Signed-off-by: Zhou Yanjie <zhouyanjie@zoho.com>
---
 Documentation/devicetree/bindings/mmc/jz4740.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/mmc/jz4740.txt b/Documentation/devicetree/bindings/mmc/jz4740.txt
index 8a6f87f..13796fe 100644
--- a/Documentation/devicetree/bindings/mmc/jz4740.txt
+++ b/Documentation/devicetree/bindings/mmc/jz4740.txt
@@ -8,6 +8,7 @@ Required properties:
 - compatible: Should be one of the following:
   - "ingenic,jz4740-mmc" for the JZ4740
   - "ingenic,jz4725b-mmc" for the JZ4725B
+  - "ingenic,jz4760-mmc" for the JZ4760
   - "ingenic,jz4780-mmc" for the JZ4780
 - reg: Should contain the MMC controller registers location and length.
 - interrupts: Should contain the interrupt specifier of the MMC controller.
-- 
2.7.4



^ permalink raw reply	[flat|nested] 8+ messages in thread

* [PATCH 4/4] MMC: Ingenic: Add support for JZ4760 and support for LPM.
  2019-09-05  7:38 MMC: Ingenic: Add support for 8bit mode and LPM and JZ4760 Soc Zhou Yanjie
                   ` (2 preceding siblings ...)
  2019-09-05  7:38 ` [PATCH 3/4] dt-bindings: MMC: Add JZ4760 bindings Zhou Yanjie
@ 2019-09-05  7:38 ` Zhou Yanjie
  3 siblings, 0 replies; 8+ messages in thread
From: Zhou Yanjie @ 2019-09-05  7:38 UTC (permalink / raw)
  To: linux-mips
  Cc: linux-kernel, linux-mmc, devicetree, ulf.hansson, paul.burton,
	linus.walleij, paul, malat, yuehaibing, ezequiel, robh+dt,
	mark.rutland, syq, jiaxun.yang

1.add support for probing mmc driver on the JZ4760 Soc from Ingenic.
2.add support for Low Power Mode of Ingenic's MMC/SD Controller.

Signed-off-by: Zhou Yanjie <zhouyanjie@zoho.com>
---
 drivers/mmc/host/jz4740_mmc.c | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/drivers/mmc/host/jz4740_mmc.c b/drivers/mmc/host/jz4740_mmc.c
index d6811a7..1e61f1b 100644
--- a/drivers/mmc/host/jz4740_mmc.c
+++ b/drivers/mmc/host/jz4740_mmc.c
@@ -43,6 +43,7 @@
 #define JZ_REG_MMC_RES		0x34
 #define JZ_REG_MMC_RXFIFO	0x38
 #define JZ_REG_MMC_TXFIFO	0x3C
+#define JZ_REG_MMC_LPM		0x40
 #define JZ_REG_MMC_DMAC		0x44
 
 #define JZ_MMC_STRPCL_EXIT_MULTIPLE BIT(7)
@@ -102,11 +103,15 @@
 #define JZ_MMC_DMAC_DMA_SEL BIT(1)
 #define JZ_MMC_DMAC_DMA_EN BIT(0)
 
+#define	JZ_MMC_LPM_DRV_RISING BIT(31)
+#define	JZ_MMC_LPM_LOW_POWER_MODE_EN BIT(0)
+
 #define JZ_MMC_CLK_RATE 24000000
 
 enum jz4740_mmc_version {
 	JZ_MMC_JZ4740,
 	JZ_MMC_JZ4725B,
+	JZ_MMC_JZ4760,
 	JZ_MMC_JZ4780,
 };
 
@@ -858,6 +863,16 @@ static int jz4740_mmc_set_clock_rate(struct jz4740_mmc_host *host, int rate)
 	}
 
 	writew(div, host->base + JZ_REG_MMC_CLKRT);
+
+	if (host->version >= JZ_MMC_JZ4760) {
+		if (real_rate > 25000000)
+			writel(JZ_MMC_LPM_DRV_RISING |
+				   JZ_MMC_LPM_LOW_POWER_MODE_EN,
+				   host->base + JZ_REG_MMC_LPM);
+	} else if (host->version >= JZ_MMC_JZ4725B)
+		writel(JZ_MMC_LPM_LOW_POWER_MODE_EN,
+			   host->base + JZ_REG_MMC_LPM);
+
 	return real_rate;
 }
 
@@ -935,6 +950,7 @@ static const struct mmc_host_ops jz4740_mmc_ops = {
 static const struct of_device_id jz4740_mmc_of_match[] = {
 	{ .compatible = "ingenic,jz4740-mmc", .data = (void *) JZ_MMC_JZ4740 },
 	{ .compatible = "ingenic,jz4725b-mmc", .data = (void *)JZ_MMC_JZ4725B },
+	{ .compatible = "ingenic,jz4760-mmc", .data = (void *) JZ_MMC_JZ4760 },
 	{ .compatible = "ingenic,jz4780-mmc", .data = (void *) JZ_MMC_JZ4780 },
 	{},
 };
-- 
2.7.4



^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH 3/4] dt-bindings: MMC: Add JZ4760 bindings.
  2019-09-05  7:38 ` [PATCH 3/4] dt-bindings: MMC: Add JZ4760 bindings Zhou Yanjie
@ 2019-09-13 14:36   ` Rob Herring
  0 siblings, 0 replies; 8+ messages in thread
From: Rob Herring @ 2019-09-13 14:36 UTC (permalink / raw)
  To: Zhou Yanjie; +Cc: linux-mips

On Thu,  5 Sep 2019 15:38:08 +0800, Zhou Yanjie wrote:
> Add the MMC bindings for the JZ4760 Soc from Ingenic.
> 
> Signed-off-by: Zhou Yanjie <zhouyanjie@zoho.com>
> ---
>  Documentation/devicetree/bindings/mmc/jz4740.txt | 1 +
>  1 file changed, 1 insertion(+)
> 

Acked-by: Rob Herring <robh@kernel.org>


^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH 1/4] MMC: Ingenic: Adjust the macro definition name.
  2019-09-05  7:38 ` [PATCH 1/4] MMC: Ingenic: Adjust the macro definition name Zhou Yanjie
@ 2019-09-13 15:32   ` Ezequiel Garcia
  2019-09-13 15:59     ` Zhou Yanjie
  0 siblings, 1 reply; 8+ messages in thread
From: Ezequiel Garcia @ 2019-09-13 15:32 UTC (permalink / raw)
  To: Zhou Yanjie, linux-mips
  Cc: linux-kernel, linux-mmc, devicetree, ulf.hansson, paul.burton,
	linus.walleij, paul, malat, yuehaibing, robh+dt, mark.rutland,
	syq, jiaxun.yang

Hi Zhou,

Thanks for your interest in this driver, I'm glad
so see it's more used.

On Thu, 2019-09-05 at 15:38 +0800, Zhou Yanjie wrote:
> Adjust the macro definition name to match the corresponding
> register name in the datasheet.
> 

It's not really an issue to have slighlt different
names on the macros. They are currently sufficiently
descriptive, and I don't think it's deserves a patch.

Thanks,
Ezequiel

> Signed-off-by: Zhou Yanjie <zhouyanjie@zoho.com>
> ---
>  drivers/mmc/host/jz4740_mmc.c | 18 +++++++++---------
>  1 file changed, 9 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/mmc/host/jz4740_mmc.c b/drivers/mmc/host/jz4740_mmc.c
> index ffdbfaa..1b1fcb7 100644
> --- a/drivers/mmc/host/jz4740_mmc.c
> +++ b/drivers/mmc/host/jz4740_mmc.c
> @@ -28,7 +28,7 @@
>  #include <asm/mach-jz4740/dma.h>
>  
>  #define JZ_REG_MMC_STRPCL	0x00
> -#define JZ_REG_MMC_STATUS	0x04
> +#define JZ_REG_MMC_STAT		0x04
>  #define JZ_REG_MMC_CLKRT	0x08
>  #define JZ_REG_MMC_CMDAT	0x0C
>  #define JZ_REG_MMC_RESTO	0x10
> @@ -40,7 +40,7 @@
>  #define JZ_REG_MMC_IREG		0x28
>  #define JZ_REG_MMC_CMD		0x2C
>  #define JZ_REG_MMC_ARG		0x30
> -#define JZ_REG_MMC_RESP_FIFO	0x34
> +#define JZ_REG_MMC_RES		0x34
>  #define JZ_REG_MMC_RXFIFO	0x38
>  #define JZ_REG_MMC_TXFIFO	0x3C
>  #define JZ_REG_MMC_DMAC		0x44
> @@ -391,7 +391,7 @@ static void jz4740_mmc_clock_disable(struct jz4740_mmc_host *host)
>  
>  	writew(JZ_MMC_STRPCL_CLOCK_STOP, host->base + JZ_REG_MMC_STRPCL);
>  	do {
> -		status = readl(host->base + JZ_REG_MMC_STATUS);
> +		status = readl(host->base + JZ_REG_MMC_STAT);
>  	} while (status & JZ_MMC_STATUS_CLK_EN && --timeout);
>  }
>  
> @@ -403,7 +403,7 @@ static void jz4740_mmc_reset(struct jz4740_mmc_host *host)
>  	writew(JZ_MMC_STRPCL_RESET, host->base + JZ_REG_MMC_STRPCL);
>  	udelay(10);
>  	do {
> -		status = readl(host->base + JZ_REG_MMC_STATUS);
> +		status = readl(host->base + JZ_REG_MMC_STAT);
>  	} while (status & JZ_MMC_STATUS_IS_RESETTING && --timeout);
>  }
>  
> @@ -446,7 +446,7 @@ static void jz4740_mmc_transfer_check_state(struct jz4740_mmc_host *host,
>  {
>  	int status;
>  
> -	status = readl(host->base + JZ_REG_MMC_STATUS);
> +	status = readl(host->base + JZ_REG_MMC_STAT);
>  	if (status & JZ_MMC_STATUS_WRITE_ERROR_MASK) {
>  		if (status & (JZ_MMC_STATUS_TIMEOUT_WRITE)) {
>  			host->req->cmd->error = -ETIMEDOUT;
> @@ -580,10 +580,10 @@ static bool jz4740_mmc_read_data(struct jz4740_mmc_host *host,
>  	/* For whatever reason there is sometime one word more in the fifo then
>  	 * requested */
>  	timeout = 1000;
> -	status = readl(host->base + JZ_REG_MMC_STATUS);
> +	status = readl(host->base + JZ_REG_MMC_STAT);
>  	while (!(status & JZ_MMC_STATUS_DATA_FIFO_EMPTY) && --timeout) {
>  		d = readl(fifo_addr);
> -		status = readl(host->base + JZ_REG_MMC_STATUS);
> +		status = readl(host->base + JZ_REG_MMC_STAT);
>  	}
>  
>  	return false;
> @@ -614,7 +614,7 @@ static void jz4740_mmc_read_response(struct jz4740_mmc_host *host,
>  {
>  	int i;
>  	uint16_t tmp;
> -	void __iomem *fifo_addr = host->base + JZ_REG_MMC_RESP_FIFO;
> +	void __iomem *fifo_addr = host->base + JZ_REG_MMC_RES;
>  
>  	if (cmd->flags & MMC_RSP_136) {
>  		tmp = readw(fifo_addr);
> @@ -797,7 +797,7 @@ static irqreturn_t jz_mmc_irq(int irq, void *devid)
>  	struct mmc_command *cmd = host->cmd;
>  	uint32_t irq_reg, status, tmp;
>  
> -	status = readl(host->base + JZ_REG_MMC_STATUS);
> +	status = readl(host->base + JZ_REG_MMC_STAT);
>  	irq_reg = jz4740_mmc_read_irq_reg(host);
>  
>  	tmp = irq_reg;




^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH 1/4] MMC: Ingenic: Adjust the macro definition name.
  2019-09-13 15:32   ` Ezequiel Garcia
@ 2019-09-13 15:59     ` Zhou Yanjie
  0 siblings, 0 replies; 8+ messages in thread
From: Zhou Yanjie @ 2019-09-13 15:59 UTC (permalink / raw)
  To: Ezequiel Garcia, linux-mips
  Cc: linux-kernel, linux-mmc, devicetree, ulf.hansson, paul.burton,
	linus.walleij, paul, malat, yuehaibing, robh+dt, mark.rutland,
	syq, jiaxun.yang

Hi Ezequiel,

On 2019年09月13日 23:32, Ezequiel Garcia wrote:
> Hi Zhou,
>
> Thanks for your interest in this driver, I'm glad
> so see it's more used.
>
> On Thu, 2019-09-05 at 15:38 +0800, Zhou Yanjie wrote:
>> Adjust the macro definition name to match the corresponding
>> register name in the datasheet.
>>
> It's not really an issue to have slighlt different
> names on the macros. They are currently sufficiently
> descriptive, and I don't think it's deserves a patch.
Thanks for your advice, I'll drop this in v2. Do you have any suggestions
for the other three patches?

Best regards!
>
> Thanks,
> Ezequiel
>
>> Signed-off-by: Zhou Yanjie <zhouyanjie@zoho.com>
>> ---
>>   drivers/mmc/host/jz4740_mmc.c | 18 +++++++++---------
>>   1 file changed, 9 insertions(+), 9 deletions(-)
>>
>> diff --git a/drivers/mmc/host/jz4740_mmc.c b/drivers/mmc/host/jz4740_mmc.c
>> index ffdbfaa..1b1fcb7 100644
>> --- a/drivers/mmc/host/jz4740_mmc.c
>> +++ b/drivers/mmc/host/jz4740_mmc.c
>> @@ -28,7 +28,7 @@
>>   #include <asm/mach-jz4740/dma.h>
>>   
>>   #define JZ_REG_MMC_STRPCL	0x00
>> -#define JZ_REG_MMC_STATUS	0x04
>> +#define JZ_REG_MMC_STAT		0x04
>>   #define JZ_REG_MMC_CLKRT	0x08
>>   #define JZ_REG_MMC_CMDAT	0x0C
>>   #define JZ_REG_MMC_RESTO	0x10
>> @@ -40,7 +40,7 @@
>>   #define JZ_REG_MMC_IREG		0x28
>>   #define JZ_REG_MMC_CMD		0x2C
>>   #define JZ_REG_MMC_ARG		0x30
>> -#define JZ_REG_MMC_RESP_FIFO	0x34
>> +#define JZ_REG_MMC_RES		0x34
>>   #define JZ_REG_MMC_RXFIFO	0x38
>>   #define JZ_REG_MMC_TXFIFO	0x3C
>>   #define JZ_REG_MMC_DMAC		0x44
>> @@ -391,7 +391,7 @@ static void jz4740_mmc_clock_disable(struct jz4740_mmc_host *host)
>>   
>>   	writew(JZ_MMC_STRPCL_CLOCK_STOP, host->base + JZ_REG_MMC_STRPCL);
>>   	do {
>> -		status = readl(host->base + JZ_REG_MMC_STATUS);
>> +		status = readl(host->base + JZ_REG_MMC_STAT);
>>   	} while (status & JZ_MMC_STATUS_CLK_EN && --timeout);
>>   }
>>   
>> @@ -403,7 +403,7 @@ static void jz4740_mmc_reset(struct jz4740_mmc_host *host)
>>   	writew(JZ_MMC_STRPCL_RESET, host->base + JZ_REG_MMC_STRPCL);
>>   	udelay(10);
>>   	do {
>> -		status = readl(host->base + JZ_REG_MMC_STATUS);
>> +		status = readl(host->base + JZ_REG_MMC_STAT);
>>   	} while (status & JZ_MMC_STATUS_IS_RESETTING && --timeout);
>>   }
>>   
>> @@ -446,7 +446,7 @@ static void jz4740_mmc_transfer_check_state(struct jz4740_mmc_host *host,
>>   {
>>   	int status;
>>   
>> -	status = readl(host->base + JZ_REG_MMC_STATUS);
>> +	status = readl(host->base + JZ_REG_MMC_STAT);
>>   	if (status & JZ_MMC_STATUS_WRITE_ERROR_MASK) {
>>   		if (status & (JZ_MMC_STATUS_TIMEOUT_WRITE)) {
>>   			host->req->cmd->error = -ETIMEDOUT;
>> @@ -580,10 +580,10 @@ static bool jz4740_mmc_read_data(struct jz4740_mmc_host *host,
>>   	/* For whatever reason there is sometime one word more in the fifo then
>>   	 * requested */
>>   	timeout = 1000;
>> -	status = readl(host->base + JZ_REG_MMC_STATUS);
>> +	status = readl(host->base + JZ_REG_MMC_STAT);
>>   	while (!(status & JZ_MMC_STATUS_DATA_FIFO_EMPTY) && --timeout) {
>>   		d = readl(fifo_addr);
>> -		status = readl(host->base + JZ_REG_MMC_STATUS);
>> +		status = readl(host->base + JZ_REG_MMC_STAT);
>>   	}
>>   
>>   	return false;
>> @@ -614,7 +614,7 @@ static void jz4740_mmc_read_response(struct jz4740_mmc_host *host,
>>   {
>>   	int i;
>>   	uint16_t tmp;
>> -	void __iomem *fifo_addr = host->base + JZ_REG_MMC_RESP_FIFO;
>> +	void __iomem *fifo_addr = host->base + JZ_REG_MMC_RES;
>>   
>>   	if (cmd->flags & MMC_RSP_136) {
>>   		tmp = readw(fifo_addr);
>> @@ -797,7 +797,7 @@ static irqreturn_t jz_mmc_irq(int irq, void *devid)
>>   	struct mmc_command *cmd = host->cmd;
>>   	uint32_t irq_reg, status, tmp;
>>   
>> -	status = readl(host->base + JZ_REG_MMC_STATUS);
>> +	status = readl(host->base + JZ_REG_MMC_STAT);
>>   	irq_reg = jz4740_mmc_read_irq_reg(host);
>>   
>>   	tmp = irq_reg;
>
>




^ permalink raw reply	[flat|nested] 8+ messages in thread

end of thread, back to index

Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-09-05  7:38 MMC: Ingenic: Add support for 8bit mode and LPM and JZ4760 Soc Zhou Yanjie
2019-09-05  7:38 ` [PATCH 1/4] MMC: Ingenic: Adjust the macro definition name Zhou Yanjie
2019-09-13 15:32   ` Ezequiel Garcia
2019-09-13 15:59     ` Zhou Yanjie
2019-09-05  7:38 ` [PATCH 2/4] MMC: Ingenic: Add 8bit mode support Zhou Yanjie
2019-09-05  7:38 ` [PATCH 3/4] dt-bindings: MMC: Add JZ4760 bindings Zhou Yanjie
2019-09-13 14:36   ` Rob Herring
2019-09-05  7:38 ` [PATCH 4/4] MMC: Ingenic: Add support for JZ4760 and support for LPM Zhou Yanjie

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