From: Paul Cercueil <paul@crapouillou.net>
To: Linus Walleij <linus.walleij@linaro.org>,
Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Ralf Baechle <ralf@linux-mips.org>,
Ulf Hansson <ulf.hansson@linaro.org>,
Boris Brezillon <boris.brezillon@free-electrons.com>,
Thierry Reding <thierry.reding@gmail.com>,
Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>,
Maarten ter Huurne <maarten@treewalker.org>,
Lars-Peter Clausen <lars@metafoo.de>,
Paul Burton <paul.burton@imgtec.com>
Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-mips@linux-mips.org,
linux-mmc@vger.kernel.org, linux-mtd@lists.infradead.org,
linux-pwm@vger.kernel.org, linux-fbdev@vger.kernel.org,
james.hogan@imgtec.com, Paul Cercueil <paul@crapouillou.net>
Subject: [PATCH 01/13] Documentation: dt/bindings: Document pinctrl-ingenic
Date: Wed, 18 Jan 2017 00:14:09 +0100 [thread overview]
Message-ID: <20170117231421.16310-2-paul@crapouillou.net> (raw)
In-Reply-To: <20170117231421.16310-1-paul@crapouillou.net>
From: Paul Burton <paul.burton@imgtec.com>
This commit adds documentation for the devicetree bidings of the
pinctrl-ingenic driver, which handles pin configuration, pin muxing
and GPIOs of the Ingenic SoCs currently supported by the Linux kernel.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
---
.../bindings/pinctrl/ingenic,pinctrl.txt | 173 +++++++++++++++++++++
1 file changed, 173 insertions(+)
create mode 100644 Documentation/devicetree/bindings/pinctrl/ingenic,pinctrl.txt
diff --git a/Documentation/devicetree/bindings/pinctrl/ingenic,pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/ingenic,pinctrl.txt
new file mode 100644
index 000000000000..e59f7e7b6a49
--- /dev/null
+++ b/Documentation/devicetree/bindings/pinctrl/ingenic,pinctrl.txt
@@ -0,0 +1,173 @@
+Ingenic jz47xx pin controller
+
+Please refer to pinctrl-bindings.txt in this directory for details of the
+common pinctrl bindings used by client devices, including the meaning of the
+phrase "pin configuration node".
+
+For the jz47xx SoCs, pin control is tightly bound with GPIO ports. All pins may
+be used as GPIOs, multiplexed device functions are configured within the
+GPIO port configuration registers and it is typical to refer to pins using the
+naming scheme "PxN" where x is a character identifying the GPIO port with
+which the pin is associated and N is an integer from 0 to 31 identifying the
+pin within that GPIO port. For example PA0 is the first pin in GPIO port A, and
+PB31 is the last pin in GPIO port B. The jz4740 contains 4 GPIO ports, PA to
+PD, for a total of 128 pins. The jz4780 contains 6 GPIO ports, PA to PF, for a
+total of 192 pins.
+
+
+##### Pin controller node #####
+
+Required properties:
+- compatible: One of:
+ - "ingenic,jz4740-pinctrl"
+ - "ingenic,jz4780-pinctrl"
+- #address-cells: Should contain the integer 1.
+- #size-cells: Should contain the integer 1.
+- ranges: Should be empty.
+
+Required sub-nodes:
+ - gpio-chips (see below)
+ - functions (see below)
+
+The pin controller node must have two sub-nodes, 'gpio-chips' and 'functions'.
+
+
+##### 'gpio-chips' sub-node #####
+
+The gpio-chips node will contain sub-nodes that correspond to GPIO controllers
+(one sub-node per GPIO controller).
+
+Required properties:
+- #address-cells: Should contain the integer 1.
+- #size-cells: Should contain the integer 1.
+- ranges: Should be empty.
+
+
+##### 'functions' sub-node #####
+
+The "functions" node will contain sub-nodes that correspond to pin function
+nodes.
+
+Required properties:
+- None.
+
+
+##### GPIO controller node #####
+
+Each subnode of the 'gpio-chips' node is a GPIO controller node.
+
+Required properties:
+- gpio-controller: Identifies this node as a GPIO controller.
+- #gpio-cells: Should contain the integer 2.
+- reg: Should contain the physical address and length of the GPIO controller's
+ configuration registers.
+
+Optional properties:
+- interrupt-controller: The GPIO controllers can optionally configure the
+ GPIOs as interrupt sources. In this case, the 'interrupt-controller'
+ standalone property should be supplied.
+- #interrupt-cells: Required if 'interrupt-controller' is also specified.
+ In that case, it should contain the integer 2.
+- interrupts: Required if 'interrupt-controller' is also specified.
+ In that case, it should contain the IRQ number of this GPIO controller.
+- ingenic,pull-ups: A bit mask identifying the pins associated with this GPIO
+ port which feature a pull-up resistor. The default mask is 0x0.
+- ingenic,pull-downs: A bit mask identifying the pins associated with this GPIO
+ port which feature a pull-down resistor. The default mask is 0x0.
+ Each pin of the jz47xx SoCs may feature a single bias resistor, thus there
+ should be no bits which are set in both ingenic,pull-ups & ingenic,pull-downs.
+
+
+##### Pin function node #####
+
+Each subnode of the 'functions' node is a pin function node.
+
+These subnodes represent a functionality of the SoC which may be exposed
+through one or more groups of pins, represented as subnodes of the pin
+function node. For example a function may be uart0, which may be exposed
+through the group of pins PF0 to PF3.
+
+Required pin function node properties:
+- None.
+
+
+##### Pin group node #####
+
+Each subnode of a pin function node is a pin group node.
+
+Required pin group node properties:
+- ingenic,pins: A set of values representing the pins within this pin group and
+ their configuration. Four values should be provided for each pin:
+ - The phandle of the GPIO controller node for the GPIO port within which the
+ pin is found.
+ - The index of the pin within its GPIO port (an integer in the range 0 to 31
+ inclusive).
+ - The index of the shared function port to be programmed in the GPIO port
+ registers for this pin.
+ Tables of these may be found in the jz4740 and jz4780 programming
+ manuals within the "General-Purpose I/O Ports" -> "Overview" section.
+ The value can either be supplied directly (0 for function 0, 1 for
+ function 1, etc.) or using the macros present in
+ <dt-bindings/pinctrl/ingenic.h>.
+ The special macro JZ_PIN_MODE_GPIO can be used to specify that the pin is
+ to be used as a GPIO. This is useful, for instance, when you just want to
+ set the electrical configuration of a pin used as GPIO.
+ - The phandle of a pin configuration node specifying the electrical
+ configuration that should be applied to the pin.
+
+For example the function 'msc0' may be exposed through 2 different pin groups,
+one in GPIO port A and one in GPIO port E:
+
+ bias-configs {
+ nobias: nobias {
+ bias-disable;
+ };
+ };
+
+ functions {
+ pinfunc_msc0: msc0 {
+ pins_msc0_pa: msc0-pa {
+ ingenic,pins = <&gpa 4 1 &nobias /* d4 */
+ &gpa 5 1 &nobias /* d5 */
+ &gpa 6 1 &nobias /* d6 */
+ &gpa 7 1 &nobias /* d7 */
+ &gpa 18 1 &nobias /* clk */
+ &gpa 19 1 &nobias /* cmd */
+ &gpa 20 1 &nobias /* d0 */
+ &gpa 21 1 &nobias /* d1 */
+ &gpa 22 1 &nobias /* d2 */
+ &gpa 23 1 &nobias /* d3 */
+ &gpa 24 1 &nobias>; /* rst */
+ };
+
+ pins_msc0_pe: msc0-pe {
+ ingenic,pins = <&gpe 20 0 &nobias /* d0 */
+ &gpe 21 0 &nobias /* d1 */
+ &gpe 22 0 &nobias /* d2 */
+ &gpe 23 0 &nobias /* d3 */
+ &gpe 28 0 &nobias /* clk */
+ &gpe 29 0 &nobias>; /* cmd */
+ };
+ };
+ };
+
+
+##### Pin configuration node #####
+
+The pin configuration nodes are referenced by phandle, and can be placed
+anywhere in the device tree (including in the pin controller node, or in a
+sub-node that is not 'gpio-chips' or 'functions').
+
+Pin configuration nodes use generic pinconf properties to specify an electrical
+configuration of a pin. The only configurable property for a pin of the jz47xx
+SoCs is whether to enable its bias resistor. Thus the only supported pinconf
+properties are:
+
+- bias-disable
+- bias-pull-up
+- bias-pull-down
+
+No arguments are supported for any of these properties.
+
+For more information about generic pinconfig properties, see
+Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
--
2.11.0
next prev parent reply other threads:[~2017-01-17 23:15 UTC|newest]
Thread overview: 162+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-01-17 23:14 [PATCH 00/13] Ingenic JZ4740 / JZ4780 pinctrl driver Paul Cercueil
2017-01-17 23:14 ` Paul Cercueil [this message]
2017-01-18 23:45 ` [PATCH 01/13] Documentation: dt/bindings: Document pinctrl-ingenic Linus Walleij
2017-01-17 23:14 ` [PATCH 02/13] pinctrl-jz4740: add a pinctrl driver for the Ingenic jz4740 SoC Paul Cercueil
2017-01-18 10:16 ` Linus Walleij
2017-01-17 23:14 ` [PATCH 03/13] pinctrl-jz4780: add a pinctrl driver for the Ingenic jz4780 SoC Paul Cercueil
2017-01-17 23:14 ` [PATCH 04/13] MIPS: ingenic: Enable pinctrl for all ingenic SoCs Paul Cercueil
2017-01-17 23:14 ` [PATCH 05/13] MIPS: jz4740: DTS: Add node for the jz4740-pinctrl driver Paul Cercueil
2017-01-18 23:50 ` Linus Walleij
2017-01-17 23:14 ` [PATCH 06/13] MIPS: jz4780: DTS: Add node for the jz4780-pinctrl driver Paul Cercueil
2017-01-17 23:14 ` [PATCH 07/13] MIPS: JZ4740: Qi LB60: Add pinctrl configuration for several drivers Paul Cercueil
2017-01-17 23:14 ` [PATCH 08/13] MIPS: JZ4780: CI20: " Paul Cercueil
2017-01-17 23:14 ` [PATCH 09/13] mmc: jz4740: Let the pinctrl driver configure the pins Paul Cercueil
2017-01-19 10:55 ` Ulf Hansson
2017-01-20 11:59 ` Paul Cercueil
2017-01-17 23:14 ` [PATCH 10/13] mtd: nand: " Paul Cercueil
2017-01-27 17:33 ` Boris Brezillon
2017-01-17 23:14 ` [PATCH 11/13] fbdev: jz4740-fb: " Paul Cercueil
2017-01-17 23:14 ` [PATCH 12/13] pwm: jz4740: " Paul Cercueil
2017-01-18 7:20 ` Thierry Reding
2017-01-17 23:14 ` [PATCH 13/13] MIPS: jz4740: Remove custom GPIO code Paul Cercueil
2017-01-18 7:27 ` Thierry Reding
2017-01-19 11:24 ` Paul Cercueil
2017-01-19 9:07 ` Linus Walleij
2017-01-20 10:01 ` Paul Cercueil
2017-01-18 7:15 ` [PATCH 00/13] Ingenic JZ4740 / JZ4780 pinctrl driver Thierry Reding
2017-01-19 11:19 ` Paul Cercueil
2017-01-20 8:40 ` Linus Walleij
2017-01-20 10:17 ` Paul Cercueil
2017-01-22 14:49 ` [PATCH v2 00/14] " Paul Cercueil
2017-01-22 14:49 ` [PATCH v2 01/14] Documentation: dt/bindings: Document pinctrl-ingenic Paul Cercueil
2017-01-27 11:18 ` Linus Walleij
2017-01-27 15:27 ` Paul Cercueil
2017-01-31 12:59 ` Linus Walleij
2017-01-22 14:49 ` [PATCH v2 02/14] Documentation: dt/bindings: Document pinctrl-gpio Paul Cercueil
2017-01-22 14:49 ` [PATCH v2 03/14] pinctrl-ingenic: add a pinctrl driver for the Ingenic jz47xx SoCs Paul Cercueil
2017-01-22 14:49 ` [PATCH v2 04/14] GPIO: Add gpio-ingenic driver Paul Cercueil
2017-01-22 16:21 ` kbuild test robot
2017-01-22 16:21 ` kbuild test robot
2017-01-22 17:49 ` kbuild test robot
2017-01-22 17:49 ` kbuild test robot
2017-01-22 17:49 ` [PATCH] GPIO: fix semicolon.cocci warnings kbuild test robot
2017-01-22 17:49 ` kbuild test robot
2017-01-22 14:49 ` [PATCH v2 05/14] MIPS: ingenic: Enable pinctrl for all ingenic SoCs Paul Cercueil
2017-01-22 14:49 ` [PATCH v2 06/14] MIPS: jz4740: DTS: Add nodes for ingenic pinctrl and gpio drivers Paul Cercueil
2017-01-22 14:49 ` [PATCH v2 07/14] MIPS: jz4780: " Paul Cercueil
2017-01-22 14:49 ` [PATCH v2 08/14] MIPS: JZ4740: Qi LB60: Add pinctrl configuration for several drivers Paul Cercueil
2017-01-22 14:49 ` [PATCH v2 09/14] MIPS: JZ4780: CI20: " Paul Cercueil
2017-01-22 14:49 ` [PATCH v2 10/14] mmc: jz4740: Let the pinctrl driver configure the pins Paul Cercueil
2017-01-23 10:40 ` Ulf Hansson
2017-01-22 14:49 ` [PATCH v2 11/14] mtd: nand: " Paul Cercueil
2017-01-22 14:49 ` [PATCH v2 12/14] fbdev: jz4740-fb: " Paul Cercueil
2017-01-22 14:49 ` [PATCH v2 13/14] pwm: jz4740: " Paul Cercueil
2017-01-22 14:49 ` [PATCH v2 14/14] MIPS: jz4740: Remove custom GPIO code Paul Cercueil
2017-01-25 18:51 ` [PATCH v3 00/14] Ingenic JZ4740 / JZ4780 pinctrl driver Paul Cercueil
2017-01-25 18:51 ` [PATCH v3 01/14] Documentation: dt/bindings: Document pinctrl-ingenic Paul Cercueil
2017-01-30 20:36 ` Rob Herring
2017-01-30 20:36 ` Rob Herring
2017-01-31 10:31 ` Paul Cercueil
2017-01-31 13:09 ` Linus Walleij
2017-02-09 17:28 ` Paul Cercueil
2017-02-20 13:56 ` Linus Walleij
2017-02-21 11:20 ` Paul Cercueil
2017-02-23 9:59 ` Linus Walleij
2017-04-02 20:42 ` [PATCH v4 00/14] Ingenic JZ4740 / JZ4780 pinctrl driver Paul Cercueil
2017-04-02 20:42 ` [PATCH v4 01/14] dt/bindings: Document pinctrl-ingenic Paul Cercueil
2017-04-04 14:48 ` Rob Herring
2017-04-28 20:08 ` [PATCH v4 00/14] Ingenic JZ4740 / JZ4780 pinctrl driver Paul Cercueil
2017-04-28 20:08 ` [PATCH v5 01/14] dt/bindings: Document pinctrl-ingenic Paul Cercueil
2017-05-12 16:52 ` [PATCH v6 " Paul Cercueil
2017-05-12 16:52 ` [PATCH v6 02/14] dt/bindings: Document gpio-ingenic Paul Cercueil
2017-05-12 16:52 ` [PATCH v6 03/14] pinctrl: add a pinctrl driver for the Ingenic jz47xx SoCs Paul Cercueil
2017-05-12 16:52 ` [PATCH v6 04/14] GPIO: Add gpio-ingenic driver Paul Cercueil
2017-05-12 16:52 ` [PATCH v6 05/14] MIPS: ingenic: Enable pinctrl for all ingenic SoCs Paul Cercueil
2017-05-12 16:52 ` [PATCH v6 06/14] MIPS: jz4740: DTS: Add nodes for ingenic pinctrl and gpio drivers Paul Cercueil
2017-05-12 16:53 ` [PATCH v6 07/14] MIPS: jz4780: " Paul Cercueil
2017-05-12 16:53 ` [PATCH v6 08/14] MIPS: JZ4740: Qi LB60: Add pinctrl configuration for several drivers Paul Cercueil
2017-05-12 16:53 ` [PATCH v6 09/14] MIPS: JZ4780: CI20: " Paul Cercueil
2017-05-12 16:53 ` [PATCH v6 10/14] mmc: jz4740: Let the pinctrl driver configure the pins Paul Cercueil
2017-05-12 16:53 ` [PATCH v6 11/14] mtd: nand: " Paul Cercueil
2017-05-12 16:53 ` [PATCH v6 12/14] fbdev: jz4740-fb: " Paul Cercueil
2017-05-12 16:53 ` [PATCH v6 13/14] pwm: jz4740: " Paul Cercueil
2017-05-12 16:53 ` [PATCH v6 14/14] MIPS: jz4740: Remove custom GPIO code Paul Cercueil
2017-04-28 20:08 ` [PATCH v5 02/14] dt/bindings: Document gpio-ingenic Paul Cercueil
2017-05-05 19:57 ` Rob Herring
2017-04-28 20:08 ` [PATCH v5 03/14] pinctrl: add a pinctrl driver for the Ingenic jz47xx SoCs Paul Cercueil
2017-05-03 9:12 ` Paul Cercueil
2017-05-11 11:01 ` Linus Walleij
2017-04-28 20:08 ` [PATCH v5 04/14] GPIO: Add gpio-ingenic driver Paul Cercueil
2017-05-07 22:05 ` Paul Cercueil
2017-05-11 11:06 ` Linus Walleij
2017-04-28 20:08 ` [PATCH v5 05/14] MIPS: ingenic: Enable pinctrl for all ingenic SoCs Paul Cercueil
2017-05-11 11:08 ` Linus Walleij
2017-05-12 17:00 ` Paul Cercueil
2017-05-22 15:31 ` Linus Walleij
2017-07-02 16:35 ` Paul Cercueil
2017-07-03 9:07 ` Linus Walleij
2017-07-03 13:55 ` Ralf Baechle
2017-07-31 13:29 ` Linus Walleij
2017-04-28 20:08 ` [PATCH v5 06/14] MIPS: jz4740: DTS: Add nodes for ingenic pinctrl and gpio drivers Paul Cercueil
2017-04-28 20:08 ` [PATCH v5 07/14] MIPS: jz4780: " Paul Cercueil
2017-04-28 20:08 ` [PATCH v5 08/14] MIPS: JZ4740: Qi LB60: Add pinctrl configuration for several drivers Paul Cercueil
2017-04-28 20:08 ` [PATCH v5 09/14] MIPS: JZ4780: CI20: " Paul Cercueil
2017-04-28 20:08 ` [PATCH v5 10/14] mmc: jz4740: Let the pinctrl driver configure the pins Paul Cercueil
2017-04-28 20:08 ` [PATCH v5 11/14] mtd: nand: " Paul Cercueil
2017-04-28 20:08 ` [PATCH v5 12/14] fbdev: jz4740-fb: " Paul Cercueil
2017-04-28 20:08 ` [PATCH v5 13/14] pwm: jz4740: " Paul Cercueil
2017-04-28 20:08 ` [PATCH v5 14/14] MIPS: jz4740: Remove custom GPIO code Paul Cercueil
2017-04-02 20:42 ` [PATCH v4 02/14] dt/bindings: Document gpio-ingenic Paul Cercueil
2017-04-04 14:52 ` Rob Herring
2017-04-02 20:42 ` [PATCH v4 03/14] pinctrl-ingenic: add a pinctrl driver for the Ingenic jz47xx SoCs Paul Cercueil
2017-04-07 9:41 ` Linus Walleij
2017-04-07 10:56 ` Lee Jones
2017-04-02 20:42 ` [PATCH v4 04/14] GPIO: Add gpio-ingenic driver Paul Cercueil
2017-04-03 14:15 ` kbuild test robot
2017-04-03 14:15 ` kbuild test robot
2017-04-07 9:34 ` Linus Walleij
2017-04-02 20:42 ` [PATCH v4 05/14] MIPS: ingenic: Enable pinctrl for all ingenic SoCs Paul Cercueil
2017-04-02 20:42 ` [PATCH v4 06/14] MIPS: jz4740: DTS: Add nodes for ingenic pinctrl and gpio drivers Paul Cercueil
2017-04-03 9:57 ` Sergei Shtylyov
2017-04-03 10:20 ` Paul Cercueil
2017-04-03 10:32 ` Sergei Shtylyov
2017-04-07 9:44 ` Linus Walleij
2017-04-07 13:57 ` Paul Cercueil
2017-04-24 12:58 ` Linus Walleij
2017-04-02 20:42 ` [PATCH v4 07/14] MIPS: jz4780: " Paul Cercueil
2017-04-02 20:42 ` [PATCH v4 08/14] MIPS: JZ4740: Qi LB60: Add pinctrl configuration for several drivers Paul Cercueil
2017-04-02 20:42 ` [PATCH v4 09/14] MIPS: JZ4780: CI20: " Paul Cercueil
2017-04-02 20:42 ` [PATCH v4 10/14] mmc: jz4740: Let the pinctrl driver configure the pins Paul Cercueil
2017-04-02 20:42 ` [PATCH v4 11/14] mtd: nand: " Paul Cercueil
2017-04-02 20:42 ` [PATCH v4 12/14] fbdev: jz4740-fb: " Paul Cercueil
2017-04-02 20:42 ` [PATCH v4 13/14] pwm: jz4740: " Paul Cercueil
2017-04-06 14:40 ` Thierry Reding
2017-04-02 20:42 ` [PATCH v4 14/14] MIPS: jz4740: Remove custom GPIO code Paul Cercueil
2017-01-25 18:51 ` [PATCH v3 02/14] Documentation: dt/bindings: Document pinctrl-gpio Paul Cercueil
2017-01-30 20:33 ` Rob Herring
2017-01-25 18:51 ` [PATCH v3 03/14] pinctrl-ingenic: add a pinctrl driver for the Ingenic jz47xx SoCs Paul Cercueil
2017-01-31 14:05 ` Linus Walleij
2017-01-31 14:12 ` Paul Cercueil
2017-01-25 18:51 ` [PATCH v3 04/14] GPIO: Add gpio-ingenic driver Paul Cercueil
2017-01-31 14:13 ` Linus Walleij
2017-02-09 17:14 ` Paul Cercueil
2017-02-12 20:48 ` Linus Walleij
2017-01-31 14:20 ` Linus Walleij
2017-01-31 15:29 ` Paul Cercueil
2017-02-03 13:58 ` Linus Walleij
2017-01-25 18:51 ` [PATCH v3 05/14] MIPS: ingenic: Enable pinctrl for all ingenic SoCs Paul Cercueil
2017-01-25 18:51 ` [PATCH v3 06/14] MIPS: jz4740: DTS: Add nodes for ingenic pinctrl and gpio drivers Paul Cercueil
2017-01-31 14:16 ` Linus Walleij
2017-01-25 18:52 ` [PATCH v3 07/14] MIPS: jz4780: " Paul Cercueil
2017-01-25 18:52 ` [PATCH v3 08/14] MIPS: JZ4740: Qi LB60: Add pinctrl configuration for several drivers Paul Cercueil
2017-01-25 18:52 ` [PATCH v3 09/14] MIPS: JZ4780: CI20: " Paul Cercueil
2017-01-25 18:52 ` [PATCH v3 10/14] mmc: jz4740: Let the pinctrl driver configure the pins Paul Cercueil
2017-01-26 6:11 ` kbuild test robot
2017-01-26 6:11 ` kbuild test robot
2017-01-26 10:10 ` Paul Cercueil
2017-01-25 18:52 ` [PATCH v3 11/14] mtd: nand: " Paul Cercueil
2017-01-25 18:52 ` [PATCH v3 12/14] fbdev: jz4740-fb: " Paul Cercueil
2017-01-30 16:10 ` Bartlomiej Zolnierkiewicz
2017-01-25 18:52 ` [PATCH v3 13/14] pwm: jz4740: " Paul Cercueil
2017-01-25 18:52 ` [PATCH v3 14/14] MIPS: jz4740: Remove custom GPIO code Paul Cercueil
2017-01-19 6:38 ` [PATCH 00/13] Ingenic JZ4740 / JZ4780 pinctrl driver Linus Walleij
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20170117231421.16310-2-paul@crapouillou.net \
--to=paul@crapouillou.net \
--cc=b.zolnierkie@samsung.com \
--cc=boris.brezillon@free-electrons.com \
--cc=devicetree@vger.kernel.org \
--cc=james.hogan@imgtec.com \
--cc=lars@metafoo.de \
--cc=linus.walleij@linaro.org \
--cc=linux-fbdev@vger.kernel.org \
--cc=linux-gpio@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mips@linux-mips.org \
--cc=linux-mmc@vger.kernel.org \
--cc=linux-mtd@lists.infradead.org \
--cc=linux-pwm@vger.kernel.org \
--cc=maarten@treewalker.org \
--cc=mark.rutland@arm.com \
--cc=paul.burton@imgtec.com \
--cc=ralf@linux-mips.org \
--cc=robh+dt@kernel.org \
--cc=thierry.reding@gmail.com \
--cc=ulf.hansson@linaro.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).