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From: Paul Burton <paul.burton@mips.com>
To: "linux-mips@vger.kernel.org" <linux-mips@vger.kernel.org>
Cc: Serge Semin <fancer.lancer@gmail.com>,
	Paul Burton <pburton@wavecomp.com>
Subject: [PATCH 2/4] MIPS: Always allocate exception vector for MIPSr2+
Date: Tue, 30 Apr 2019 22:53:30 +0000
Message-ID: <20190430225216.7164-3-paul.burton@mips.com> (raw)
In-Reply-To: <20190430225216.7164-1-paul.burton@mips.com>

Currently we allocate the exception vector on systems which use a
vectored interrupt mode, but otherwise attempt to reuse whatever
exception vector the bootloader uses.

This can be problematic for a number of reasons:

  1) The memory isn't properly marked reserved in the memblock
     allocator. We've relied on the fact that EBase is generally in the
     memory below the kernel image which we don't free, but this is
     about to change.

  2) Recent versions of U-Boot place their exception vector high in
     kseg0, in memory which isn't protected by being lower than the
     kernel anyway & can end up being clobbered.

  3) We are unnecessarily reliant upon there being memory at the address
     EBase points to upon entry to the kernel. This is often the case,
     but if the bootloader doesn't configure EBase & leaves it with its
     default value then we rely upon there being memory at physical
     address 0 for no good reason.

Improve this situation by allocating the exception vector in all cases
when running on MIPSr2 or higher, and reserving the memory for MIPSr1 or
lower. This ensures we don't clobber the exception vector in any
configuration, and for MIPSr2 & higher removes the need for memory at
physical address 0.

Signed-off-by: Paul Burton <paul.burton@mips.com>
---
 arch/mips/kernel/traps.c | 35 +++++++++++++++--------------------
 1 file changed, 15 insertions(+), 20 deletions(-)

diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index 00f44b16385e..9b565ed51662 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -2284,18 +2284,27 @@ void __init trap_init(void)
 	extern char except_vec3_generic;
 	extern char except_vec4;
 	extern char except_vec3_r4000;
-	unsigned long i;
+	unsigned long i, vec_size;
+	phys_addr_t ebase_pa;
 
 	check_wait();
 
-	if (cpu_has_veic || cpu_has_vint) {
-		unsigned long size = 0x200 + VECTORSPACING*64;
-		phys_addr_t ebase_pa;
+	if (!cpu_has_mips_r2_r6) {
+		ebase = CAC_BASE;
+		ebase_pa = virt_to_phys((void *)ebase);
+		vec_size = 0x400;
+
+		memblock_reserve(ebase_pa, vec_size);
+	} else {
+		if (cpu_has_veic || cpu_has_vint)
+			vec_size = 0x200 + VECTORSPACING*64;
+		else
+			vec_size = PAGE_SIZE;
 
-		ebase_pa = memblock_phys_alloc(size, 1 << fls(size));
+		ebase_pa = memblock_phys_alloc(vec_size, 1 << fls(vec_size));
 		if (!ebase_pa)
 			panic("%s: Failed to allocate %lu bytes align=0x%x\n",
-			      __func__, size, 1 << fls(size));
+			      __func__, vec_size, 1 << fls(vec_size));
 
 		/*
 		 * Try to ensure ebase resides in KSeg0 if possible.
@@ -2312,20 +2321,6 @@ void __init trap_init(void)
 			ebase = CKSEG0ADDR(ebase_pa);
 		else
 			ebase = (unsigned long)phys_to_virt(ebase_pa);
-	} else {
-		ebase = CAC_BASE;
-
-		if (cpu_has_mips_r2_r6) {
-			if (cpu_has_ebase_wg) {
-#ifdef CONFIG_64BIT
-				ebase = (read_c0_ebase_64() & ~0xfff);
-#else
-				ebase = (read_c0_ebase() & ~0xfff);
-#endif
-			} else {
-				ebase += (read_c0_ebase() & 0x3ffff000);
-			}
-		}
 	}
 
 	if (cpu_has_mmips) {
-- 
2.21.0


  reply index

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-04-30 22:53 [PATCH 0/4] MIPS: Exception vector improvements Paul Burton
2019-04-30 22:53 ` Paul Burton [this message]
2019-04-30 22:53 ` [PATCH 1/4] MIPS: Use memblock_phys_alloc() for exception vector Paul Burton
2019-05-01 14:32   ` Philippe Mathieu-Daudé
2019-04-30 22:53 ` [PATCH 4/4] MIPS: Remove duplicate EBase configuration Paul Burton
2019-04-30 22:53 ` [PATCH 3/4] MIPS: Sync icache for whole exception vector Paul Burton
2019-05-01 15:09   ` Philippe Mathieu-Daudé
2019-05-02 13:59 ` [PATCH 0/4] MIPS: Exception vector improvements Serge Semin
2019-05-02 18:35 ` Paul Burton

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