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From: Paul Burton <>
To: "" <>
Cc: Paul Burton <>, Huacai Chen <>
Subject: [PATCH] MIPS: Drop Loongson _CACHE_* definitions
Date: Sat, 31 Aug 2019 15:41:59 +0000
Message-ID: <> (raw)

_CACHE_CACHABLE_NONCOHERENT is defined as 3<<_CACHE_SHIFT by default, so
there's no need to define it as such specifically for Loongson.

_CACHE_CACHABLE_COHERENT is not used anywhere in the kernel, so there's
no need to define it at all.

Finally the comment found alongside these definitions seems incorrect -
it suggests that we're defining _CACHE_CACHABLE_NONCOHERENT such that it
actually provides coherence, but the opposite seems to be true & instead
the unused _CACHE_CACHABLE_COHERENT is defined as the typically
incoherent value.

Delete the whole thing, which will have no effect on the compiled code

Signed-off-by: Paul Burton <>
Cc: Huacai Chen <>

 arch/mips/include/asm/pgtable-bits.h | 7 -------
 1 file changed, 7 deletions(-)

diff --git a/arch/mips/include/asm/pgtable-bits.h b/arch/mips/include/asm/pgtable-bits.h
index 5f1ced8cba07..409ae01ed7be 100644
--- a/arch/mips/include/asm/pgtable-bits.h
+++ b/arch/mips/include/asm/pgtable-bits.h
@@ -221,13 +221,6 @@ static inline uint64_t pte_to_entrylo(unsigned long pte_val)
-#elif defined(CONFIG_CPU_LOONGSON3)
-/* Using COHERENT flag for NONCOHERENT doesn't hurt. */
 #elif defined(CONFIG_MACH_INGENIC)
 /* Ingenic uses the WA bit to achieve write-combine memory writes */

             reply index

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-08-31 15:41 Paul Burton [this message]
2019-09-01  2:41 ` 陈华才
2019-09-02  0:47   ` [PATCH] " Jiaxun Yang
2019-09-01 22:53 ` Philippe Mathieu-Daudé
2019-09-02  0:51 ` Jiaxun Yang
2019-09-03 20:47 ` Paul Burton

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