[PATCH mips-fixes 0/2] MIPS: BMIPS: couple of fixes

[PATCH mips-fixes 0/2] MIPS: BMIPS: couple of fixes

[Florian Fainelli]

Hi Thomas,

These two patches are fixes for the BMIPS5000/5200 CPU cores which were
missing an inclusive physical cache setting from the cpuinfo structure
and we would not be calling CPU specific initialization for secondarey
cores on the second hardware thread.

Thanks!

Florian Fainelli (2):
  MIPS: mm: BMIPS5000 has inclusive physical caches
  MIPS: BMIPS: Also call bmips_cpu_setup() for secondary cores

 arch/mips/kernel/smp-bmips.c | 2 ++
 arch/mips/mm/c-r4k.c         | 4 ++++
 2 files changed, 6 insertions(+)

-- 
2.17.1

[PATCH mips-fixes 1/2] MIPS: mm: BMIPS5000 has inclusive physical caches

[Florian Fainelli]

When the BMIPS generic cpu-feature-overrides.h file was introduced,
cpu_has_inclusive_caches/MIPS_CPU_INCLUSIVE_CACHES was not set for
BMIPS5000 CPUs. Correct this when we have initialized the MIPS secondary
cache successfully.

Fixes: f337967d6d87 ("MIPS: BMIPS: Add cpu-feature-overrides.h")
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
 arch/mips/mm/c-r4k.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
index fc5a6d25f74f..0ef717093262 100644
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -1712,7 +1712,11 @@ static void setup_scache(void)
 				printk("MIPS secondary cache %ldkB, %s, linesize %d bytes.\n",
 				       scache_size >> 10,
 				       way_string[c->scache.ways], c->scache.linesz);
+
+				if (current_cpu_type() == CPU_BMIPS5000)
+					c->options |= MIPS_CPU_INCLUSIVE_CACHES;
 			}
+
 #else
 			if (!(c->scache.flags & MIPS_CACHE_NOT_PRESENT))
 				panic("Dunno how to handle MIPS32 / MIPS64 second level cache");
-- 
2.17.1

[PATCH mips-fixes 2/2] MIPS: BMIPS: Also call bmips_cpu_setup() for secondary cores

[Florian Fainelli]

The initialization done by bmips_cpu_setup() typically affects both
threads of a given core, on 7435 which supports 2 cores and 2 threads,
logical CPU number 2 and 3 would not run this initialization.

Fixes: 738a3f79027b ("MIPS: BMIPS: Add early CPU initialization code")
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
 arch/mips/kernel/smp-bmips.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/mips/kernel/smp-bmips.c b/arch/mips/kernel/smp-bmips.c
index 2f513506a3d5..1dbfb5aadffd 100644
--- a/arch/mips/kernel/smp-bmips.c
+++ b/arch/mips/kernel/smp-bmips.c
@@ -239,6 +239,8 @@ static int bmips_boot_secondary(int cpu, struct task_struct *idle)
  */
 static void bmips_init_secondary(void)
 {
+	bmips_cpu_setup();
+
 	switch (current_cpu_type()) {
 	case CPU_BMIPS4350:
 	case CPU_BMIPS4380:
-- 
2.17.1

Re: [PATCH mips-fixes 0/2] MIPS: BMIPS: couple of fixes

[Thomas Bogendoerfer]

On Wed, Aug 19, 2020 at 11:26:43AM -0700, Florian Fainelli wrote:
> Hi Thomas,
> 
> These two patches are fixes for the BMIPS5000/5200 CPU cores which were
> missing an inclusive physical cache setting from the cpuinfo structure
> and we would not be calling CPU specific initialization for secondarey
> cores on the second hardware thread.
> 
> Thanks!
> 
> Florian Fainelli (2):
>   MIPS: mm: BMIPS5000 has inclusive physical caches
>   MIPS: BMIPS: Also call bmips_cpu_setup() for secondary cores
> 
>  arch/mips/kernel/smp-bmips.c | 2 ++
>  arch/mips/mm/c-r4k.c         | 4 ++++
>  2 files changed, 6 insertions(+)

series applied to mips-fixes.

Thomas.

-- 
Crap can work. Given enough thrust pigs will fly, but it's not necessarily a
good idea.                                                [ RFC1925, 2.3 ]