From: Paul Cercueil <paul@crapouillou.net>
To: Paul Boddie <paul@boddie.org.uk>
Cc: "H. Nikolaus Schaller" <hns@goldelico.com>,
Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
Geert Uytterhoeven <geert+renesas@glider.be>,
Kees Cook <keescook@chromium.org>,
"Eric W. Biederman" <ebiederm@xmission.com>,
Miquel Raynal <miquel.raynal@bootlin.com>,
David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>,
Andrzej Hajda <a.hajda@samsung.com>,
Neil Armstrong <narmstrong@baylibre.com>,
Robert Foss <robert.foss@linaro.org>,
Laurent Pinchart <Laurent.pinchart@ideasonboard.com>,
Jernej Skrabec <jernej.skrabec@gmail.com>,
Ezequiel Garcia <ezequiel@collabora.com>,
Harry Wentland <harry.wentland@amd.com>,
Sam Ravnborg <sam@ravnborg.org>,
Maxime Ripard <maxime@cerno.tech>,
Hans Verkuil <hverkuil-cisco@xs4all.nl>,
Liam Girdwood <lgirdwood@gmail.com>,
Mark Brown <broonie@kernel.org>,
devicetree@vger.kernel.org, linux-mips@vger.kernel.org,
linux-kernel@vger.kernel.org, letux-kernel@openphoenux.org,
Jon as Karlman <jonas@kwiboo.se>,
dri-devel@lists.freedesktop.org
Subject: Re: [PATCH v5 5/7] MIPS: DTS: jz4780: Account for Synopsys HDMI driver and LCD controllers
Date: Tue, 05 Oct 2021 22:52:35 +0100 [thread overview]
Message-ID: <N3YI0R.7ZLKK5JTBXW63@crapouillou.net> (raw)
In-Reply-To: <3514743.EH6qe8WxYI@jason>
Hi Paul,
Le mar., oct. 5 2021 at 23:44:12 +0200, Paul Boddie
<paul@boddie.org.uk> a écrit :
> On Tuesday, 5 October 2021 22:50:12 CEST Paul Cercueil wrote:
>> Hi Nikolaus & Paul,
>>
>> Le mar., oct. 5 2021 at 14:29:17 +0200, H. Nikolaus Schaller
> <hns@goldelico.com> a écrit :
>> >
>> > diff --git a/arch/mips/boot/dts/ingenic/jz4780.dtsi
>> > b/arch/mips/boot/dts/ingenic/jz4780.dtsi
>> > index 9e34f433b9b5..c3c18a59c377 100644
>> > --- a/arch/mips/boot/dts/ingenic/jz4780.dtsi
>> > +++ b/arch/mips/boot/dts/ingenic/jz4780.dtsi
>> > @@ -424,6 +424,51 @@ i2c4: i2c@10054000 {
>> >
>> > status = "disabled";
>> >
>> > };
>> >
>> > + hdmi: hdmi@10180000 {
>> > + compatible = "ingenic,jz4780-dw-hdmi";
>> > + reg = <0x10180000 0x8000>;
>> > + reg-io-width = <4>;
>> > +
>> > + clocks = <&cgu JZ4780_CLK_AHB0>, <&cgu JZ4780_CLK_HDMI>;
>> > + clock-names = "iahb", "isfr";
>> > +
>> > + assigned-clocks = <&cgu JZ4780_CLK_HDMI>;
>> > + assigned-clock-rates = <27000000>;
>>
>> Any reason why this is set to 27 MHz? Is it even required? Because
>> with
>> the current ci20.dts, it won't be clocked at anything but 48 MHz.
>
> EXCLK will be 48MHz, but the aim is to set the HDMI peripheral clock
> to 27MHz,
> which is supposedly required. I vaguely recall a conversation about
> whether we
> were doing this right, but I don't recall any conclusion.
But right now your HDMI clock is 48 MHz and HDMI works.
>> > +
>> > + interrupt-parent = <&intc>;
>> > + interrupts = <3>;
>> > +
>> > + /* ddc-i2c-bus = <&i2c4>; */
>> > +
>> > + status = "disabled";
>> > + };
>> > +
>> > + lcdc0: lcdc0@13050000 {
>> > + compatible = "ingenic,jz4780-lcd";
>> > + reg = <0x13050000 0x1800>;
>> > +
>> > + clocks = <&cgu JZ4780_CLK_TVE>, <&cgu JZ4780_CLK_LCD0PIXCLK>;
>> > + clock-names = "lcd", "lcd_pclk";
>> > +
>> > + interrupt-parent = <&intc>;
>> > + interrupts = <31>;
>> > +
>> > + status = "disabled";
>>
>> I think you can keep lcdc0 enabled by default (not lcdc1 though),
>> since
>> it is highly likely that you'd want that.
>
> As far as I know, the clock gating for the LCD controllers acts like
> a series
> circuit, meaning that they both need to be enabled. Some testing
> seemed to
> confirm this. Indeed, I seem to remember only enabling one clock and
> not
> getting any output until I figured this weird arrangement out.
I'm not talking about clocks though, but about LCDC0 and LCDC1.
Cheers,
-Paul
next prev parent reply other threads:[~2021-10-05 21:52 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-05 12:29 [PATCH v5 0/7] MIPS: JZ4780 and CI20 HDMI H. Nikolaus Schaller
2021-10-05 12:29 ` [PATCH v5 1/7] drm/ingenic: Fix drm_init error path if IPU was registered H. Nikolaus Schaller
2021-10-05 12:29 ` [PATCH v5 2/7] drm/ingenic: Add support for JZ4780 and HDMI output H. Nikolaus Schaller
2021-10-05 20:22 ` Paul Cercueil
[not found] ` <7CEBB741-2218-40A7-9800-B3A154895274@goldelico.com>
2021-11-07 19:01 ` Paul Cercueil
2021-11-07 20:25 ` H. Nikolaus Schaller
2021-11-08 9:37 ` Paul Cercueil
2021-11-08 10:52 ` H. Nikolaus Schaller
2021-11-08 12:20 ` Paul Cercueil
2021-11-08 15:29 ` H. Nikolaus Schaller
2021-11-08 16:30 ` Paul Cercueil
2021-11-08 17:22 ` H. Nikolaus Schaller
2021-11-08 17:49 ` Paul Cercueil
2021-11-08 18:33 ` H. Nikolaus Schaller
2021-11-08 18:53 ` Paul Cercueil
2021-12-22 14:03 ` H. Nikolaus Schaller
2022-01-18 14:50 ` H. Nikolaus Schaller
2022-01-18 16:58 ` Paul Cercueil
2022-01-18 17:14 ` H. Nikolaus Schaller
[not found] ` <13356060.GkHXLIg068@jason>
2022-01-19 6:40 ` H. Nikolaus Schaller
2022-01-19 20:04 ` Paul Boddie
2021-10-05 12:29 ` [PATCH v5 3/7] dt-bindings: display: Add ingenic,jz4780-dw-hdmi DT Schema H. Nikolaus Schaller
2021-10-05 20:43 ` Paul Cercueil
2021-11-07 13:43 ` H. Nikolaus Schaller
2021-11-07 19:03 ` Paul Cercueil
2021-10-05 22:45 ` Rob Herring
2021-10-05 12:29 ` [PATCH v5 4/7] drm/ingenic: Add dw-hdmi driver for jz4780 H. Nikolaus Schaller
2021-10-05 12:29 ` [PATCH v5 5/7] MIPS: DTS: jz4780: Account for Synopsys HDMI driver and LCD controllers H. Nikolaus Schaller
2021-10-05 20:50 ` Paul Cercueil
2021-10-05 21:44 ` Paul Boddie
2021-10-05 21:52 ` Paul Cercueil [this message]
2021-11-07 13:45 ` H. Nikolaus Schaller
2021-11-07 19:05 ` Paul Cercueil
2021-11-09 20:19 ` H. Nikolaus Schaller
2021-11-09 20:36 ` Paul Cercueil
2021-11-09 20:42 ` H. Nikolaus Schaller
2021-11-09 21:14 ` [Letux-kernel] " H. Nikolaus Schaller
2021-10-05 12:29 ` [PATCH v5 6/7] MIPS: DTS: CI20: Add DT nodes for HDMI setup H. Nikolaus Schaller
2021-10-05 12:29 ` [PATCH v5 7/7] MIPS: defconfig: CI20: configure for DRM_DW_HDMI_JZ4780 H. Nikolaus Schaller
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