Re: arm64: dts: rockchip: Disable HS400 for mmc on rk3399-roc-pc

[Doug Anderson <dianders-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>]

Hi,


On Fri, Nov 15, 2019 at 3:19 AM Heiko Stübner <heiko@sntech.de> wrote:
>
> Hi Markus,
>
> Am Freitag, 15. November 2019, 11:37:58 CET schrieb Markus Reichl:
> > Am 14.11.19 um 14:10 schrieb Heiko Stuebner:
> > > $subject is missing the [PATCH] prefix
> > will fix.
>
> no need to resend just for this ... just to keep in mind for future patches ;-)
>
>
> > > Am Montag, 11. November 2019, 10:51:04 CET schrieb Markus Reichl:
> > >> Working with rootfs on two 128GB mmcs on rk3399-roc-pc.
> > >>
> > >> One (mmc name 128G72, one screw hole) works fine in HS400 mode.
> > >> Other (mmc name DJNB4R, firefly on pcb, two screw holes) gets lots of
> > >> mmc1: "running CQE recovery", even hangs with damaged fs,
> > >> when running under heavy load, e.g. compiling kernel.
> > >> Both run fine with HS200.
> > >>
> > >> Disabling CQ with patch mmc: core: Add MMC Command Queue Support kernel parameter [0] did not help.
> > >> [0] https://gitlab.com/ayufan-repos/rock64/linux-mainline-kernel/commit/54e264154b87dfe32a8359b2726e2d5611adbaf3
> > >
> > > I'm hoping for some input from other people in Cc but your mail headers
> > > also referenced the drive-impendance series from Christoph [0], which
> > > it seems we need to poke the phy maintainer again.
> > >
> > > Did you check if changing the impedance helped (like the signal dampening
> > > Philipp described in one of the replies there).
> >
> > checked with
> >
> > &emmc_phy {
> > +       drive-impedance-ohm = <33>;
> >
> > gives no improvement:
>
> That is sad ... I guess we really should disable hs400 then ...
> that may give others more incentive to dive deeper ;-)

Just out of curiosity, is the problem with the strobe line, or with
hs400?  Have you tried using the solution from "rk3399-gru.dtsi"?
Namely:

        /*
         * Signal integrity isn't great at 200 MHz and 150 MHz (DDR) gives the
         * same (or nearly the same) performance for all eMMC that are intended
         * to be used.
         */
        assigned-clock-rates = <150000000>;

IIRC hs400 on rk3399 was a bit iffy but running at 150 MHz made it
much more reliable and still gave you 300 MB/s transfer rate (so much
better than hs200).  In reality many eMMC chips can't do > 300 MB/s
anyway.

-Doug

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