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From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: "Marty E. Plummer" <hanetzer@startmail.com>
Cc: arnd@arndb.de, cai.huoqing@linux.dev, christian.koenig@amd.com,
	devicetree@vger.kernel.org, gengdongjiu@huawei.com,
	krzysztof.kozlowski+dt@linaro.org,
	linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org,
	linux@armlinux.org.uk, michael@walle.cc,
	miquel.raynal@bootlin.com, mturquette@baylibre.com,
	novikov@ispras.ru, olof@lixom.net, p.yadav@ti.com,
	rdunlap@infradead.org, richard@nod.at, robh+dt@kernel.org,
	sboyd@kernel.org, soc@kernel.org, sumit.semwal@linaro.org,
	tudor.ambarus@microchip.com, vigneshr@ti.com,
	xuwei5@hisilicon.com
Subject: Re: [RFC v2 2/2] arm: hisi: enable Hi3521a soc
Date: Tue, 3 May 2022 17:57:52 +0200	[thread overview]
Message-ID: <0df2fd83-951c-d253-6494-3b70f5762aae@linaro.org> (raw)
In-Reply-To: <20220503155141.ekbysx6fjom5el2h@proprietary-killer>

On 03/05/2022 17:51, Marty E. Plummer wrote:
>>>> A bit weird interrupts... the same?
>>>>
>>> Yes, though I am aware that some sp804 timers do have a separate
>>> interrupts per pair.
>>
>> They have also separate interrupts, one combined interrupt or one sole
>> interrupt. However what you described here is one interrupt line
>> physically connected to two separate pins on the device yet still not
>> being somehow shared (shared as "combined interrupt"). I don't think it
>> is your case...
>>
> Unsure. datasheet just says '33 | Timer0/Timer1'. I don't think these
> timers are attached to pins, however.

So it looks like a combined interrupt, doesn't it?


Best regards,
Krzysztof

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      reply	other threads:[~2022-05-03 15:58 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-01  5:44 [PATCH 0/2] Hi3521a support Marty E. Plummer
     [not found] ` <20220501173423.2473093-1-hanetzer@startmail.com>
2022-05-03 11:37   ` [RFC v2 " Krzysztof Kozlowski
     [not found]   ` <20220501173423.2473093-2-hanetzer@startmail.com>
2022-05-03 11:37     ` [RFC v2 1/2] clk: hisilicon: add CRG driver Hi3521a SoC Krzysztof Kozlowski
2022-06-01 10:58       ` Marty E. Plummer
2022-06-01 11:00         ` Krzysztof Kozlowski
2022-06-01 11:06           ` Marty E. Plummer
2022-06-01 11:09             ` Krzysztof Kozlowski
2022-06-01 18:24               ` Marty E. Plummer
2022-06-02  6:37                 ` Krzysztof Kozlowski
2022-06-03 11:22                   ` Marty E. Plummer
2022-06-05 14:54                     ` Krzysztof Kozlowski
2022-06-06  7:29                       ` Krzysztof Kozlowski
2022-06-06 11:34                         ` Marty E. Plummer
     [not found]   ` <20220501173423.2473093-3-hanetzer@startmail.com>
2022-05-03 11:47     ` [RFC v2 2/2] arm: hisi: enable Hi3521a soc Krzysztof Kozlowski
2022-05-03 13:44       ` Marty E. Plummer
2022-05-03 14:55         ` Krzysztof Kozlowski
2022-05-03 15:51           ` Marty E. Plummer
2022-05-03 15:57             ` Krzysztof Kozlowski [this message]

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