From: "Marty E. Plummer" <hanetzer@startmail.com>
To: mturquette@baylibre.com, sboyd@kernel.org, robh+dt@kernel.org,
krzysztof.kozlowski+dt@linaro.org, gengdongjiu@huawei.com,
rdunlap@infradead.org, hanetzer@startmail.com,
linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org,
devicetree@vger.kernel.org, tudor.ambarus@microchip.com,
p.yadav@ti.com, michael@walle.cc, miquel.raynal@bootlin.com,
richard@nod.at, vigneshr@ti.com, sumit.semwal@linaro.org,
christian.koenig@amd.com, cai.huoqing@linux.dev,
novikov@ispras.ru, linux-mtd@lists.infradead.org
Subject: [PATCH 0/2] Hi3521a support.
Date: Sun, 1 May 2022 00:44:40 -0500 [thread overview]
Message-ID: <20220501054440.2434247-1-hanetzer@startmail.com> (raw)
Hey folks. Its been a while. Finally got back on the kernel dev train.
This *mostly* seems to work, but I've ran into an issue which may
require some upstream support.
Basic gist, I was attempting to boot a buildroot-built intramfs, was
mostly working, but it would not give me a login prompt no matter how
much I badgered it, so I decided to try a flash boot. That also failed,
and after much banging my head on the desk and annoying people on irc,
we finally came across *why* it was failing, or at least part of it.
The kernel parser could produce the mtdblockN partitions based on the
devicetree, but for whatever reason, when the hisilicon,fmc-spi-nor read
its superblock, instead of the magic 0x73717368 (sqsh), it read back 0x73717360.
At first I thought it was a mistake of mine, as we had tried modifying
the header, and 0x60 is a `, so it could be a hex editing issue, but nope.
Reading the data in u-boot (2010.06, vendor fork, would like to get mainline
running on it at some point) showed the correct magic, so its something
with the controller driver, I guess. CC'ing the people associated with
that as well, hopefully we can get to the bottom of this.
Marty E. Plummer (2):
clk: hisilicon: add CRG driver Hi3521a SoC
arm: hisi: enable Hi3521a soc
arch/arm/boot/dts/Makefile | 2 +
arch/arm/mach-hisi/Kconfig | 9 ++
drivers/clk/hisilicon/Kconfig | 8 ++
drivers/clk/hisilicon/Makefile | 1 +
drivers/clk/hisilicon/crg-hi3521a.c | 141 ++++++++++++++++++++++
include/dt-bindings/clock/hi3521a-clock.h | 34 ++++++
6 files changed, 195 insertions(+)
create mode 100644 drivers/clk/hisilicon/crg-hi3521a.c
create mode 100644 include/dt-bindings/clock/hi3521a-clock.h
--
2.35.1
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next reply other threads:[~2022-05-01 5:45 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-01 5:44 Marty E. Plummer [this message]
[not found] ` <20220501173423.2473093-1-hanetzer@startmail.com>
2022-05-03 11:37 ` [RFC v2 0/2] Hi3521a support Krzysztof Kozlowski
[not found] ` <20220501173423.2473093-2-hanetzer@startmail.com>
2022-05-03 11:37 ` [RFC v2 1/2] clk: hisilicon: add CRG driver Hi3521a SoC Krzysztof Kozlowski
2022-06-01 10:58 ` Marty E. Plummer
2022-06-01 11:00 ` Krzysztof Kozlowski
2022-06-01 11:06 ` Marty E. Plummer
2022-06-01 11:09 ` Krzysztof Kozlowski
2022-06-01 18:24 ` Marty E. Plummer
2022-06-02 6:37 ` Krzysztof Kozlowski
2022-06-03 11:22 ` Marty E. Plummer
2022-06-05 14:54 ` Krzysztof Kozlowski
2022-06-06 7:29 ` Krzysztof Kozlowski
2022-06-06 11:34 ` Marty E. Plummer
[not found] ` <20220501173423.2473093-3-hanetzer@startmail.com>
2022-05-03 11:47 ` [RFC v2 2/2] arm: hisi: enable Hi3521a soc Krzysztof Kozlowski
2022-05-03 13:44 ` Marty E. Plummer
2022-05-03 14:55 ` Krzysztof Kozlowski
2022-05-03 15:51 ` Marty E. Plummer
2022-05-03 15:57 ` Krzysztof Kozlowski
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