* [PATCH 1/2] mtd: spi-nor: spansion: Replace hardcoded values for addr_nbytes/addr_mode_nbytes
2022-07-28 4:14 [PATCH 0/2] mtd: spi-nor: manufacturers: Replace hardcoded values for addr_nbytes/addr_mode_nbytes Tudor Ambarus
@ 2022-07-28 4:14 ` Tudor Ambarus
2022-07-28 4:27 ` Tudor.Ambarus
2022-07-28 4:14 ` [PATCH 2/2] mtd: spi-nor: micron-st.c: " Tudor Ambarus
2022-10-25 2:33 ` [PATCH 0/2] mtd: spi-nor: manufacturers: " Tudor Ambarus
2 siblings, 1 reply; 7+ messages in thread
From: Tudor Ambarus @ 2022-07-28 4:14 UTC (permalink / raw)
To: p.yadav, michael, Takahiro.Kuwano, tkuw584924
Cc: miquel.raynal, richard, vigneshr, Bacem.Daassi, linux-mtd, Tudor Ambarus
We track in the core the internal address mode of the flash. Stop using
hardcoded values for the number of bytes of address and use
nor->addr_nbytes and nor->params->addr_mode_nbytes instead.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
---
drivers/mtd/spi-nor/spansion.c | 16 +++++++++++-----
1 file changed, 11 insertions(+), 5 deletions(-)
diff --git a/drivers/mtd/spi-nor/spansion.c b/drivers/mtd/spi-nor/spansion.c
index 0150049007be..676ffd6d12ec 100644
--- a/drivers/mtd/spi-nor/spansion.c
+++ b/drivers/mtd/spi-nor/spansion.c
@@ -49,11 +49,13 @@ static int cypress_nor_octal_dtr_en(struct spi_nor *nor)
struct spi_mem_op op;
u8 *buf = nor->bouncebuf;
int ret;
+ u8 addr_mode_nbytes = nor->params->addr_mode_nbytes;
/* Use 24 dummy cycles for memory array reads. */
*buf = SPINOR_REG_CYPRESS_CFR2V_MEMLAT_11_24;
op = (struct spi_mem_op)
- CYPRESS_NOR_WR_ANY_REG_OP(3, SPINOR_REG_CYPRESS_CFR2V, 1, buf);
+ CYPRESS_NOR_WR_ANY_REG_OP(addr_mode_nbytes,
+ SPINOR_REG_CYPRESS_CFR2V, 1, buf);
ret = spi_nor_write_any_volatile_reg(nor, &op, nor->reg_proto);
if (ret)
@@ -64,14 +66,16 @@ static int cypress_nor_octal_dtr_en(struct spi_nor *nor)
/* Set the octal and DTR enable bits. */
buf[0] = SPINOR_REG_CYPRESS_CFR5V_OCT_DTR_EN;
op = (struct spi_mem_op)
- CYPRESS_NOR_WR_ANY_REG_OP(3, SPINOR_REG_CYPRESS_CFR5V, 1, buf);
+ CYPRESS_NOR_WR_ANY_REG_OP(addr_mode_nbytes,
+ SPINOR_REG_CYPRESS_CFR5V, 1, buf);
ret = spi_nor_write_any_volatile_reg(nor, &op, nor->reg_proto);
if (ret)
return ret;
/* Read flash ID to make sure the switch was successful. */
- ret = spi_nor_read_id(nor, 4, 3, buf, SNOR_PROTO_8_8_8_DTR);
+ ret = spi_nor_read_id(nor, nor->addr_nbytes, 3, buf,
+ SNOR_PROTO_8_8_8_DTR);
if (ret) {
dev_dbg(nor->dev, "error %d reading JEDEC ID after enabling 8D-8D-8D mode\n", ret);
return ret;
@@ -97,7 +101,8 @@ static int cypress_nor_octal_dtr_dis(struct spi_nor *nor)
buf[0] = SPINOR_REG_CYPRESS_CFR5V_OCT_DTR_DS;
buf[1] = 0;
op = (struct spi_mem_op)
- CYPRESS_NOR_WR_ANY_REG_OP(4, SPINOR_REG_CYPRESS_CFR5V, 2, buf);
+ CYPRESS_NOR_WR_ANY_REG_OP(nor->addr_nbytes,
+ SPINOR_REG_CYPRESS_CFR5V, 2, buf);
ret = spi_nor_write_any_volatile_reg(nor, &op, SNOR_PROTO_8_8_8_DTR);
if (ret)
return ret;
@@ -191,7 +196,8 @@ static int cypress_nor_quad_enable_volatile(struct spi_nor *nor)
static int cypress_nor_set_page_size(struct spi_nor *nor)
{
struct spi_mem_op op =
- CYPRESS_NOR_RD_ANY_REG_OP(3, SPINOR_REG_CYPRESS_CFR3V,
+ CYPRESS_NOR_RD_ANY_REG_OP(nor->params->addr_mode_nbytes,
+ SPINOR_REG_CYPRESS_CFR3V,
nor->bouncebuf);
int ret;
--
2.25.1
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH 2/2] mtd: spi-nor: micron-st.c: Replace hardcoded values for addr_nbytes/addr_mode_nbytes
2022-07-28 4:14 [PATCH 0/2] mtd: spi-nor: manufacturers: Replace hardcoded values for addr_nbytes/addr_mode_nbytes Tudor Ambarus
2022-07-28 4:14 ` [PATCH 1/2] mtd: spi-nor: spansion: " Tudor Ambarus
@ 2022-07-28 4:14 ` Tudor Ambarus
2022-10-25 2:33 ` [PATCH 0/2] mtd: spi-nor: manufacturers: " Tudor Ambarus
2 siblings, 0 replies; 7+ messages in thread
From: Tudor Ambarus @ 2022-07-28 4:14 UTC (permalink / raw)
To: p.yadav, michael, Takahiro.Kuwano, tkuw584924
Cc: miquel.raynal, richard, vigneshr, Bacem.Daassi, linux-mtd, Tudor Ambarus
We track in the core the internal address mode of the flash. Stop using
hardcoded values for the number of bytes of address and use
nor->addr_nbytes and nor->params->addr_mode_nbytes instead.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
---
drivers/mtd/spi-nor/micron-st.c | 10 +++++++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff --git a/drivers/mtd/spi-nor/micron-st.c b/drivers/mtd/spi-nor/micron-st.c
index 3c9681a3f7a3..3c8a90b39c8c 100644
--- a/drivers/mtd/spi-nor/micron-st.c
+++ b/drivers/mtd/spi-nor/micron-st.c
@@ -52,18 +52,21 @@ static int micron_st_nor_octal_dtr_en(struct spi_nor *nor)
struct spi_mem_op op;
u8 *buf = nor->bouncebuf;
int ret;
+ u8 addr_mode_nbytes = nor->params->addr_mode_nbytes;
/* Use 20 dummy cycles for memory array reads. */
*buf = 20;
op = (struct spi_mem_op)
- MICRON_ST_NOR_WR_ANY_REG_OP(3, SPINOR_REG_MT_CFR1V, 1, buf);
+ MICRON_ST_NOR_WR_ANY_REG_OP(addr_mode_nbytes,
+ SPINOR_REG_MT_CFR1V, 1, buf);
ret = spi_nor_write_any_volatile_reg(nor, &op, nor->reg_proto);
if (ret)
return ret;
buf[0] = SPINOR_MT_OCT_DTR;
op = (struct spi_mem_op)
- MICRON_ST_NOR_WR_ANY_REG_OP(3, SPINOR_REG_MT_CFR0V, 1, buf);
+ MICRON_ST_NOR_WR_ANY_REG_OP(addr_mode_nbytes,
+ SPINOR_REG_MT_CFR0V, 1, buf);
ret = spi_nor_write_any_volatile_reg(nor, &op, nor->reg_proto);
if (ret)
return ret;
@@ -98,7 +101,8 @@ static int micron_st_nor_octal_dtr_dis(struct spi_nor *nor)
buf[0] = SPINOR_MT_EXSPI;
buf[1] = SPINOR_REG_MT_CFR1V_DEF;
op = (struct spi_mem_op)
- MICRON_ST_NOR_WR_ANY_REG_OP(4, SPINOR_REG_MT_CFR0V, 2, buf);
+ MICRON_ST_NOR_WR_ANY_REG_OP(nor->addr_nbytes,
+ SPINOR_REG_MT_CFR0V, 2, buf);
ret = spi_nor_write_any_volatile_reg(nor, &op, SNOR_PROTO_8_8_8_DTR);
if (ret)
return ret;
--
2.25.1
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH 0/2] mtd: spi-nor: manufacturers: Replace hardcoded values for addr_nbytes/addr_mode_nbytes
2022-07-28 4:14 [PATCH 0/2] mtd: spi-nor: manufacturers: Replace hardcoded values for addr_nbytes/addr_mode_nbytes Tudor Ambarus
2022-07-28 4:14 ` [PATCH 1/2] mtd: spi-nor: spansion: " Tudor Ambarus
2022-07-28 4:14 ` [PATCH 2/2] mtd: spi-nor: micron-st.c: " Tudor Ambarus
@ 2022-10-25 2:33 ` Tudor Ambarus
2 siblings, 0 replies; 7+ messages in thread
From: Tudor Ambarus @ 2022-10-25 2:33 UTC (permalink / raw)
To: Takahiro.Kuwano, tkuw584924, tudor.ambarus, michael, p.yadav
Cc: linux-mtd, miquel.raynal, Bacem.Daassi, richard, vigneshr
On Thu, 28 Jul 2022 07:14:49 +0300, Tudor Ambarus wrote:
> We track in the core the internal address mode of the flash. Stop using
> hardcoded values for the number of bytes of address and use
> nor->addr_nbytes and nor->params->addr_mode_nbytes instead.
>
> I don't have those flashes to test the changes, so I'll need some
> Tested-by tags.
>
> [...]
Applied to spi-nor/next, thanks!
[1/2] mtd: spi-nor: spansion: Replace hardcoded values for addr_nbytes/addr_mode_nbytes
https://git.kernel.org/mtd/c/05ebc1ccb8af
[2/2] mtd: spi-nor: micron-st.c: Replace hardcoded values for addr_nbytes/addr_mode_nbytes
https://git.kernel.org/mtd/c/2fe99a867050
Best regards,
--
Tudor Ambarus <tudor.ambarus@microchip.com>
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
^ permalink raw reply [flat|nested] 7+ messages in thread