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From: <Tudor.Ambarus@microchip.com>
To: <vigneshr@ti.com>, <p.yadav@ti.com>, <miquel.raynal@bootlin.com>,
	<richard@nod.at>, <linux-mtd@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>
Cc: boris.brezillon@collabora.com, nsekhar@ti.com
Subject: Re: [PATCH v16 14/15] mtd: spi-nor: spansion: add support for Cypress Semper flash
Date: Mon, 9 Nov 2020 13:28:11 +0000
Message-ID: <2885e3ae-3a03-d6c1-4cb8-3c56256713ab@microchip.com> (raw)
In-Reply-To: <7d058da8-90ef-8f71-fe86-cc0b27a2895a@ti.com>

On 11/7/20 9:58 AM, Vignesh Raghavendra wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> 
> Hi,
> 
> [...]
> 
> On 10/5/20 9:01 PM, Pratyush Yadav wrote:
>> +static int spi_nor_cypress_octal_dtr_enable(struct spi_nor *nor, bool enable)
>> +{
>> +     struct spi_mem_op op;
>> +     u8 *buf = nor->bouncebuf;
>> +     int ret;
>> +
>> +     if (enable) {
>> +             /* Use 24 dummy cycles for memory array reads. */
>> +             ret = spi_nor_write_enable(nor);
>> +             if (ret)
>> +                     return ret;
>> +
>> +             *buf = SPINOR_REG_CYPRESS_CFR2V_MEMLAT_11_24;
>> +             op = (struct spi_mem_op)
>> +                     SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_WR_ANY_REG, 1),
>> +                                SPI_MEM_OP_ADDR(3, SPINOR_REG_CYPRESS_CFR2V,
>> +                                                1),
>> +                                SPI_MEM_OP_NO_DUMMY,
>> +                                SPI_MEM_OP_DATA_OUT(1, buf, 1));
>> +
>> +             ret = spi_mem_exec_op(nor->spimem, &op);
>> +             if (ret)
>> +                     return ret;
>> +
>> +             ret = spi_nor_wait_till_ready(nor);
>> +             if (ret)
>> +                     return ret;
>> +
>> +             nor->read_dummy = 24;
>> +     }
>> +
>> +     /* Set/unset the octal and DTR enable bits. */
>> +     ret = spi_nor_write_enable(nor);
>> +     if (ret)
>> +             return ret;
>> +
>> +     if (enable)
>> +             *buf = SPINOR_REG_CYPRESS_CFR5V_OCT_DTR_EN;
>> +     else
>> +             *buf = SPINOR_REG_CYPRESS_CFR5V_OCT_DTR_DS;
>> +
>> +     op = (struct spi_mem_op)
>> +             SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_WR_ANY_REG, 1),
>> +                        SPI_MEM_OP_ADDR(enable ? 3 : 4,
>> +                                        SPINOR_REG_CYPRESS_CFR5V,
>> +                                        1),
>> +                        SPI_MEM_OP_NO_DUMMY,
>> +                        SPI_MEM_OP_DATA_OUT(1, buf, 1));
>> +
>> +     if (!enable)
>> +             spi_nor_spimem_setup_op(nor, &op, SNOR_PROTO_8_8_8_DTR);
>> +
>> +     ret = spi_mem_exec_op(nor->spimem, &op);
>> +     if (ret)
>> +             return ret;
>> +
>> +     /* Give some time for the mode change to take place. */
>> +     usleep_range(1000, 1500);
>> +
> 
> This delay is no longer needed right? I can drop it while applying, if
> you confirm.
> 
> Tudor: Could you provide your R-by?

with usleep_range dropped one can add:

Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>

Cheers,
ta
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  parent reply index

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-10-05 15:31 [PATCH v16 00/15] mtd: spi-nor: add xSPI Octal DTR support Pratyush Yadav
2020-10-05 15:31 ` [PATCH v16 01/15] mtd: spi-nor: core: use EOPNOTSUPP instead of ENOTSUPP Pratyush Yadav
2020-10-05 15:31 ` [PATCH v16 02/15] mtd: spi-nor: add spi_nor_controller_ops_{read_reg, write_reg, erase}() Pratyush Yadav
2020-10-05 15:31 ` [PATCH v16 03/15] mtd: spi-nor: add support for DTR protocol Pratyush Yadav
2020-10-05 15:31 ` [PATCH v16 04/15] mtd: spi-nor: sfdp: get command opcode extension type from BFPT Pratyush Yadav
2020-10-05 15:31 ` [PATCH v16 05/15] mtd: spi-nor: sfdp: parse xSPI Profile 1.0 table Pratyush Yadav
2020-10-27  9:58   ` Tudor.Ambarus
2020-10-05 15:31 ` [PATCH v16 06/15] mtd: spi-nor: core: use dummy cycle and address width info from SFDP Pratyush Yadav
2020-10-05 15:31 ` [PATCH v16 07/15] mtd: spi-nor: core: do 2 byte reads for SR and FSR in DTR mode Pratyush Yadav
2020-10-05 15:31 ` [PATCH v16 08/15] mtd: spi-nor: Introduce SNOR_F_IO_MODE_EN_VOLATILE Pratyush Yadav
2020-10-05 15:31 ` [PATCH v16 09/15] mtd: spi-nor: Parse SFDP SCCR Map Pratyush Yadav
2020-10-05 15:31 ` [PATCH v16 10/15] mtd: spi-nor: core: enable octal DTR mode when possible Pratyush Yadav
2020-10-05 15:31 ` [PATCH v16 11/15] mtd: spi-nor: sfdp: detect Soft Reset sequence support from BFPT Pratyush Yadav
2020-10-05 15:31 ` [PATCH v16 12/15] mtd: spi-nor: core: perform a Soft Reset on shutdown Pratyush Yadav
2020-10-05 15:31 ` [PATCH v16 13/15] mtd: spi-nor: core: disable Octal DTR mode on suspend Pratyush Yadav
2020-10-05 15:31 ` [PATCH v16 14/15] mtd: spi-nor: spansion: add support for Cypress Semper flash Pratyush Yadav
2020-11-07  7:58   ` Vignesh Raghavendra
2020-11-09 11:45     ` Pratyush Yadav
2020-11-09 13:28     ` Tudor.Ambarus [this message]
2020-10-05 15:31 ` [PATCH v16 15/15] mtd: spi-nor: micron-st: allow using MT35XU512ABA in Octal DTR mode Pratyush Yadav
2020-10-06  8:11   ` Tudor.Ambarus
2020-10-28  7:53 ` [PATCH v16 00/15] mtd: spi-nor: add xSPI Octal DTR support Tudor.Ambarus
2020-10-28 12:49   ` Pratyush Yadav
2020-10-28 15:21     ` Tudor.Ambarus
2020-10-28 20:02       ` Pratyush Yadav
2020-10-29  6:26       ` Vignesh Raghavendra
2020-11-09 17:25 ` Vignesh Raghavendra

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