[PATCH] usb: dwc3: dwc3-octeon: Verify clock divider

[PATCH] usb: dwc3: dwc3-octeon: Verify clock divider

[Ladislav Michl]

From: Ladislav Michl <ladis@linux-mips.org>

Although valid USB clock divider will be calculated for all valid
Octeon core frequencies, make code formally correct limiting
divider not to be greater that 7 so it fits into H_CLKDIV_SEL
field.

Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Reported-by: Linux Kernel Functional Testing <lkft@linaro.org>
Closes: https://qa-reports.linaro.org/lkft/linux-next-master/build/next-20230808/testrun/18882876/suite/build/test/gcc-8-cavium_octeon_defconfig/log
---
 Greg, if you want to resent whole serie, just drop me a note.
 Otherwise, this patch is meant to be applied on to of it.
 Thank you.

 drivers/usb/dwc3/dwc3-octeon.c | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/drivers/usb/dwc3/dwc3-octeon.c b/drivers/usb/dwc3/dwc3-octeon.c
index 6f47262a117a..73bdcebf465c 100644
--- a/drivers/usb/dwc3/dwc3-octeon.c
+++ b/drivers/usb/dwc3/dwc3-octeon.c
@@ -251,11 +251,11 @@ static int dwc3_octeon_get_divider(void)
 	while (div < ARRAY_SIZE(clk_div)) {
 		uint64_t rate = octeon_get_io_clock_rate() / clk_div[div];
 		if (rate <= 300000000 && rate >= 150000000)
-			break;
+			return div;
 		div++;
 	}
 
-	return div;
+	return -EINVAL;
 }
 
 static int dwc3_octeon_setup(struct dwc3_octeon *octeon,
@@ -289,6 +289,10 @@ static int dwc3_octeon_setup(struct dwc3_octeon *octeon,
 
 	/* Step 4b: Select controller clock frequency. */
 	div = dwc3_octeon_get_divider();
+	if (div < 0) {
+		dev_err(dev, "clock divider invalid\n");
+		return div;
+	}
 	val = dwc3_octeon_readq(uctl_ctl_reg);
 	val &= ~USBDRD_UCTL_CTL_H_CLKDIV_SEL;
 	val |= FIELD_PREP(USBDRD_UCTL_CTL_H_CLKDIV_SEL, div);
-- 
2.39.2

Re: [PATCH] usb: dwc3: dwc3-octeon: Verify clock divider

[Greg Kroah-Hartman]

On Tue, Aug 08, 2023 at 11:37:50AM +0200, Ladislav Michl wrote:
> From: Ladislav Michl <ladis@linux-mips.org>
> 
> Although valid USB clock divider will be calculated for all valid
> Octeon core frequencies, make code formally correct limiting
> divider not to be greater that 7 so it fits into H_CLKDIV_SEL
> field.
> 
> Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
> Reported-by: Linux Kernel Functional Testing <lkft@linaro.org>
> Closes: https://qa-reports.linaro.org/lkft/linux-next-master/build/next-20230808/testrun/18882876/suite/build/test/gcc-8-cavium_octeon_defconfig/log
> ---
>  Greg, if you want to resent whole serie, just drop me a note.
>  Otherwise, this patch is meant to be applied on to of it.

On top of what series?

confused,

greg k-h

Re: [PATCH] usb: dwc3: dwc3-octeon: Verify clock divider

[Ladislav Michl]

On Tue, Aug 08, 2023 at 12:00:42PM +0200, Greg Kroah-Hartman wrote:
> On Tue, Aug 08, 2023 at 11:37:50AM +0200, Ladislav Michl wrote:
> > From: Ladislav Michl <ladis@linux-mips.org>
> > 
> > Although valid USB clock divider will be calculated for all valid
> > Octeon core frequencies, make code formally correct limiting
> > divider not to be greater that 7 so it fits into H_CLKDIV_SEL
> > field.
> > 
> > Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
> > Reported-by: Linux Kernel Functional Testing <lkft@linaro.org>
> > Closes: https://qa-reports.linaro.org/lkft/linux-next-master/build/next-20230808/testrun/18882876/suite/build/test/gcc-8-cavium_octeon_defconfig/log
> > ---
> >  Greg, if you want to resent whole serie, just drop me a note.
> >  Otherwise, this patch is meant to be applied on to of it.
> 
> On top of what series?

I'm sorry, "[PATCH v5 0/7] Cleanup Octeon DWC3 glue code".
In your usb-next, last patch of serie is:
d9216d3ef538 ("usb: dwc3: dwc3-octeon: Add SPDX header and copyright")

Thanks,
	l.

Re: [PATCH] usb: dwc3: dwc3-octeon: Verify clock divider

[Greg Kroah-Hartman]

On Tue, Aug 08, 2023 at 12:38:46PM +0200, Ladislav Michl wrote:
> On Tue, Aug 08, 2023 at 12:00:42PM +0200, Greg Kroah-Hartman wrote:
> > On Tue, Aug 08, 2023 at 11:37:50AM +0200, Ladislav Michl wrote:
> > > From: Ladislav Michl <ladis@linux-mips.org>
> > > 
> > > Although valid USB clock divider will be calculated for all valid
> > > Octeon core frequencies, make code formally correct limiting
> > > divider not to be greater that 7 so it fits into H_CLKDIV_SEL
> > > field.
> > > 
> > > Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
> > > Reported-by: Linux Kernel Functional Testing <lkft@linaro.org>
> > > Closes: https://qa-reports.linaro.org/lkft/linux-next-master/build/next-20230808/testrun/18882876/suite/build/test/gcc-8-cavium_octeon_defconfig/log
> > > ---
> > >  Greg, if you want to resent whole serie, just drop me a note.
> > >  Otherwise, this patch is meant to be applied on to of it.
> > 
> > On top of what series?
> 
> I'm sorry, "[PATCH v5 0/7] Cleanup Octeon DWC3 glue code".
> In your usb-next, last patch of serie is:
> d9216d3ef538 ("usb: dwc3: dwc3-octeon: Add SPDX header and copyright")

I already took that series, so this is fine, I don't want to revert that
and have to add it all back :)

thanks,

greg k-h

Re: [PATCH] usb: dwc3: dwc3-octeon: Verify clock divider

[Thinh Nguyen]

On Tue, Aug 08, 2023, Ladislav Michl wrote:
> From: Ladislav Michl <ladis@linux-mips.org>
> 
> Although valid USB clock divider will be calculated for all valid
> Octeon core frequencies, make code formally correct limiting
> divider not to be greater that 7 so it fits into H_CLKDIV_SEL
> field.
> 
> Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
> Reported-by: Linux Kernel Functional Testing <lkft@linaro.org>
> Closes: https://urldefense.com/v3/__https://qa-reports.linaro.org/lkft/linux-next-master/build/next-20230808/testrun/18882876/suite/build/test/gcc-8-cavium_octeon_defconfig/log__;!!A4F2R9G_pg!aMHLJEE_aLERK48OJY2mcfvhm6OZMeAB8IUZUc16me_jFuy-VVsgIXn-cP5K99sPe_eEZToGWIBXQJB1CxZFVgMcJA$ 
> ---
>  Greg, if you want to resent whole serie, just drop me a note.
>  Otherwise, this patch is meant to be applied on to of it.
>  Thank you.
> 
>  drivers/usb/dwc3/dwc3-octeon.c | 8 ++++++--
>  1 file changed, 6 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/usb/dwc3/dwc3-octeon.c b/drivers/usb/dwc3/dwc3-octeon.c
> index 6f47262a117a..73bdcebf465c 100644
> --- a/drivers/usb/dwc3/dwc3-octeon.c
> +++ b/drivers/usb/dwc3/dwc3-octeon.c
> @@ -251,11 +251,11 @@ static int dwc3_octeon_get_divider(void)
>  	while (div < ARRAY_SIZE(clk_div)) {
>  		uint64_t rate = octeon_get_io_clock_rate() / clk_div[div];
>  		if (rate <= 300000000 && rate >= 150000000)
> -			break;
> +			return div;
>  		div++;
>  	}
>  
> -	return div;
> +	return -EINVAL;
>  }
>  
>  static int dwc3_octeon_setup(struct dwc3_octeon *octeon,
> @@ -289,6 +289,10 @@ static int dwc3_octeon_setup(struct dwc3_octeon *octeon,
>  
>  	/* Step 4b: Select controller clock frequency. */
>  	div = dwc3_octeon_get_divider();
> +	if (div < 0) {
> +		dev_err(dev, "clock divider invalid\n");
> +		return div;
> +	}
>  	val = dwc3_octeon_readq(uctl_ctl_reg);
>  	val &= ~USBDRD_UCTL_CTL_H_CLKDIV_SEL;
>  	val |= FIELD_PREP(USBDRD_UCTL_CTL_H_CLKDIV_SEL, div);
> -- 
> 2.39.2
> 

Acked-by: Thinh Nguyen <Thinh.Nguyen@synopsys.com>

Thanks,
Thinh

Re: [PATCH] usb: dwc3: dwc3-octeon: Verify clock divider

[Philippe Mathieu-Daudé]

On 8/8/23 11:37, Ladislav Michl wrote:
> From: Ladislav Michl <ladis@linux-mips.org>
> 
> Although valid USB clock divider will be calculated for all valid
> Octeon core frequencies, make code formally correct limiting
> divider not to be greater that 7 so it fits into H_CLKDIV_SEL
> field.
> 
> Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
> Reported-by: Linux Kernel Functional Testing <lkft@linaro.org>
> Closes: https://qa-reports.linaro.org/lkft/linux-next-master/build/next-20230808/testrun/18882876/suite/build/test/gcc-8-cavium_octeon_defconfig/log
> ---
>   Greg, if you want to resent whole serie, just drop me a note.
>   Otherwise, this patch is meant to be applied on to of it.
>   Thank you.
> 
>   drivers/usb/dwc3/dwc3-octeon.c | 8 ++++++--
>   1 file changed, 6 insertions(+), 2 deletions(-)

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>