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* [PATCH 0/3] clk: ti: dra7xx: clkctrl data fixes
@ 2020-04-30  8:36 Tero Kristo
  2020-04-30  8:36 ` [PATCH 1/3] clk: ti: dra7xx: fix gpu clkctrl parent Tero Kristo
                   ` (2 more replies)
  0 siblings, 3 replies; 7+ messages in thread
From: Tero Kristo @ 2020-04-30  8:36 UTC (permalink / raw)
  To: linux-clk, sboyd, mturquette; +Cc: tony, linux-omap

Hi,

Here are a few clkctrl data fixes for dra7 issues I noticed while
debugging the clock parenting problems on omap4/omap5.

-Tero


--
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki

^ permalink raw reply	[flat|nested] 7+ messages in thread

* [PATCH 1/3] clk: ti: dra7xx: fix gpu clkctrl parent
  2020-04-30  8:36 [PATCH 0/3] clk: ti: dra7xx: clkctrl data fixes Tero Kristo
@ 2020-04-30  8:36 ` Tero Kristo
  2020-05-14 19:55   ` Stephen Boyd
  2020-04-30  8:36 ` [PATCH 2/3] clk: ti: dra7xx: mark MCAN clock as DRA76x only Tero Kristo
  2020-04-30  8:36 ` [PATCH 3/3] clk: ti: dra7xx: fix RNG clock parent Tero Kristo
  2 siblings, 1 reply; 7+ messages in thread
From: Tero Kristo @ 2020-04-30  8:36 UTC (permalink / raw)
  To: linux-clk, sboyd, mturquette; +Cc: tony, linux-omap

gpu_cm:* parent clock name is wrong, replace this with correct
gpu-clkctrl:* clock. Otherwise the clock ends up in the orphaned list.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 drivers/clk/ti/clk-7xx.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/ti/clk-7xx.c b/drivers/clk/ti/clk-7xx.c
index 14b645093107..366cb75378cb 100644
--- a/drivers/clk/ti/clk-7xx.c
+++ b/drivers/clk/ti/clk-7xx.c
@@ -328,7 +328,7 @@ static const struct omap_clkctrl_bit_data dra7_gpu_core_bit_data[] __initconst =
 };
 
 static const struct omap_clkctrl_reg_data dra7_gpu_clkctrl_regs[] __initconst = {
-	{ DRA7_GPU_CLKCTRL, dra7_gpu_core_bit_data, CLKF_SW_SUP, "gpu_cm:clk:0000:24", },
+	{ DRA7_GPU_CLKCTRL, dra7_gpu_core_bit_data, CLKF_SW_SUP, "gpu-clkctrl:0000:24", },
 	{ 0 },
 };
 
-- 
2.17.1

--
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki

^ permalink raw reply	[flat|nested] 7+ messages in thread

* [PATCH 2/3] clk: ti: dra7xx: mark MCAN clock as DRA76x only
  2020-04-30  8:36 [PATCH 0/3] clk: ti: dra7xx: clkctrl data fixes Tero Kristo
  2020-04-30  8:36 ` [PATCH 1/3] clk: ti: dra7xx: fix gpu clkctrl parent Tero Kristo
@ 2020-04-30  8:36 ` Tero Kristo
  2020-05-14 19:55   ` Stephen Boyd
  2020-04-30  8:36 ` [PATCH 3/3] clk: ti: dra7xx: fix RNG clock parent Tero Kristo
  2 siblings, 1 reply; 7+ messages in thread
From: Tero Kristo @ 2020-04-30  8:36 UTC (permalink / raw)
  To: linux-clk, sboyd, mturquette; +Cc: tony, linux-omap

This clock entry does not exist on any other devices except DRA76,
so mark it as specific to that SoC only.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 drivers/clk/ti/clk-7xx.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/ti/clk-7xx.c b/drivers/clk/ti/clk-7xx.c
index 366cb75378cb..146d1d67c732 100644
--- a/drivers/clk/ti/clk-7xx.c
+++ b/drivers/clk/ti/clk-7xx.c
@@ -815,7 +815,7 @@ static const struct omap_clkctrl_reg_data dra7_wkupaon_clkctrl_regs[] __initcons
 	{ DRA7_WKUPAON_COUNTER_32K_CLKCTRL, NULL, 0, "wkupaon_iclk_mux" },
 	{ DRA7_WKUPAON_UART10_CLKCTRL, dra7_uart10_bit_data, CLKF_SW_SUP, "wkupaon-clkctrl:0060:24" },
 	{ DRA7_WKUPAON_DCAN1_CLKCTRL, dra7_dcan1_bit_data, CLKF_SW_SUP, "wkupaon-clkctrl:0068:24" },
-	{ DRA7_WKUPAON_ADC_CLKCTRL, NULL, CLKF_SW_SUP, "mcan_clk" },
+	{ DRA7_WKUPAON_ADC_CLKCTRL, NULL, CLKF_SW_SUP | CLKF_SOC_DRA76, "mcan_clk" },
 	{ 0 },
 };
 
-- 
2.17.1

--
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki

^ permalink raw reply	[flat|nested] 7+ messages in thread

* [PATCH 3/3] clk: ti: dra7xx: fix RNG clock parent
  2020-04-30  8:36 [PATCH 0/3] clk: ti: dra7xx: clkctrl data fixes Tero Kristo
  2020-04-30  8:36 ` [PATCH 1/3] clk: ti: dra7xx: fix gpu clkctrl parent Tero Kristo
  2020-04-30  8:36 ` [PATCH 2/3] clk: ti: dra7xx: mark MCAN clock as DRA76x only Tero Kristo
@ 2020-04-30  8:36 ` Tero Kristo
  2020-05-14 19:55   ` Stephen Boyd
  2 siblings, 1 reply; 7+ messages in thread
From: Tero Kristo @ 2020-04-30  8:36 UTC (permalink / raw)
  To: linux-clk, sboyd, mturquette; +Cc: tony, linux-omap

RNG is sourced from L4 clock. Add info for this for proper parenting of
the clock.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
---
 drivers/clk/ti/clk-7xx.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/ti/clk-7xx.c b/drivers/clk/ti/clk-7xx.c
index 146d1d67c732..bf8fced40e42 100644
--- a/drivers/clk/ti/clk-7xx.c
+++ b/drivers/clk/ti/clk-7xx.c
@@ -644,7 +644,7 @@ static const struct omap_clkctrl_reg_data dra7_l4sec_clkctrl_regs[] __initconst
 	{ DRA7_L4SEC_AES1_CLKCTRL, NULL, CLKF_HW_SUP, "l3_iclk_div" },
 	{ DRA7_L4SEC_AES2_CLKCTRL, NULL, CLKF_HW_SUP, "l3_iclk_div" },
 	{ DRA7_L4SEC_DES_CLKCTRL, NULL, CLKF_HW_SUP, "l3_iclk_div" },
-	{ DRA7_L4SEC_RNG_CLKCTRL, NULL, CLKF_HW_SUP | CLKF_SOC_NONSEC, "" },
+	{ DRA7_L4SEC_RNG_CLKCTRL, NULL, CLKF_HW_SUP | CLKF_SOC_NONSEC, "l4_root_clk_div" },
 	{ DRA7_L4SEC_SHAM_CLKCTRL, NULL, CLKF_HW_SUP, "l3_iclk_div" },
 	{ 0 },
 };
-- 
2.17.1

--
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [PATCH 1/3] clk: ti: dra7xx: fix gpu clkctrl parent
  2020-04-30  8:36 ` [PATCH 1/3] clk: ti: dra7xx: fix gpu clkctrl parent Tero Kristo
@ 2020-05-14 19:55   ` Stephen Boyd
  0 siblings, 0 replies; 7+ messages in thread
From: Stephen Boyd @ 2020-05-14 19:55 UTC (permalink / raw)
  To: Tero Kristo, linux-clk, mturquette; +Cc: tony, linux-omap

Quoting Tero Kristo (2020-04-30 01:36:38)
> gpu_cm:* parent clock name is wrong, replace this with correct
> gpu-clkctrl:* clock. Otherwise the clock ends up in the orphaned list.
> 
> Signed-off-by: Tero Kristo <t-kristo@ti.com>
> ---

Applied to clk-next

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [PATCH 2/3] clk: ti: dra7xx: mark MCAN clock as DRA76x only
  2020-04-30  8:36 ` [PATCH 2/3] clk: ti: dra7xx: mark MCAN clock as DRA76x only Tero Kristo
@ 2020-05-14 19:55   ` Stephen Boyd
  0 siblings, 0 replies; 7+ messages in thread
From: Stephen Boyd @ 2020-05-14 19:55 UTC (permalink / raw)
  To: Tero Kristo, linux-clk, mturquette; +Cc: tony, linux-omap

Quoting Tero Kristo (2020-04-30 01:36:39)
> This clock entry does not exist on any other devices except DRA76,
> so mark it as specific to that SoC only.
> 
> Signed-off-by: Tero Kristo <t-kristo@ti.com>
> ---

Applied to clk-next

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [PATCH 3/3] clk: ti: dra7xx: fix RNG clock parent
  2020-04-30  8:36 ` [PATCH 3/3] clk: ti: dra7xx: fix RNG clock parent Tero Kristo
@ 2020-05-14 19:55   ` Stephen Boyd
  0 siblings, 0 replies; 7+ messages in thread
From: Stephen Boyd @ 2020-05-14 19:55 UTC (permalink / raw)
  To: Tero Kristo, linux-clk, mturquette; +Cc: tony, linux-omap

Quoting Tero Kristo (2020-04-30 01:36:40)
> RNG is sourced from L4 clock. Add info for this for proper parenting of
> the clock.
> 
> Signed-off-by: Tero Kristo <t-kristo@ti.com>
> ---

Applied to clk-next

^ permalink raw reply	[flat|nested] 7+ messages in thread

end of thread, back to index

Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-04-30  8:36 [PATCH 0/3] clk: ti: dra7xx: clkctrl data fixes Tero Kristo
2020-04-30  8:36 ` [PATCH 1/3] clk: ti: dra7xx: fix gpu clkctrl parent Tero Kristo
2020-05-14 19:55   ` Stephen Boyd
2020-04-30  8:36 ` [PATCH 2/3] clk: ti: dra7xx: mark MCAN clock as DRA76x only Tero Kristo
2020-05-14 19:55   ` Stephen Boyd
2020-04-30  8:36 ` [PATCH 3/3] clk: ti: dra7xx: fix RNG clock parent Tero Kristo
2020-05-14 19:55   ` Stephen Boyd

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