[net-next PATCH v4 0/5] Adding pinctrl PM support for CPSW and MDIO

[net-next PATCH v4 0/5] Adding pinctrl PM support for CPSW and MDIO

[Mugunthan V N]

This patch series adds the following features
* Adding pinctrl PM support for CPSW and MDIO for Power Optimization
* Adding phy address to the CPSW node for EVMsk board

Changes from initial version
* Fixed the multiline function call indentation as per David Miller
  recommendation.

Changes from v2
* Fixed the multi comment style as per net coding style
* Fixed checkpatch error (more than 80 characters)

Changes from v3
* Removed below patch as it has already merged to net-next
	ARM: dts: AM33XX: Add CPSW phy_id device tree data to am335x-evmsk
* Rebased to net-next as there was a merge conflict in DT files

Hebbar Gururaja (1):
  net: cpsw: enhance pinctrl support

Mugunthan V N (4):
  net: davinci_mdio: enhance pinctrl support
  ARM: dts: AM33XX: Add pinmux configuration for CPSW to beaglebone
  ARM: dts: AM33XX: Add pinmux configuration for CPSW to EVMsk
  ARM: dts: AM33XX: Add pinmux configuration for CPSW to am335x EVM

 arch/arm/boot/dts/am335x-bone.dts      |   38 ++++++++++++++++++++++++
 arch/arm/boot/dts/am335x-evm.dts       |   36 +++++++++++++++++++++++
 arch/arm/boot/dts/am335x-evmsk.dts     |   50 ++++++++++++++++++++++++++++++++
 drivers/net/ethernet/ti/cpsw.c         |   48 ++++++++++++++++++++++++++++++
 drivers/net/ethernet/ti/davinci_mdio.c |   45 ++++++++++++++++++++++++++++
 5 files changed, 217 insertions(+)

-- 
1.7.9.5

[net-next PATCH v4 1/5] net: cpsw: enhance pinctrl support

[Mugunthan V N]

From: Hebbar Gururaja <gururaja.hebbar@ti.com>

Amend cpsw controller to optionally take a pin control handle and set
the state of the pins to:

- "default" on boot, resume
- "sleep" on suspend()

This should make it possible to optimize energy usage for the pins
for the suspend/resume cycle.

If any of the above pin states are missing in dt, a warning message
about the missing state is displayed.
If certain pin-states are not available, to remove this warning message
pass respective state name with null phandler.

Signed-off-by: Hebbar Gururaja <gururaja.hebbar@ti.com>
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
---
 drivers/net/ethernet/ti/cpsw.c |   48 ++++++++++++++++++++++++++++++++++++++++
 1 file changed, 48 insertions(+)

diff --git a/drivers/net/ethernet/ti/cpsw.c b/drivers/net/ethernet/ti/cpsw.c
index a45f64e..0599515 100644
--- a/drivers/net/ethernet/ti/cpsw.c
+++ b/drivers/net/ethernet/ti/cpsw.c
@@ -35,6 +35,7 @@
 #include <linux/if_vlan.h>
 
 #include <linux/platform_data/cpsw.h>
+#include <linux/pinctrl/consumer.h>
 
 #include "cpsw_ale.h"
 #include "cpts.h"
@@ -351,6 +352,11 @@ struct cpsw_priv {
 	bool irq_enabled;
 	struct cpts *cpts;
 	u32 emac_port;
+
+	/* Two optional pin states - default & sleep */
+	struct pinctrl		*pinctrl;
+	struct pinctrl_state	*pins_def;
+	struct pinctrl_state	*pins_sleep;
 };
 
 #define napi_to_priv(napi)	container_of(napi, struct cpsw_priv, napi)
@@ -1691,6 +1697,35 @@ static int cpsw_probe(struct platform_device *pdev)
 	 */
 	pm_runtime_enable(&pdev->dev);
 
+	priv->pinctrl = devm_pinctrl_get(&pdev->dev);
+	if (!IS_ERR(priv->pinctrl)) {
+		priv->pins_def = pinctrl_lookup_state(priv->pinctrl,
+						      PINCTRL_STATE_DEFAULT);
+		/* enable pins to be muxed in and configured */
+		if (IS_ERR(priv->pins_def))
+			dev_warn(&pdev->dev, "could not get default pinstate\n");
+		else
+			if (pinctrl_select_state(priv->pinctrl,
+						 priv->pins_def))
+				dev_err(&pdev->dev,
+					"could not set default pins\n");
+
+		priv->pins_sleep = pinctrl_lookup_state(priv->pinctrl,
+							PINCTRL_STATE_SLEEP);
+		if (IS_ERR(priv->pins_sleep))
+			dev_warn(&pdev->dev, "could not get sleep pinstate\n");
+	} else {
+		/* Since we continue even when pinctrl node is not found,
+		 * Invalidate pins as not available. This is to make sure that
+		 * IS_ERR(pins_xxx) results in failure when used.
+		 */
+		priv->pins_def = ERR_PTR(-ENODATA);
+		priv->pins_sleep = ERR_PTR(-ENODATA);
+
+		dev_warn(&pdev->dev,
+			 "pins are not configured from the driver\n");
+	}
+
 	if (cpsw_probe_dt(&priv->data, pdev)) {
 		pr_err("cpsw: platform data missing\n");
 		ret = -ENODEV;
@@ -1974,11 +2009,17 @@ static int cpsw_suspend(struct device *dev)
 {
 	struct platform_device	*pdev = to_platform_device(dev);
 	struct net_device	*ndev = platform_get_drvdata(pdev);
+	struct cpsw_priv	*priv = netdev_priv(ndev);
 
 	if (netif_running(ndev))
 		cpsw_ndo_stop(ndev);
 	pm_runtime_put_sync(&pdev->dev);
 
+	/* Optionally let pins go into sleep states */
+	if (!IS_ERR(priv->pins_sleep))
+		if (pinctrl_select_state(priv->pinctrl, priv->pins_sleep))
+			dev_err(dev, "could not set pins to sleep state\n");
+
 	return 0;
 }
 
@@ -1986,8 +2027,15 @@ static int cpsw_resume(struct device *dev)
 {
 	struct platform_device	*pdev = to_platform_device(dev);
 	struct net_device	*ndev = platform_get_drvdata(pdev);
+	struct cpsw_priv	*priv = netdev_priv(ndev);
 
 	pm_runtime_get_sync(&pdev->dev);
+
+	/* Optionaly enable pins to be muxed in and configured */
+	if (!IS_ERR(priv->pins_def))
+		if (pinctrl_select_state(priv->pinctrl, priv->pins_def))
+			dev_err(dev, "could not set default pins\n");
+
 	if (netif_running(ndev))
 		cpsw_ndo_open(ndev);
 	return 0;
-- 
1.7.9.5

[net-next PATCH v4 2/5] net: davinci_mdio: enhance pinctrl support

[Mugunthan V N]

Amend cpsw controller to optionally take a pin control handle and set
the state of the pins to:

- "default" on boot, resume
- "sleep" on suspend()

This should make it possible to optimize energy usage for the pins
for the suspend/resume cycle.

If any of the above pin states are missing in dt, a warning message
about the missing state is displayed.
If certain pin-states are not available, to remove this warning message
pass respective state name with null phandler.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
---
 drivers/net/ethernet/ti/davinci_mdio.c |   45 ++++++++++++++++++++++++++++++++
 1 file changed, 45 insertions(+)

diff --git a/drivers/net/ethernet/ti/davinci_mdio.c b/drivers/net/ethernet/ti/davinci_mdio.c
index 12aec17..9e6aaeb 100644
--- a/drivers/net/ethernet/ti/davinci_mdio.c
+++ b/drivers/net/ethernet/ti/davinci_mdio.c
@@ -38,6 +38,7 @@
 #include <linux/davinci_emac.h>
 #include <linux/of.h>
 #include <linux/of_device.h>
+#include <linux/pinctrl/consumer.h>
 
 /*
  * This timeout definition is a worst-case ultra defensive measure against
@@ -94,6 +95,11 @@ struct davinci_mdio_data {
 	struct mii_bus	*bus;
 	bool		suspended;
 	unsigned long	access_time; /* jiffies */
+
+	/* Two optional pin states - default & sleep */
+	struct pinctrl		*pinctrl;
+	struct pinctrl_state	*pins_def;
+	struct pinctrl_state	*pins_sleep;
 };
 
 static void __davinci_mdio_reset(struct davinci_mdio_data *data)
@@ -347,6 +353,35 @@ static int davinci_mdio_probe(struct platform_device *pdev)
 	data->bus->parent	= dev;
 	data->bus->priv		= data;
 
+	data->pinctrl = devm_pinctrl_get(&pdev->dev);
+	if (!IS_ERR(data->pinctrl)) {
+		data->pins_def = pinctrl_lookup_state(data->pinctrl,
+						      PINCTRL_STATE_DEFAULT);
+		/* enable pins to be muxed in and configured */
+		if (IS_ERR(data->pins_def))
+			dev_warn(&pdev->dev, "could not get default pinstate\n");
+		else
+			if (pinctrl_select_state(data->pinctrl,
+						 data->pins_def))
+				dev_err(&pdev->dev,
+					"could not set default pins\n");
+
+		data->pins_sleep = pinctrl_lookup_state(data->pinctrl,
+							PINCTRL_STATE_SLEEP);
+		if (IS_ERR(data->pins_sleep))
+			dev_warn(&pdev->dev, "could not get sleep pinstate\n");
+	} else {
+		/* Since we continue even when pinctrl node is not found,
+		 * Invalidate pins as not available. This is to make sure that
+		 * IS_ERR(pins_xxx) results in failure when used.
+		 */
+		data->pins_def = ERR_PTR(-ENODATA);
+		data->pins_sleep = ERR_PTR(-ENODATA);
+
+		dev_warn(&pdev->dev,
+			 "pins are not configured from the driver\n");
+	}
+
 	pm_runtime_enable(&pdev->dev);
 	pm_runtime_get_sync(&pdev->dev);
 	data->clk = clk_get(&pdev->dev, "fck");
@@ -454,6 +489,11 @@ static int davinci_mdio_suspend(struct device *dev)
 	data->suspended = true;
 	spin_unlock(&data->lock);
 
+	/* Optionally let pins go into sleep states */
+	if (!IS_ERR(data->pins_sleep))
+		if (pinctrl_select_state(data->pinctrl, data->pins_sleep))
+			dev_err(dev, "could not set pins to sleep state\n");
+
 	return 0;
 }
 
@@ -465,6 +505,11 @@ static int davinci_mdio_resume(struct device *dev)
 	spin_lock(&data->lock);
 	pm_runtime_get_sync(data->dev);
 
+	/* Optionaly enable pins to be muxed in and configured */
+	if (!IS_ERR(data->pins_def))
+		if (pinctrl_select_state(data->pinctrl, data->pins_def))
+			dev_err(dev, "could not set default pins\n");
+
 	/* restart the scan state machine */
 	ctrl = __raw_readl(&data->regs->control);
 	ctrl |= CONTROL_ENABLE;
-- 
1.7.9.5

[net-next PATCH v4 3/5] ARM: dts: AM33XX: Add pinmux configuration for CPSW to beaglebone

[Mugunthan V N]

Add pinmux configurations for MII based CPSW ethernet to am335x-bone.
In this patch, only single named mode/state is added and these pins
are configured during pinctrl driver initialization.

Default mode is nothing but the values required for the module during
active state. With this configurations module is functional as
expected.

Todo:
- if an idle state is available for pins, add support for it.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
---
 arch/arm/boot/dts/am335x-bone.dts |   38 +++++++++++++++++++++++++++++++++++++
 1 file changed, 38 insertions(+)

diff --git a/arch/arm/boot/dts/am335x-bone.dts b/arch/arm/boot/dts/am335x-bone.dts
index 4b5a8e0..008a13b 100644
--- a/arch/arm/boot/dts/am335x-bone.dts
+++ b/arch/arm/boot/dts/am335x-bone.dts
@@ -36,6 +36,33 @@
 				0x60 0x17	/* gpmc_a8.gpio1_24, OUTPUT_PULLUP | MODE7 */
 			>;
 		};
+
+		cpsw_default: cpsw_default {
+			pinctrl-single,pins = <
+				/* Slave 1 */
+				0x110 0x20	/* mii1_rxerr.mii1_rxerr, MODE0 | INPUT */
+				0x114 0x0	/* mii1_txen.mii1_txen, MODE0 | OUTPUT */
+				0x118 0x20	/* mii1_rxdv.mii1_rxdv, MODE0 | INPUT_PULLDOWN */
+				0x11c 0x0	/* mii1_txd3.mii1_txd3, MODE0 | OUTPUT */
+				0x120 0x0	/* mii1_txd2.mii1_txd2, MODE0 | OUTPUT */
+				0x124 0x0	/* mii1_txd1.mii1_txd1, MODE0 | OUTPUT */
+				0x128 0x0	/* mii1_txd0.mii1_txd0, MODE0 | OUTPUT */
+				0x12c 0x20	/* mii1_txclk.mii1_txclk, MODE0 | INPUT_PULLDOWN */
+				0x130 0x20	/* mii1_rxclk.mii1_rxclk, MODE0 | INPUT_PULLDOWN */
+				0x134 0x20	/* mii1_rxd3.mii1_rxd3, MODE0 | INPUT_PULLDOWN */
+				0x138 0x20	/* mii1_rxd2.mii1_rxd2, MODE0 | INPUT_PULLDOWN */
+				0x13c 0x20	/* mii1_rxd1.mii1_rxd1, MODE0 | INPUT_PULLDOWN */
+				0x140 0x20	/* mii1_rxd0.mii1_rxd0, MODE0 | INPUT_PULLDOWN */
+			>;
+		};
+
+		davinci_mdio_default: davinci_mdio_default {
+			pinctrl-single,pins = <
+				/* MDIO */
+				0x148 0x30	/* mdio_data.mdio_data, MODE0 | INPUT_PULLUP */
+				0x14c 0x10	/* mdio_clk.mdio_clk, MODE0 | OUTPUT_PULLUP */
+			>;
+		};
 	};
 
 	ocp {
@@ -138,3 +165,14 @@
 	phy_id = <&davinci_mdio>, <1>;
 	phy-mode = "mii";
 };
+
+&mac {
+	pinctrl-names = "default";
+	pinctrl-0 = <&cpsw_default>;
+
+};
+
+&davinci_mdio {
+	pinctrl-names = "default";
+	pinctrl-0 = <&davinci_mdio_default>;
+};
-- 
1.7.9.5

[net-next PATCH v4 4/5] ARM: dts: AM33XX: Add pinmux configuration for CPSW to EVMsk

[Mugunthan V N]

Add pinmux configurations for MII based CPSW ethernet to AM335x EVMsk.
In this patch, only single named mode/state is added and these pins
are configured during pinctrl driver initialization.

Default mode is nothing but the values required for the module during
active state. With this configurations module is functional as
expected.

Todo:
- if an idle state is available for pins, add support for it.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
---
 arch/arm/boot/dts/am335x-evmsk.dts |   50 ++++++++++++++++++++++++++++++++++++
 1 file changed, 50 insertions(+)

diff --git a/arch/arm/boot/dts/am335x-evmsk.dts b/arch/arm/boot/dts/am335x-evmsk.dts
index 4297899..4827486 100644
--- a/arch/arm/boot/dts/am335x-evmsk.dts
+++ b/arch/arm/boot/dts/am335x-evmsk.dts
@@ -51,6 +51,46 @@
 				0x9c 0x27	/* gpmc_ben0_cle.gpio2_5, INPUT | MODE7 */
 			>;
 		};
+
+		cpsw_default: cpsw_default {
+			pinctrl-single,pins = <
+				/* Slave 1 */
+				0x114 0x2	/* mii1_txen.rgmii1_tctl, MODE2 | OUTPUT */
+				0x118 0x22	/* mii1_rxdv.rgmii1_rctl, MODE2 | INPUT_PULLDOWN */
+				0x11c 0x2	/* mii1_txd3.rgmii1_td3, MODE2 | OUTPUT */
+				0x120 0x2	/* mii1_txd2.rgmii1_td2, MODE2 | OUTPUT */
+				0x124 0x2	/* mii1_txd1.rgmii1_td1, MODE2 | OUTPUT */
+				0x128 0x2	/* mii1_txd0.rgmii1_td0, MODE2 | OUTPUT */
+				0x12c 0x2	/* mii1_txclk.rgmii1_tclk, MODE2 | OUTPUT */
+				0x130 0x22	/* mii1_rxclk.rgmii1_rclk, MODE2 | INPUT_PULLDOWN */
+				0x134 0x22	/* mii1_rxd3.rgmii1_rd3, MODE2 | INPUT_PULLDOWN */
+				0x138 0x22	/* mii1_rxd2.rgmii1_rd2, MODE2 | INPUT_PULLDOWN */
+				0x13c 0x22	/* mii1_rxd1.rgmii1_rd1, MODE2 | INPUT_PULLDOWN */
+				0x140 0x22	/* mii1_rxd0.rgmii1_rd0, MODE2 | INPUT_PULLDOWN */
+
+				/* Slave 2 */
+				0x40 0x2	/* gpmc_a0.rgmii2_tctl", MODE2 | OUTPUT */
+				0x44 0x22	/* gpmc_a1.rgmii2_rctl", MODE2 | INPUT_PULLDOWN */
+				0x48 0x2	/* gpmc_a2.rgmii2_td3", MODE2 | OUTPUT */
+				0x4c 0x2	/* gpmc_a3.rgmii2_td2", MODE2 | OUTPUT */
+				0x50 0x2	/* gpmc_a4.rgmii2_td1", MODE2 | OUTPUT */
+				0x54 0x2	/* gpmc_a5.rgmii2_td0", MODE2 | OUTPUT */
+				0x58 0x2	/* gpmc_a6.rgmii2_tclk", MODE2 | OUTPUT */
+				0x5c 0x22	/* gpmc_a7.rgmii2_rclk", MODE2 | INPUT_PULLDOWN */
+				0x60 0x22	/* gpmc_a8.rgmii2_rd3", MODE2 | INPUT_PULLDOWN */
+				0x64 0x22	/* gpmc_a9.rgmii2_rd2", MODE2 | INPUT_PULLDOWN */
+				0x68 0x22	/* gpmc_a10.rgmii2_rd1", MODE2 | INPUT_PULLDOWN */
+				0x6c 0x22	/* gpmc_a11.rgmii2_rd0", MODE2 | INPUT_PULLDOWN */
+			>;
+		};
+
+		davinci_mdio_default: davinci_mdio_default {
+			pinctrl-single,pins = <
+				/* MDIO */
+				0x148 0x30	/* mdio_data.mdio_data, MODE0 | INPUT_PULLUP */
+				0x14c 0x10	/* mdio_clk.mdio_clk, MODE0 | OUTPUT_PULLUP */
+			>;
+		};
 	};
 
 	ocp {
@@ -249,6 +289,16 @@
 	};
 };
 
+&mac {
+	pinctrl-names = "default";
+	pinctrl-0 = <&cpsw_default>;
+};
+
+&davinci_mdio {
+	pinctrl-names = "default";
+	pinctrl-0 = <&davinci_mdio_default>;
+};
+
 &cpsw_emac0 {
 	phy_id = <&davinci_mdio>, <0>;
 	phy-mode = "rgmii-txid";
-- 
1.7.9.5

[net-next PATCH v4 5/5] ARM: dts: AM33XX: Add pinmux configuration for CPSW to am335x EVM

[Mugunthan V N]

Add pinmux configurations for RGMII based CPSW ethernet to am335x-evm.
In this patch, only single named mode/state is added and these pins
are configured during pinctrl driver initialization.

Default mode is nothing but the values required for the module during
active state. With this configurations module is functional as
expected.

Todo:
- if an idle state is available for pins, add support for it.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
---
 arch/arm/boot/dts/am335x-evm.dts |   36 ++++++++++++++++++++++++++++++++++++
 1 file changed, 36 insertions(+)

diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts
index 814ee03..5db4b05 100644
--- a/arch/arm/boot/dts/am335x-evm.dts
+++ b/arch/arm/boot/dts/am335x-evm.dts
@@ -44,6 +44,32 @@
 				0x154 0x27	/* spi0_d0.gpio0_3, INPUT | MODE7 */
 			>;
 		};
+
+		cpsw_default: cpsw_default {
+			pinctrl-single,pins = <
+				/* Slave 1 */
+				0x114 0x2	/* mii1_txen.rgmii1_tctl, MODE2 | OUTPUT */
+				0x118 0x22	/* mii1_rxdv.rgmii1_rctl, MODE2 | INPUT_PULLDOWN */
+				0x11c 0x2	/* mii1_txd3.rgmii1_td3, MODE2 | OUTPUT */
+				0x120 0x2	/* mii1_txd2.rgmii1_td2, MODE2 | OUTPUT */
+				0x124 0x2	/* mii1_txd1.rgmii1_td1, MODE2 | OUTPUT */
+				0x128 0x2	/* mii1_txd0.rgmii1_td0, MODE2 | OUTPUT */
+				0x12c 0x2	/* mii1_txclk.rgmii1_tclk, MODE2 | OUTPUT */
+				0x130 0x22	/* mii1_rxclk.rgmii1_rclk, MODE2 | INPUT_PULLDOWN */
+				0x134 0x22	/* mii1_rxd3.rgmii1_rd3, MODE2 | INPUT_PULLDOWN */
+				0x138 0x22	/* mii1_rxd2.rgmii1_rd2, MODE2 | INPUT_PULLDOWN */
+				0x13c 0x22	/* mii1_rxd1.rgmii1_rd1, MODE2 | INPUT_PULLDOWN */
+				0x140 0x22	/* mii1_rxd0.rgmii1_rd0, MODE2 | INPUT_PULLDOWN */
+			>;
+		};
+
+		davinci_mdio_default: davinci_mdio_default {
+			pinctrl-single,pins = <
+				/* MDIO */
+				0x148 0x30	/* mdio_data.mdio_data, MODE0 | INPUT_PULLUP */
+				0x14c 0x10	/* mdio_clk.mdio_clk, MODE0 | OUTPUT_PULLUP */
+			>;
+		};
 	};
 
 	ocp {
@@ -237,6 +263,16 @@
 	};
 };
 
+&mac {
+	pinctrl-names = "default";
+	pinctrl-0 = <&cpsw_default>;
+};
+
+&davinci_mdio {
+	pinctrl-names = "default";
+	pinctrl-0 = <&davinci_mdio_default>;
+};
+
 &cpsw_emac0 {
 	phy_id = <&davinci_mdio>, <0>;
 	phy-mode = "rgmii-txid";
-- 
1.7.9.5

Re: [net-next PATCH v4 1/5] net: cpsw: enhance pinctrl support

[Mark Brown]

[-- Attachment #1.1: Type: text/plain, Size: 489 bytes --]

On Wed, Jun 05, 2013 at 10:38:15PM +0530, Mugunthan V N wrote:
> From: Hebbar Gururaja <gururaja.hebbar-l0cyMroinI0@public.gmane.org>
> 
> Amend cpsw controller to optionally take a pin control handle and set
> the state of the pins to:
> 
> - "default" on boot, resume
> - "sleep" on suspend()

Linus Walleij posted some patches which factor the state setting code
out into generic functions earlier on today - it probably makes sense to
pick those up rather than open coding

[-- Attachment #1.2: Digital signature --]
[-- Type: application/pgp-signature, Size: 836 bytes --]

[-- Attachment #2: Type: text/plain, Size: 192 bytes --]

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Re: [net-next PATCH v4 1/5] net: cpsw: enhance pinctrl support

[Mugunthan V N]

On 6/6/2013 12:53 AM, Mark Brown wrote:
> On Wed, Jun 05, 2013 at 10:38:15PM +0530, Mugunthan V N wrote:
>> From: Hebbar Gururaja <gururaja.hebbar@ti.com>
>>
>> Amend cpsw controller to optionally take a pin control handle and set
>> the state of the pins to:
>>
>> - "default" on boot, resume
>> - "sleep" on suspend()
> Linus Walleij posted some patches which factor the state setting code
> out into generic functions earlier on today - it probably makes sense to
> pick those up rather than open coding
But this can go in as Linus Walleij's patch is not accepted yet. Once 
that is
accepted and present in net git repo I will submit a separate patch to use
those APIs from pin ctrl core.

Regards
Mugunthan V N

Re: [net-next PATCH v4 3/5] ARM: dts: AM33XX: Add pinmux configuration for CPSW to beaglebone

[Florian Vaussard]

Hello,

On 06/05/2013 07:08 PM, Mugunthan V N wrote:
> Add pinmux configurations for MII based CPSW ethernet to am335x-bone.
> In this patch, only single named mode/state is added and these pins
> are configured during pinctrl driver initialization.
>
> Default mode is nothing but the values required for the module during
> active state. With this configurations module is functional as
> expected.
>
> Todo:
> - if an idle state is available for pins, add support for it.
>
> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
> ---
>   arch/arm/boot/dts/am335x-bone.dts |   38 +++++++++++++++++++++++++++++++++++++
>   1 file changed, 38 insertions(+)
>
> diff --git a/arch/arm/boot/dts/am335x-bone.dts b/arch/arm/boot/dts/am335x-bone.dts
> index 4b5a8e0..008a13b 100644
> --- a/arch/arm/boot/dts/am335x-bone.dts
> +++ b/arch/arm/boot/dts/am335x-bone.dts
> @@ -36,6 +36,33 @@
>   				0x60 0x17	/* gpmc_a8.gpio1_24, OUTPUT_PULLUP | MODE7 */
>   			>;
>   		};
> +
> +		cpsw_default: cpsw_default {
> +			pinctrl-single,pins = <
> +				/* Slave 1 */
> +				0x110 0x20	/* mii1_rxerr.mii1_rxerr, MODE0 | INPUT */

Here I guess that the comment should be INPUT_PULLDOWN, instead of INPUT.

> +				0x114 0x0	/* mii1_txen.mii1_txen, MODE0 | OUTPUT */

As bit PULLUDENABLE is 0, the pulldown is enabled according to the TRM, 
right?
Is this a desirable behaviour, as it will consume power when outputting 
a high level?
And consequently, the comment should probably be OUTPUT_PULLDOWN, no?

> +				0x118 0x20	/* mii1_rxdv.mii1_rxdv, MODE0 | INPUT_PULLDOWN */
> +				0x11c 0x0	/* mii1_txd3.mii1_txd3, MODE0 | OUTPUT */
> +				0x120 0x0	/* mii1_txd2.mii1_txd2, MODE0 | OUTPUT */
> +				0x124 0x0	/* mii1_txd1.mii1_txd1, MODE0 | OUTPUT */
> +				0x128 0x0	/* mii1_txd0.mii1_txd0, MODE0 | OUTPUT */

Same questions here.

> +				0x12c 0x20	/* mii1_txclk.mii1_txclk, MODE0 | INPUT_PULLDOWN */
> +				0x130 0x20	/* mii1_rxclk.mii1_rxclk, MODE0 | INPUT_PULLDOWN */
> +				0x134 0x20	/* mii1_rxd3.mii1_rxd3, MODE0 | INPUT_PULLDOWN */
> +				0x138 0x20	/* mii1_rxd2.mii1_rxd2, MODE0 | INPUT_PULLDOWN */
> +				0x13c 0x20	/* mii1_rxd1.mii1_rxd1, MODE0 | INPUT_PULLDOWN */
> +				0x140 0x20	/* mii1_rxd0.mii1_rxd0, MODE0 | INPUT_PULLDOWN */
> +			>;
> +		};
> +
> +		davinci_mdio_default: davinci_mdio_default {
> +			pinctrl-single,pins = <
> +				/* MDIO */
> +				0x148 0x30	/* mdio_data.mdio_data, MODE0 | INPUT_PULLUP */
> +				0x14c 0x10	/* mdio_clk.mdio_clk, MODE0 | OUTPUT_PULLUP */
> +			>;
> +		};
>   	};
>
>   	ocp {
> @@ -138,3 +165,14 @@
>   	phy_id = <&davinci_mdio>, <1>;
>   	phy-mode = "mii";
>   };
> +
> +&mac {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&cpsw_default>;
> +
> +};
> +
> +&davinci_mdio {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&davinci_mdio_default>;
> +};
>

Regards,

Florian

Re: [net-next PATCH v4 0/5] Adding pinctrl PM support for CPSW and MDIO

[Benoit Cousson]

Hi Mugunthan,

On 06/05/2013 07:08 PM, Mugunthan V N wrote:
> This patch series adds the following features
> * Adding pinctrl PM support for CPSW and MDIO for Power Optimization
> * Adding phy address to the CPSW node for EVMsk board
> 
> Changes from initial version
> * Fixed the multiline function call indentation as per David Miller
>   recommendation.
> 
> Changes from v2
> * Fixed the multi comment style as per net coding style
> * Fixed checkpatch error (more than 80 characters)
> 
> Changes from v3
> * Removed below patch as it has already merged to net-next
> 	ARM: dts: AM33XX: Add CPSW phy_id device tree data to am335x-evmsk
> * Rebased to net-next as there was a merge conflict in DT files

You should try to avoid pushing DTS patches outside the arm-soc tree, it
will generate a bunch a conflict when arm-soc and net trees will be merged.

Could you post separately all the DTS patches and rebase them on the
for_3.11/dts branch that already contains a bunch of AM33xx patches?

Thanks,
Benoit

> 
> Hebbar Gururaja (1):
>   net: cpsw: enhance pinctrl support
> 
> Mugunthan V N (4):
>   net: davinci_mdio: enhance pinctrl support
>   ARM: dts: AM33XX: Add pinmux configuration for CPSW to beaglebone
>   ARM: dts: AM33XX: Add pinmux configuration for CPSW to EVMsk
>   ARM: dts: AM33XX: Add pinmux configuration for CPSW to am335x EVM
> 
>  arch/arm/boot/dts/am335x-bone.dts      |   38 ++++++++++++++++++++++++
>  arch/arm/boot/dts/am335x-evm.dts       |   36 +++++++++++++++++++++++
>  arch/arm/boot/dts/am335x-evmsk.dts     |   50 ++++++++++++++++++++++++++++++++
>  drivers/net/ethernet/ti/cpsw.c         |   48 ++++++++++++++++++++++++++++++
>  drivers/net/ethernet/ti/davinci_mdio.c |   45 ++++++++++++++++++++++++++++
>  5 files changed, 217 insertions(+)
> 

Re: [net-next PATCH v4 3/5] ARM: dts: AM33XX: Add pinmux configuration for CPSW to beaglebone

[Mugunthan V N]

On 6/6/2013 12:36 PM, Florian Vaussard wrote:
> Hello,
>
> On 06/05/2013 07:08 PM, Mugunthan V N wrote:
>> Add pinmux configurations for MII based CPSW ethernet to am335x-bone.
>> In this patch, only single named mode/state is added and these pins
>> are configured during pinctrl driver initialization.
>>
>> Default mode is nothing but the values required for the module during
>> active state. With this configurations module is functional as
>> expected.
>>
>> Todo:
>> - if an idle state is available for pins, add support for it.
>>
>> Signed-off-by: Mugunthan V N <mugunthanvnm-l0cyMroinI0@public.gmane.org>
>> ---
>>   arch/arm/boot/dts/am335x-bone.dts |   38 
>> +++++++++++++++++++++++++++++++++++++
>>   1 file changed, 38 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/am335x-bone.dts 
>> b/arch/arm/boot/dts/am335x-bone.dts
>> index 4b5a8e0..008a13b 100644
>> --- a/arch/arm/boot/dts/am335x-bone.dts
>> +++ b/arch/arm/boot/dts/am335x-bone.dts
>> @@ -36,6 +36,33 @@
>>                   0x60 0x17    /* gpmc_a8.gpio1_24, OUTPUT_PULLUP | 
>> MODE7 */
>>               >;
>>           };
>> +
>> +        cpsw_default: cpsw_default {
>> +            pinctrl-single,pins = <
>> +                /* Slave 1 */
>> +                0x110 0x20    /* mii1_rxerr.mii1_rxerr, MODE0 | 
>> INPUT */
>
> Here I guess that the comment should be INPUT_PULLDOWN, instead of INPUT.
Good catch, I will modify this and submit next version today.
>
>> +                0x114 0x0    /* mii1_txen.mii1_txen, MODE0 | OUTPUT */
>
> As bit PULLUDENABLE is 0, the pulldown is enabled according to the 
> TRM, right?
> Is this a desirable behaviour, as it will consume power when 
> outputting a high level?
This is the desirable behavior.
> And consequently, the comment should probably be OUTPUT_PULLDOWN, no?
Will update this in next version of patch series.

Regards
Mugunthan V N

Re: [net-next PATCH v4 0/5] Adding pinctrl PM support for CPSW and MDIO

[Mugunthan V N]

On 6/6/2013 1:12 PM, Benoit Cousson wrote:
> Hi Mugunthan,
>
> On 06/05/2013 07:08 PM, Mugunthan V N wrote:
>> This patch series adds the following features
>> * Adding pinctrl PM support for CPSW and MDIO for Power Optimization
>> * Adding phy address to the CPSW node for EVMsk board
>>
>> Changes from initial version
>> * Fixed the multiline function call indentation as per David Miller
>>    recommendation.
>>
>> Changes from v2
>> * Fixed the multi comment style as per net coding style
>> * Fixed checkpatch error (more than 80 characters)
>>
>> Changes from v3
>> * Removed below patch as it has already merged to net-next
>> 	ARM: dts: AM33XX: Add CPSW phy_id device tree data to am335x-evmsk
>> * Rebased to net-next as there was a merge conflict in DT files
> You should try to avoid pushing DTS patches outside the arm-soc tree, it
> will generate a bunch a conflict when arm-soc and net trees will be merged.
>
> Could you post separately all the DTS patches and rebase them on the
> for_3.11/dts branch that already contains a bunch of AM33xx patches?
Benoit

Will separate out the DT patches and will submit on top of for_3.11/dts 
today as v5.

Regards
Mugunthan V N

Re: [net-next PATCH v4 1/5] net: cpsw: enhance pinctrl support

[Mark Brown]

[-- Attachment #1: Type: text/plain, Size: 847 bytes --]

On Thu, Jun 06, 2013 at 11:29:39AM +0530, Mugunthan V N wrote:
> On 6/6/2013 12:53 AM, Mark Brown wrote:

> >Linus Walleij posted some patches which factor the state setting code
> >out into generic functions earlier on today - it probably makes sense to
> >pick those up rather than open coding

> But this can go in as Linus Walleij's patch is not accepted yet.
> Once that is
> accepted and present in net git repo I will submit a separate patch to use
> those APIs from pin ctrl core.

Linus' change has pretty much gone in already but in any case what would
be sensible here would be to write this in turns of Linus' changes and
then send the patch to him to add to his series so it can go in via the
same route.  One of the major reasons for the patch was that lots of
people were querying the amount of noise caused by this sort of change.

[-- Attachment #2: Digital signature --]
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Re: [net-next PATCH v4 1/5] net: cpsw: enhance pinctrl support

[Linus Walleij]

On Thu, Jun 6, 2013 at 10:50 AM, Mark Brown <broonie@kernel.org> wrote:
> On Thu, Jun 06, 2013 at 11:29:39AM +0530, Mugunthan V N wrote:
>> On 6/6/2013 12:53 AM, Mark Brown wrote:
>
>> >Linus Walleij posted some patches which factor the state setting code
>> >out into generic functions earlier on today - it probably makes sense to
>> >pick those up rather than open coding
>
>> But this can go in as Linus Walleij's patch is not accepted yet.
>> Once that is
>> accepted and present in net git repo I will submit a separate patch to use
>> those APIs from pin ctrl core.
>
> Linus' change has pretty much gone in already but in any case what would
> be sensible here would be to write this in turns of Linus' changes and
> then send the patch to him to add to his series so it can go in via the
> same route.  One of the major reasons for the patch was that lots of
> people were querying the amount of noise caused by this sort of change.

I agree. We should be able to settle on the new core API quite soon,
then I can carry the patch to this driver if you obtain David's ACK.

Yours,
Linus Walleij

Re: [net-next PATCH v4 1/5] net: cpsw: enhance pinctrl support

[David Miller]

From: Linus Walleij <linus.walleij@linaro.org>
Date: Fri, 7 Jun 2013 09:31:58 +0200

> On Thu, Jun 6, 2013 at 10:50 AM, Mark Brown <broonie@kernel.org> wrote:
>> On Thu, Jun 06, 2013 at 11:29:39AM +0530, Mugunthan V N wrote:
>>> On 6/6/2013 12:53 AM, Mark Brown wrote:
>>
>>> >Linus Walleij posted some patches which factor the state setting code
>>> >out into generic functions earlier on today - it probably makes sense to
>>> >pick those up rather than open coding
>>
>>> But this can go in as Linus Walleij's patch is not accepted yet.
>>> Once that is
>>> accepted and present in net git repo I will submit a separate patch to use
>>> those APIs from pin ctrl core.
>>
>> Linus' change has pretty much gone in already but in any case what would
>> be sensible here would be to write this in turns of Linus' changes and
>> then send the patch to him to add to his series so it can go in via the
>> same route.  One of the major reasons for the patch was that lots of
>> people were querying the amount of noise caused by this sort of change.
> 
> I agree. We should be able to settle on the new core API quite soon,
> then I can carry the patch to this driver if you obtain David's ACK.

If you want to merge the direct networking parts of this series into
another tree, I'm fine with that:

Acked-by: David S. Miller <davem@davemloft.net>

Re: [net-next PATCH v4 1/5] net: cpsw: enhance pinctrl support

[Mugunthan V N]

On 6/7/2013 1:12 PM, David Miller wrote:
> From: Linus Walleij <linus.walleij@linaro.org>
> Date: Fri, 7 Jun 2013 09:31:58 +0200
>
>> On Thu, Jun 6, 2013 at 10:50 AM, Mark Brown <broonie@kernel.org> wrote:
>>> On Thu, Jun 06, 2013 at 11:29:39AM +0530, Mugunthan V N wrote:
>>>> On 6/6/2013 12:53 AM, Mark Brown wrote:
>>>>> Linus Walleij posted some patches which factor the state setting code
>>>>> out into generic functions earlier on today - it probably makes sense to
>>>>> pick those up rather than open coding
>>>> But this can go in as Linus Walleij's patch is not accepted yet.
>>>> Once that is
>>>> accepted and present in net git repo I will submit a separate patch to use
>>>> those APIs from pin ctrl core.
>>> Linus' change has pretty much gone in already but in any case what would
>>> be sensible here would be to write this in turns of Linus' changes and
>>> then send the patch to him to add to his series so it can go in via the
>>> same route.  One of the major reasons for the patch was that lots of
>>> people were querying the amount of noise caused by this sort of change.
>> I agree. We should be able to settle on the new core API quite soon,
>> then I can carry the patch to this driver if you obtain David's ACK.
> If you want to merge the direct networking parts of this series into
> another tree, I'm fine with that:
>
> Acked-by: David S. Miller <davem@davemloft.net>
David

Can you the below patch series as i have adopted pinctrl PM api in 
another series,
this patch has direct usage of pinctrl_select_state apis
http://marc.info/?l=linux-netdev&m=137054250018667&w=2

Linus Walleij

Please drop this patch series and take my other [atch set mentioned above
with David's Ack.

Regards
Mugunthan V N

Re: [net-next PATCH v4 1/5] net: cpsw: enhance pinctrl support

[Linus Walleij]

On Fri, Jun 7, 2013 at 4:49 PM, Mugunthan V N <mugunthanvnm@ti.com> wrote:

>> If you want to merge the direct networking parts of this series into
>> another tree, I'm fine with that:
>>
>> Acked-by: David S. Miller <davem@davemloft.net>
>
> David
>
> Can you the below patch series as i have adopted pinctrl PM api in another
> series,
> this patch has direct usage of pinctrl_select_state apis
> http://marc.info/?l=linux-netdev&m=137054250018667&w=2
>
> Linus Walleij
>
> Please drop this patch series and take my other [atch set mentioned above
> with David's Ack.

Sure I didn't see David ACK the new versions explicitly but
since they're even less intrusive I'll apply them assuming
his ACK on these versions too...

Yours,
Linus Walleij

Re: [net-next PATCH v4 1/5] net: cpsw: enhance pinctrl support

[David Miller]

From: Linus Walleij <linus.walleij@linaro.org>
Date: Mon, 10 Jun 2013 17:48:16 +0200

> On Fri, Jun 7, 2013 at 4:49 PM, Mugunthan V N <mugunthanvnm@ti.com> wrote:
> 
>>> If you want to merge the direct networking parts of this series into
>>> another tree, I'm fine with that:
>>>
>>> Acked-by: David S. Miller <davem@davemloft.net>
>>
>> David
>>
>> Can you the below patch series as i have adopted pinctrl PM api in another
>> series,
>> this patch has direct usage of pinctrl_select_state apis
>> http://marc.info/?l=linux-netdev&m=137054250018667&w=2
>>
>> Linus Walleij
>>
>> Please drop this patch series and take my other [atch set mentioned above
>> with David's Ack.
> 
> Sure I didn't see David ACK the new versions explicitly but
> since they're even less intrusive I'll apply them assuming
> his ACK on these versions too...

Just in case it isn't clear:

Acked-by: David S. Miller <davem@davemloft.net>