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* [PATCH v2 0/3] Fix pinctrl-single pcs_pin_dbg_show()
@ 2021-03-17 21:41 Hanna Hawa
  2021-03-17 21:41 ` [PATCH v3 1/3] pinctrl: pinctrl-single: remove unused variable Hanna Hawa
                   ` (2 more replies)
  0 siblings, 3 replies; 8+ messages in thread
From: Hanna Hawa @ 2021-03-17 21:41 UTC (permalink / raw)
  To: andy.shevchenko, tony, haojian.zhuang, linus.walleij
  Cc: dwmw, benh, ronenk, talel, jonnyc, hanochu, tgershi,
	linux-arm-kernel, linux-omap, linux-gpio, linux-kernel, hhhawa

These patches fix the pcs_pin_dbg_show() function for the scenario where
a single register controls multiple pins (i.e. bits_per_mux is not zero)
Additionally, the common formula is moved to a separate function to
allow reuse.

Changes since v2:
-----------------
- move read() register to be outside of if condition (as it common
  read()).
- Remove extra parentheses
- replace offset variable by direct return statements

Changes since v1:
-----------------
- remove unused variable in In function 'pcs_allocate_pin_table'
  (Reported-by: kernel test robot <lkp@intel.com>)

Hanna Hawa (3):
  pinctrl: pinctrl-single: remove unused variable
  pinctrl: pinctrl-single: remove unused parameter
  pinctrl: pinctrl-single: fix pcs_pin_dbg_show() when bits_per_mux is
    not zero

 drivers/pinctrl/pinctrl-single.c | 67 +++++++++++++++++++-------------
 1 file changed, 39 insertions(+), 28 deletions(-)

-- 
2.17.1


^ permalink raw reply	[flat|nested] 8+ messages in thread

* [PATCH v3 1/3] pinctrl: pinctrl-single: remove unused variable
  2021-03-17 21:41 [PATCH v2 0/3] Fix pinctrl-single pcs_pin_dbg_show() Hanna Hawa
@ 2021-03-17 21:41 ` Hanna Hawa
  2021-03-17 21:41 ` [PATCH v3 2/3] pinctrl: pinctrl-single: remove unused parameter Hanna Hawa
  2021-03-17 21:41 ` [PATCH v3 3/3] pinctrl: pinctrl-single: fix pcs_pin_dbg_show() when bits_per_mux is not zero Hanna Hawa
  2 siblings, 0 replies; 8+ messages in thread
From: Hanna Hawa @ 2021-03-17 21:41 UTC (permalink / raw)
  To: andy.shevchenko, tony, haojian.zhuang, linus.walleij
  Cc: dwmw, benh, ronenk, talel, jonnyc, hanochu, tgershi,
	linux-arm-kernel, linux-omap, linux-gpio, linux-kernel, hhhawa

Remove unused parameter 'num_pins_in_register' from
pcs_allocate_pin_table().

Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Hanna Hawa <hhhawa@amazon.com>
---
 drivers/pinctrl/pinctrl-single.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/drivers/pinctrl/pinctrl-single.c b/drivers/pinctrl/pinctrl-single.c
index 7771316dfffa..91c638b85d2c 100644
--- a/drivers/pinctrl/pinctrl-single.c
+++ b/drivers/pinctrl/pinctrl-single.c
@@ -703,14 +703,12 @@ static int pcs_add_pin(struct pcs_device *pcs, unsigned offset,
 static int pcs_allocate_pin_table(struct pcs_device *pcs)
 {
 	int mux_bytes, nr_pins, i;
-	int num_pins_in_register = 0;
 
 	mux_bytes = pcs->width / BITS_PER_BYTE;
 
 	if (pcs->bits_per_mux) {
 		pcs->bits_per_pin = fls(pcs->fmask);
 		nr_pins = (pcs->size * BITS_PER_BYTE) / pcs->bits_per_pin;
-		num_pins_in_register = pcs->width / pcs->bits_per_pin;
 	} else {
 		nr_pins = pcs->size / mux_bytes;
 	}
-- 
2.17.1


^ permalink raw reply	[flat|nested] 8+ messages in thread

* [PATCH v3 2/3] pinctrl: pinctrl-single: remove unused parameter
  2021-03-17 21:41 [PATCH v2 0/3] Fix pinctrl-single pcs_pin_dbg_show() Hanna Hawa
  2021-03-17 21:41 ` [PATCH v3 1/3] pinctrl: pinctrl-single: remove unused variable Hanna Hawa
@ 2021-03-17 21:41 ` Hanna Hawa
  2021-03-17 21:41 ` [PATCH v3 3/3] pinctrl: pinctrl-single: fix pcs_pin_dbg_show() when bits_per_mux is not zero Hanna Hawa
  2 siblings, 0 replies; 8+ messages in thread
From: Hanna Hawa @ 2021-03-17 21:41 UTC (permalink / raw)
  To: andy.shevchenko, tony, haojian.zhuang, linus.walleij
  Cc: dwmw, benh, ronenk, talel, jonnyc, hanochu, tgershi,
	linux-arm-kernel, linux-omap, linux-gpio, linux-kernel, hhhawa

Remove unused parameter 'pin_pos' from pcs_add_pin().

Signed-off-by: Hanna Hawa <hhhawa@amazon.com>
---
 drivers/pinctrl/pinctrl-single.c | 8 ++------
 1 file changed, 2 insertions(+), 6 deletions(-)

diff --git a/drivers/pinctrl/pinctrl-single.c b/drivers/pinctrl/pinctrl-single.c
index 91c638b85d2c..f3394517cb2e 100644
--- a/drivers/pinctrl/pinctrl-single.c
+++ b/drivers/pinctrl/pinctrl-single.c
@@ -656,10 +656,8 @@ static const struct pinconf_ops pcs_pinconf_ops = {
  * pcs_add_pin() - add a pin to the static per controller pin array
  * @pcs: pcs driver instance
  * @offset: register offset from base
- * @pin_pos: unused
  */
-static int pcs_add_pin(struct pcs_device *pcs, unsigned offset,
-		unsigned pin_pos)
+static int pcs_add_pin(struct pcs_device *pcs, unsigned int offset)
 {
 	struct pcs_soc_data *pcs_soc = &pcs->socdata;
 	struct pinctrl_pin_desc *pin;
@@ -727,16 +725,14 @@ static int pcs_allocate_pin_table(struct pcs_device *pcs)
 		unsigned offset;
 		int res;
 		int byte_num;
-		int pin_pos = 0;
 
 		if (pcs->bits_per_mux) {
 			byte_num = (pcs->bits_per_pin * i) / BITS_PER_BYTE;
 			offset = (byte_num / mux_bytes) * mux_bytes;
-			pin_pos = i % num_pins_in_register;
 		} else {
 			offset = i * mux_bytes;
 		}
-		res = pcs_add_pin(pcs, offset, pin_pos);
+		res = pcs_add_pin(pcs, offset);
 		if (res < 0) {
 			dev_err(pcs->dev, "error adding pins: %i\n", res);
 			return res;
-- 
2.17.1


^ permalink raw reply	[flat|nested] 8+ messages in thread

* [PATCH v3 3/3] pinctrl: pinctrl-single: fix pcs_pin_dbg_show() when bits_per_mux is not zero
  2021-03-17 21:41 [PATCH v2 0/3] Fix pinctrl-single pcs_pin_dbg_show() Hanna Hawa
  2021-03-17 21:41 ` [PATCH v3 1/3] pinctrl: pinctrl-single: remove unused variable Hanna Hawa
  2021-03-17 21:41 ` [PATCH v3 2/3] pinctrl: pinctrl-single: remove unused parameter Hanna Hawa
@ 2021-03-17 21:41 ` Hanna Hawa
  2021-03-18 12:15   ` Andy Shevchenko
  2 siblings, 1 reply; 8+ messages in thread
From: Hanna Hawa @ 2021-03-17 21:41 UTC (permalink / raw)
  To: andy.shevchenko, tony, haojian.zhuang, linus.walleij
  Cc: dwmw, benh, ronenk, talel, jonnyc, hanochu, tgershi,
	linux-arm-kernel, linux-omap, linux-gpio, linux-kernel, hhhawa

An SError was detected when trying to print the supported pins in a
pinctrl device which supports multiple pins per register. This change
fixes the pcs_pin_dbg_show() in pinctrl-single driver when bits_per_mux
is not zero. In addition move offset calculation and pin offset in
register to common function.

Fixes: 4e7e8017a80e ("pinctrl: pinctrl-single: enhance to configure multiple pins of different modules")
Signed-off-by: Hanna Hawa <hhhawa@amazon.com>
---
 drivers/pinctrl/pinctrl-single.c | 57 +++++++++++++++++++++-----------
 1 file changed, 37 insertions(+), 20 deletions(-)

diff --git a/drivers/pinctrl/pinctrl-single.c b/drivers/pinctrl/pinctrl-single.c
index f3394517cb2e..4595acf6545e 100644
--- a/drivers/pinctrl/pinctrl-single.c
+++ b/drivers/pinctrl/pinctrl-single.c
@@ -270,20 +270,46 @@ static void __maybe_unused pcs_writel(unsigned val, void __iomem *reg)
 	writel(val, reg);
 }
 
+static unsigned int pcs_pin_reg_offset_get(struct pcs_device *pcs,
+					   unsigned int pin)
+{
+	unsigned int mux_bytes;
+
+	mux_bytes = pcs->width / BITS_PER_BYTE;
+
+	if (pcs->bits_per_mux) {
+		unsigned int pin_offset_bytes;
+
+		pin_offset_bytes = (pcs->bits_per_pin * pin) / BITS_PER_BYTE;
+		return (pin_offset_bytes / mux_bytes) * mux_bytes;
+	}
+
+	return pin * mux_bytes;
+}
+
+static unsigned int pcs_pin_shift_reg_get(struct pcs_device *pcs,
+					  unsigned int pin)
+{
+	return (pin % (pcs->width / pcs->bits_per_pin)) * pcs->bits_per_pin;
+}
+
 static void pcs_pin_dbg_show(struct pinctrl_dev *pctldev,
 					struct seq_file *s,
 					unsigned pin)
 {
 	struct pcs_device *pcs;
-	unsigned val, mux_bytes;
+	unsigned int val;
 	unsigned long offset;
 	size_t pa;
 
 	pcs = pinctrl_dev_get_drvdata(pctldev);
 
-	mux_bytes = pcs->width / BITS_PER_BYTE;
-	offset = pin * mux_bytes;
+	offset = pcs_pin_reg_offset_get(pcs, pin);
 	val = pcs->read(pcs->base + offset);
+
+	if (pcs->bits_per_mux)
+		val &= pcs->fmask << pcs_pin_shift_reg_get(pcs, pin);
+
 	pa = pcs->res->start + offset;
 
 	seq_printf(s, "%zx %08x %s ", pa, val, DRIVER_NAME);
@@ -384,7 +410,6 @@ static int pcs_request_gpio(struct pinctrl_dev *pctldev,
 	struct pcs_device *pcs = pinctrl_dev_get_drvdata(pctldev);
 	struct pcs_gpiofunc_range *frange = NULL;
 	struct list_head *pos, *tmp;
-	int mux_bytes = 0;
 	unsigned data;
 
 	/* If function mask is null, return directly. */
@@ -392,29 +417,27 @@ static int pcs_request_gpio(struct pinctrl_dev *pctldev,
 		return -ENOTSUPP;
 
 	list_for_each_safe(pos, tmp, &pcs->gpiofuncs) {
+		u32 offset;
+
 		frange = list_entry(pos, struct pcs_gpiofunc_range, node);
 		if (pin >= frange->offset + frange->npins
 			|| pin < frange->offset)
 			continue;
-		mux_bytes = pcs->width / BITS_PER_BYTE;
 
-		if (pcs->bits_per_mux) {
-			int byte_num, offset, pin_shift;
+		offset = pcs_pin_reg_offset_get(pcs, pin);
 
-			byte_num = (pcs->bits_per_pin * pin) / BITS_PER_BYTE;
-			offset = (byte_num / mux_bytes) * mux_bytes;
-			pin_shift = pin % (pcs->width / pcs->bits_per_pin) *
-				    pcs->bits_per_pin;
+		if (pcs->bits_per_mux) {
+			int pin_shift = pcs_pin_shift_reg_get(pcs, pin);
 
 			data = pcs->read(pcs->base + offset);
 			data &= ~(pcs->fmask << pin_shift);
 			data |= frange->gpiofunc << pin_shift;
 			pcs->write(data, pcs->base + offset);
 		} else {
-			data = pcs->read(pcs->base + pin * mux_bytes);
+			data = pcs->read(pcs->base + offset);
 			data &= ~pcs->fmask;
 			data |= frange->gpiofunc;
-			pcs->write(data, pcs->base + pin * mux_bytes);
+			pcs->write(data, pcs->base + offset);
 		}
 		break;
 	}
@@ -724,14 +747,8 @@ static int pcs_allocate_pin_table(struct pcs_device *pcs)
 	for (i = 0; i < pcs->desc.npins; i++) {
 		unsigned offset;
 		int res;
-		int byte_num;
 
-		if (pcs->bits_per_mux) {
-			byte_num = (pcs->bits_per_pin * i) / BITS_PER_BYTE;
-			offset = (byte_num / mux_bytes) * mux_bytes;
-		} else {
-			offset = i * mux_bytes;
-		}
+		offset = pcs_pin_reg_offset_get(pcs, i);
 		res = pcs_add_pin(pcs, offset);
 		if (res < 0) {
 			dev_err(pcs->dev, "error adding pins: %i\n", res);
-- 
2.17.1


^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH v3 3/3] pinctrl: pinctrl-single: fix pcs_pin_dbg_show() when bits_per_mux is not zero
  2021-03-17 21:41 ` [PATCH v3 3/3] pinctrl: pinctrl-single: fix pcs_pin_dbg_show() when bits_per_mux is not zero Hanna Hawa
@ 2021-03-18 12:15   ` Andy Shevchenko
  2021-03-19  7:52     ` Hawa, Hanna
  0 siblings, 1 reply; 8+ messages in thread
From: Andy Shevchenko @ 2021-03-18 12:15 UTC (permalink / raw)
  To: Hanna Hawa
  Cc: Tony Lindgren, Haojian Zhuang, Linus Walleij, David Woodhouse,
	benh, ronenk, talel, jonnyc, hanochu, tgershi,
	linux-arm Mailing List, Linux OMAP Mailing List,
	open list:GPIO SUBSYSTEM, Linux Kernel Mailing List

On Wed, Mar 17, 2021 at 11:42 PM Hanna Hawa <hhhawa@amazon.com> wrote:
>

> An SError was detected when trying to print the supported pins in a

What is SError? Yes, I have read a discussion, but here is the hint:
if a person sees this as a first text due to, for example, bisecting
an issue, what she/he can get from this cryptic name?

> pinctrl device which supports multiple pins per register. This change
> fixes the pcs_pin_dbg_show() in pinctrl-single driver when bits_per_mux
> is not zero. In addition move offset calculation and pin offset in
> register to common function.

Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>

> Fixes: 4e7e8017a80e ("pinctrl: pinctrl-single: enhance to configure multiple pins of different modules")
> Signed-off-by: Hanna Hawa <hhhawa@amazon.com>
> ---
>  drivers/pinctrl/pinctrl-single.c | 57 +++++++++++++++++++++-----------
>  1 file changed, 37 insertions(+), 20 deletions(-)
>
> diff --git a/drivers/pinctrl/pinctrl-single.c b/drivers/pinctrl/pinctrl-single.c
> index f3394517cb2e..4595acf6545e 100644
> --- a/drivers/pinctrl/pinctrl-single.c
> +++ b/drivers/pinctrl/pinctrl-single.c
> @@ -270,20 +270,46 @@ static void __maybe_unused pcs_writel(unsigned val, void __iomem *reg)
>         writel(val, reg);
>  }
>
> +static unsigned int pcs_pin_reg_offset_get(struct pcs_device *pcs,
> +                                          unsigned int pin)
> +{

> +       unsigned int mux_bytes;
> +
> +       mux_bytes = pcs->width / BITS_PER_BYTE;

Can be folded to one line.

> +       if (pcs->bits_per_mux) {
> +               unsigned int pin_offset_bytes;
> +
> +               pin_offset_bytes = (pcs->bits_per_pin * pin) / BITS_PER_BYTE;
> +               return (pin_offset_bytes / mux_bytes) * mux_bytes;

Side note for the further improvements (in a separate change, because
I see that you just copied an original code, and after all this is
just a fix patch): this can be replaced by round down APIs (one which
works for arbitrary divisors).

> +       }
> +
> +       return pin * mux_bytes;
> +}
> +
> +static unsigned int pcs_pin_shift_reg_get(struct pcs_device *pcs,
> +                                         unsigned int pin)
> +{
> +       return (pin % (pcs->width / pcs->bits_per_pin)) * pcs->bits_per_pin;

Also a side note: I'm wondering if this can be optimized to have less divisions.

> +}
> +
>  static void pcs_pin_dbg_show(struct pinctrl_dev *pctldev,
>                                         struct seq_file *s,
>                                         unsigned pin)
>  {
>         struct pcs_device *pcs;
> -       unsigned val, mux_bytes;
> +       unsigned int val;
>         unsigned long offset;
>         size_t pa;
>
>         pcs = pinctrl_dev_get_drvdata(pctldev);
>
> -       mux_bytes = pcs->width / BITS_PER_BYTE;
> -       offset = pin * mux_bytes;
> +       offset = pcs_pin_reg_offset_get(pcs, pin);
>         val = pcs->read(pcs->base + offset);
> +
> +       if (pcs->bits_per_mux)
> +               val &= pcs->fmask << pcs_pin_shift_reg_get(pcs, pin);
> +
>         pa = pcs->res->start + offset;
>
>         seq_printf(s, "%zx %08x %s ", pa, val, DRIVER_NAME);
> @@ -384,7 +410,6 @@ static int pcs_request_gpio(struct pinctrl_dev *pctldev,
>         struct pcs_device *pcs = pinctrl_dev_get_drvdata(pctldev);
>         struct pcs_gpiofunc_range *frange = NULL;
>         struct list_head *pos, *tmp;
> -       int mux_bytes = 0;
>         unsigned data;
>
>         /* If function mask is null, return directly. */
> @@ -392,29 +417,27 @@ static int pcs_request_gpio(struct pinctrl_dev *pctldev,
>                 return -ENOTSUPP;
>
>         list_for_each_safe(pos, tmp, &pcs->gpiofuncs) {
> +               u32 offset;
> +
>                 frange = list_entry(pos, struct pcs_gpiofunc_range, node);
>                 if (pin >= frange->offset + frange->npins
>                         || pin < frange->offset)
>                         continue;
> -               mux_bytes = pcs->width / BITS_PER_BYTE;
>
> -               if (pcs->bits_per_mux) {
> -                       int byte_num, offset, pin_shift;
> +               offset = pcs_pin_reg_offset_get(pcs, pin);
>
> -                       byte_num = (pcs->bits_per_pin * pin) / BITS_PER_BYTE;
> -                       offset = (byte_num / mux_bytes) * mux_bytes;
> -                       pin_shift = pin % (pcs->width / pcs->bits_per_pin) *
> -                                   pcs->bits_per_pin;
> +               if (pcs->bits_per_mux) {
> +                       int pin_shift = pcs_pin_shift_reg_get(pcs, pin);
>
>                         data = pcs->read(pcs->base + offset);
>                         data &= ~(pcs->fmask << pin_shift);
>                         data |= frange->gpiofunc << pin_shift;
>                         pcs->write(data, pcs->base + offset);
>                 } else {
> -                       data = pcs->read(pcs->base + pin * mux_bytes);
> +                       data = pcs->read(pcs->base + offset);
>                         data &= ~pcs->fmask;
>                         data |= frange->gpiofunc;
> -                       pcs->write(data, pcs->base + pin * mux_bytes);
> +                       pcs->write(data, pcs->base + offset);
>                 }
>                 break;
>         }
> @@ -724,14 +747,8 @@ static int pcs_allocate_pin_table(struct pcs_device *pcs)
>         for (i = 0; i < pcs->desc.npins; i++) {
>                 unsigned offset;
>                 int res;
> -               int byte_num;
>
> -               if (pcs->bits_per_mux) {
> -                       byte_num = (pcs->bits_per_pin * i) / BITS_PER_BYTE;
> -                       offset = (byte_num / mux_bytes) * mux_bytes;
> -               } else {
> -                       offset = i * mux_bytes;
> -               }
> +               offset = pcs_pin_reg_offset_get(pcs, i);
>                 res = pcs_add_pin(pcs, offset);
>                 if (res < 0) {
>                         dev_err(pcs->dev, "error adding pins: %i\n", res);
> --
> 2.17.1
>


-- 
With Best Regards,
Andy Shevchenko

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH v3 3/3] pinctrl: pinctrl-single: fix pcs_pin_dbg_show() when bits_per_mux is not zero
  2021-03-18 12:15   ` Andy Shevchenko
@ 2021-03-19  7:52     ` Hawa, Hanna
  2021-03-19 10:04       ` Andy Shevchenko
  0 siblings, 1 reply; 8+ messages in thread
From: Hawa, Hanna @ 2021-03-19  7:52 UTC (permalink / raw)
  To: Andy Shevchenko
  Cc: Tony Lindgren, Haojian Zhuang, Linus Walleij, David Woodhouse,
	benh, ronenk, talel, jonnyc, hanochu, tgershi,
	linux-arm Mailing List, Linux OMAP Mailing List,
	open list:GPIO SUBSYSTEM, Linux Kernel Mailing List



On 3/18/2021 2:15 PM, Andy Shevchenko wrote:
> 
> 
> On Wed, Mar 17, 2021 at 11:42 PM Hanna Hawa<hhhawa@amazon.com>  wrote:
>> An SError was detected when trying to print the supported pins in a
> What is SError? Yes, I have read a discussion, but here is the hint:
> if a person sees this as a first text due to, for example, bisecting
> an issue, what she/he can get from this cryptic name?

What you suggest?
s/An SError/A kernel-panic/?
Or remove the sentence and keep the below:
"
This change fixes the pcs_pin_dbg_show() in pinctrl-single driver when 
bits_per_mux is not zero. In addition move offset calculation and pin 
offset in register to common function.
"

> 
>> pinctrl device which supports multiple pins per register. This change
>> fixes the pcs_pin_dbg_show() in pinctrl-single driver when bits_per_mux
>> is not zero. In addition move offset calculation and pin offset in
>> register to common function.
> Reviewed-by: Andy Shevchenko<andy.shevchenko@gmail.com>

Thanks

> 
>> Fixes: 4e7e8017a80e ("pinctrl: pinctrl-single: enhance to configure multiple pins of different modules")
>> Signed-off-by: Hanna Hawa<hhhawa@amazon.com>
>> ---
>>   drivers/pinctrl/pinctrl-single.c | 57 +++++++++++++++++++++-----------
>>   1 file changed, 37 insertions(+), 20 deletions(-)
>>
>> diff --git a/drivers/pinctrl/pinctrl-single.c b/drivers/pinctrl/pinctrl-single.c
>> index f3394517cb2e..4595acf6545e 100644
>> --- a/drivers/pinctrl/pinctrl-single.c
>> +++ b/drivers/pinctrl/pinctrl-single.c
>> @@ -270,20 +270,46 @@ static void __maybe_unused pcs_writel(unsigned val, void __iomem *reg)
>>          writel(val, reg);
>>   }
>>
>> +static unsigned int pcs_pin_reg_offset_get(struct pcs_device *pcs,
>> +                                          unsigned int pin)
>> +{
>> +       unsigned int mux_bytes;
>> +
>> +       mux_bytes = pcs->width / BITS_PER_BYTE;
> Can be folded to one line.

Ack

> 
>> +       if (pcs->bits_per_mux) {
>> +               unsigned int pin_offset_bytes;
>> +
>> +               pin_offset_bytes = (pcs->bits_per_pin * pin) / BITS_PER_BYTE;
>> +               return (pin_offset_bytes / mux_bytes) * mux_bytes;
> Side note for the further improvements (in a separate change, because
> I see that you just copied an original code, and after all this is
> just a fix patch): this can be replaced by round down APIs (one which
> works for arbitrary divisors).

Agree, didn't want to change the formula as it's fix patch. (here and 
below), this can be taken for further improvements.

> 
>> +       }
>> +
>> +       return pin * mux_bytes;
>> +}
>> +
>> +static unsigned int pcs_pin_shift_reg_get(struct pcs_device *pcs,
>> +                                         unsigned int pin)
>> +{
>> +       return (pin % (pcs->width / pcs->bits_per_pin)) * pcs->bits_per_pin;
> Also a side note: I'm wondering if this can be optimized to have less divisions.
> 
>> +}
>> +
>>   static void pcs_pin_dbg_show(struct pinctrl_dev *pctldev,
>>                                          struct seq_file *s,
>>                                          unsigned pin)
>>   {

Thanks,
Hanna

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH v3 3/3] pinctrl: pinctrl-single: fix pcs_pin_dbg_show() when bits_per_mux is not zero
  2021-03-19  7:52     ` Hawa, Hanna
@ 2021-03-19 10:04       ` Andy Shevchenko
  0 siblings, 0 replies; 8+ messages in thread
From: Andy Shevchenko @ 2021-03-19 10:04 UTC (permalink / raw)
  To: Hawa, Hanna
  Cc: Tony Lindgren, Haojian Zhuang, Linus Walleij, David Woodhouse,
	benh, ronenk, talel, jonnyc, hanochu, tgershi,
	linux-arm Mailing List, Linux OMAP Mailing List,
	open list:GPIO SUBSYSTEM, Linux Kernel Mailing List

On Fri, Mar 19, 2021 at 9:53 AM Hawa, Hanna <hhhawa@amazon.com> wrote:
> On 3/18/2021 2:15 PM, Andy Shevchenko wrote:
> > On Wed, Mar 17, 2021 at 11:42 PM Hanna Hawa<hhhawa@amazon.com>  wrote:
> >> An SError was detected when trying to print the supported pins in a
> > What is SError? Yes, I have read a discussion, but here is the hint:
> > if a person sees this as a first text due to, for example, bisecting
> > an issue, what she/he can get from this cryptic name?
>
> What you suggest?
> s/An SError/A kernel-panic/?

Not below, but something which makes clear what SError is.

Like "A System Error (SError, followed by kernel panic) ..."

> Or remove the sentence and keep the below:
> "
> This change fixes the pcs_pin_dbg_show() in pinctrl-single driver when
> bits_per_mux is not zero. In addition move offset calculation and pin
> offset in register to common function.
> "

-- 
With Best Regards,
Andy Shevchenko

^ permalink raw reply	[flat|nested] 8+ messages in thread

* [PATCH v2 0/3] Fix pinctrl-single pcs_pin_dbg_show()
@ 2021-03-16 20:24 Hanna Hawa
  0 siblings, 0 replies; 8+ messages in thread
From: Hanna Hawa @ 2021-03-16 20:24 UTC (permalink / raw)
  To: tony, haojian.zhuang, linus.walleij
  Cc: dwmw, benh, ronenk, talel, jonnyc, hanochu, tgershi,
	linux-arm-kernel, linux-omap, linux-gpio, linux-kernel, hhhawa

These patches fix the pcs_pin_dbg_show() function for the scenario where
a single register controls multiple pins (i.e. bits_per_mux != 0).
Additionally, the common formula is moved to a separate function to
allow reuse.

Changes since v1:
-----------------
- remove unused variable in In function 'pcs_allocate_pin_table'
  (Reported-by: kernel test robot <lkp@intel.com>)

Hanna Hawa (3):
  pinctrl: pinctrl-single: remove unused variable
  pinctrl: pinctrl-single: remove unused parameter
  pinctrl: pinctrl-single: fix pcs_pin_dbg_show() when bits_per_mux != 0

 drivers/pinctrl/pinctrl-single.c | 76 ++++++++++++++++++++------------
 1 file changed, 47 insertions(+), 29 deletions(-)

-- 
2.17.1


^ permalink raw reply	[flat|nested] 8+ messages in thread

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Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-03-17 21:41 [PATCH v2 0/3] Fix pinctrl-single pcs_pin_dbg_show() Hanna Hawa
2021-03-17 21:41 ` [PATCH v3 1/3] pinctrl: pinctrl-single: remove unused variable Hanna Hawa
2021-03-17 21:41 ` [PATCH v3 2/3] pinctrl: pinctrl-single: remove unused parameter Hanna Hawa
2021-03-17 21:41 ` [PATCH v3 3/3] pinctrl: pinctrl-single: fix pcs_pin_dbg_show() when bits_per_mux is not zero Hanna Hawa
2021-03-18 12:15   ` Andy Shevchenko
2021-03-19  7:52     ` Hawa, Hanna
2021-03-19 10:04       ` Andy Shevchenko
  -- strict thread matches above, loose matches on Subject: below --
2021-03-16 20:24 [PATCH v2 0/3] Fix pinctrl-single pcs_pin_dbg_show() Hanna Hawa

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