linux-pci.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Lucas Stach <l.stach@pengutronix.de>
To: Andrey Smirnov <andrew.smirnov@gmail.com>, linux-pci@vger.kernel.org
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Fabio Estevam <fabio.estevam@nxp.com>,
	Chris Healy <cphealy@gmail.com>,
	Leonard Crestez <leonard.crestez@nxp.com>,
	"A.s. Dong" <aisheng.dong@nxp.com>,
	Richard Zhu <hongxing.zhu@nxp.com>,
	linux-imx@nxp.com, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 07/11] PCI: imx6: Simplify bit operations in PHY functions
Date: Fri, 12 Apr 2019 17:59:05 +0200	[thread overview]
Message-ID: <1555084745.11529.34.camel@pengutronix.de> (raw)
In-Reply-To: <20190401042547.14067-8-andrew.smirnov@gmail.com>

Am Sonntag, den 31.03.2019, 21:25 -0700 schrieb Andrey Smirnov:
> Simplify the code by incorporating left shifts into constant
> defnitions as well as using FIELD_PREP/GENMASK. No functional change
> intended.
> 
> > Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> > Cc: Bjorn Helgaas <bhelgaas@google.com>
> > Cc: Fabio Estevam <fabio.estevam@nxp.com>
> > Cc: Chris Healy <cphealy@gmail.com>
> > Cc: Lucas Stach <l.stach@pengutronix.de>
> > Cc: Leonard Crestez <leonard.crestez@nxp.com>
> > Cc: "A.s. Dong" <aisheng.dong@nxp.com>
> > Cc: Richard Zhu <hongxing.zhu@nxp.com>
> Cc: linux-imx@nxp.com
> Cc: linux-arm-kernel@lists.infradead.org
> Cc: linux-kernel@vger.kernel.org
> Cc: linux-pci@vger.kernel.org
> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>

Reviewed-by: Lucas Stach <l.stach@pengutronix.de>

> ---
>  drivers/pci/controller/dwc/pci-imx6.c | 28 +++++++++++++--------------
>  1 file changed, 14 insertions(+), 14 deletions(-)
> 
> diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
> index b1f30b94fb30..a49e5e491e12 100644
> --- a/drivers/pci/controller/dwc/pci-imx6.c
> +++ b/drivers/pci/controller/dwc/pci-imx6.c
> @@ -105,11 +105,11 @@ struct imx6_pcie {
>  #define PL_OFFSET 0x700
>  
>  #define PCIE_PHY_CTRL (PL_OFFSET + 0x114)
> -#define PCIE_PHY_CTRL_DATA_LOC 0
> -#define PCIE_PHY_CTRL_CAP_ADR_LOC 16
> -#define PCIE_PHY_CTRL_CAP_DAT_LOC 17
> -#define PCIE_PHY_CTRL_WR_LOC 18
> -#define PCIE_PHY_CTRL_RD_LOC 19
> > +#define PCIE_PHY_CTRL_DATA(x)		FIELD_PREP(GENMASK(15, 0), (x))
> > +#define PCIE_PHY_CTRL_CAP_ADR		BIT(16)
> > +#define PCIE_PHY_CTRL_CAP_DAT		BIT(17)
> > +#define PCIE_PHY_CTRL_WR		BIT(18)
> > +#define PCIE_PHY_CTRL_RD		BIT(19)
>  
>  #define PCIE_PHY_STAT (PL_OFFSET + 0x110)
>  #define PCIE_PHY_STAT_ACK_LOC 16
> @@ -178,17 +178,17 @@ static int pcie_phy_wait_ack(struct imx6_pcie *imx6_pcie, int addr)
> >  	u32 val;
> >  	int ret;
>  
> > -	val = addr << PCIE_PHY_CTRL_DATA_LOC;
> > +	val = PCIE_PHY_CTRL_DATA(addr);
> >  	dw_pcie_writel_dbi(pci, PCIE_PHY_CTRL, val);
>  
> > -	val |= (0x1 << PCIE_PHY_CTRL_CAP_ADR_LOC);
> > +	val |= PCIE_PHY_CTRL_CAP_ADR;
> >  	dw_pcie_writel_dbi(pci, PCIE_PHY_CTRL, val);
>  
> >  	ret = pcie_phy_poll_ack(imx6_pcie, 1);
> >  	if (ret)
> >  		return ret;
>  
> > -	val = addr << PCIE_PHY_CTRL_DATA_LOC;
> > +	val = PCIE_PHY_CTRL_DATA(addr);
> >  	dw_pcie_writel_dbi(pci, PCIE_PHY_CTRL, val);
>  
> >  	return pcie_phy_poll_ack(imx6_pcie, 0);
> @@ -206,7 +206,7 @@ static int pcie_phy_read(struct imx6_pcie *imx6_pcie, int addr, int *data)
> >  		return ret;
>  
> >  	/* assert Read signal */
> > -	phy_ctl = 0x1 << PCIE_PHY_CTRL_RD_LOC;
> > +	phy_ctl = PCIE_PHY_CTRL_RD;
> >  	dw_pcie_writel_dbi(pci, PCIE_PHY_CTRL, phy_ctl);
>  
> >  	ret = pcie_phy_poll_ack(imx6_pcie, 1);
> @@ -234,11 +234,11 @@ static int pcie_phy_write(struct imx6_pcie *imx6_pcie, int addr, int data)
> >  	if (ret)
> >  		return ret;
>  
> > -	var = data << PCIE_PHY_CTRL_DATA_LOC;
> > +	var = PCIE_PHY_CTRL_DATA(data);
> >  	dw_pcie_writel_dbi(pci, PCIE_PHY_CTRL, var);
>  
> >  	/* capture data */
> > -	var |= (0x1 << PCIE_PHY_CTRL_CAP_DAT_LOC);
> > +	var |= PCIE_PHY_CTRL_CAP_DAT;
> >  	dw_pcie_writel_dbi(pci, PCIE_PHY_CTRL, var);
>  
> >  	ret = pcie_phy_poll_ack(imx6_pcie, 1);
> @@ -246,7 +246,7 @@ static int pcie_phy_write(struct imx6_pcie *imx6_pcie, int addr, int data)
> >  		return ret;
>  
> >  	/* deassert cap data */
> > -	var = data << PCIE_PHY_CTRL_DATA_LOC;
> > +	var = PCIE_PHY_CTRL_DATA(data);
> >  	dw_pcie_writel_dbi(pci, PCIE_PHY_CTRL, var);
>  
> >  	/* wait for ack de-assertion */
> @@ -255,7 +255,7 @@ static int pcie_phy_write(struct imx6_pcie *imx6_pcie, int addr, int data)
> >  		return ret;
>  
> >  	/* assert wr signal */
> > -	var = 0x1 << PCIE_PHY_CTRL_WR_LOC;
> > +	var = PCIE_PHY_CTRL_WR;
> >  	dw_pcie_writel_dbi(pci, PCIE_PHY_CTRL, var);
>  
> >  	/* wait for ack */
> @@ -264,7 +264,7 @@ static int pcie_phy_write(struct imx6_pcie *imx6_pcie, int addr, int data)
> >  		return ret;
>  
> >  	/* deassert wr signal */
> > -	var = data << PCIE_PHY_CTRL_DATA_LOC;
> > +	var = PCIE_PHY_CTRL_DATA(data);
> >  	dw_pcie_writel_dbi(pci, PCIE_PHY_CTRL, var);
>  
> >  	/* wait for ack de-assertion */

  reply	other threads:[~2019-04-12 15:59 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-04-01  4:25 [PATCH v3 00/11] i.MX6, DesignWare PCI improvements Andrey Smirnov
2019-04-01  4:25 ` [PATCH v3 01/11] PCI: imx6: Simplify imx7d_pcie_wait_for_phy_pll_lock() Andrey Smirnov
2019-04-12 15:49   ` Lucas Stach
2019-04-01  4:25 ` [PATCH v3 02/11] PCI: imx6: Remove redundant debug tracing Andrey Smirnov
2019-04-12 15:53   ` Lucas Stach
2019-04-14 18:47     ` Andrey Smirnov
2019-04-01  4:25 ` [PATCH v3 03/11] PCI: imx6: Return -ETIMEOUT from imx6_pcie_wait_for_speed_change() Andrey Smirnov
2019-04-12 15:54   ` Lucas Stach
2019-04-01  4:25 ` [PATCH v3 04/11] PCI: imx6: Remove PCIE_PL_PFLR_* constants Andrey Smirnov
2019-04-12 15:54   ` Lucas Stach
2019-04-01  4:25 ` [PATCH v3 05/11] PCI: dwc: imx6: Share PHY debug register definitions Andrey Smirnov
2019-04-12 15:56   ` Lucas Stach
2019-04-01  4:25 ` [PATCH v3 06/11] PCI: imx6: Make use of BIT() in constant definitions Andrey Smirnov
2019-04-12 15:56   ` Lucas Stach
2019-04-01  4:25 ` [PATCH v3 07/11] PCI: imx6: Simplify bit operations in PHY functions Andrey Smirnov
2019-04-12 15:59   ` Lucas Stach [this message]
2019-04-01  4:25 ` [PATCH v3 08/11] PCI: imx6: Simplify pcie_phy_poll_ack() Andrey Smirnov
2019-04-12 16:12   ` Lucas Stach
2019-04-14 18:46     ` Andrey Smirnov
2019-04-01  4:25 ` [PATCH v3 09/11] PCI: imx6: Restrict PHY register data to 16-bit Andrey Smirnov
2019-04-12 16:15   ` Lucas Stach
2019-04-01  4:25 ` [PATCH v3 10/11] PCI: imx6: Use flags to indicate support for suspend Andrey Smirnov
2019-04-12 16:17   ` Lucas Stach
2019-04-01  4:25 ` [PATCH v3 11/11] PCI: imx6: Replace calls to udelay() with usleep_range() Andrey Smirnov
2019-04-12 16:26   ` Lucas Stach
2019-04-14 18:48     ` Andrey Smirnov
2019-04-12  9:32 ` [PATCH v3 00/11] i.MX6, DesignWare PCI improvements Lorenzo Pieralisi

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1555084745.11529.34.camel@pengutronix.de \
    --to=l.stach@pengutronix.de \
    --cc=aisheng.dong@nxp.com \
    --cc=andrew.smirnov@gmail.com \
    --cc=bhelgaas@google.com \
    --cc=cphealy@gmail.com \
    --cc=fabio.estevam@nxp.com \
    --cc=hongxing.zhu@nxp.com \
    --cc=leonard.crestez@nxp.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-imx@nxp.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-pci@vger.kernel.org \
    --cc=lorenzo.pieralisi@arm.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).