From: Lucas Stach <l.stach@pengutronix.de>
To: Andrey Smirnov <andrew.smirnov@gmail.com>, linux-pci@vger.kernel.org
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Bjorn Helgaas <bhelgaas@google.com>,
Fabio Estevam <fabio.estevam@nxp.com>,
Chris Healy <cphealy@gmail.com>,
Leonard Crestez <leonard.crestez@nxp.com>,
"A.s. Dong" <aisheng.dong@nxp.com>,
Richard Zhu <hongxing.zhu@nxp.com>,
linux-imx@nxp.com, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 09/11] PCI: imx6: Restrict PHY register data to 16-bit
Date: Fri, 12 Apr 2019 18:15:24 +0200 [thread overview]
Message-ID: <1555085724.11529.37.camel@pengutronix.de> (raw)
In-Reply-To: <20190401042547.14067-10-andrew.smirnov@gmail.com>
Am Sonntag, den 31.03.2019, 21:25 -0700 schrieb Andrey Smirnov:
> PHY registers on i.MX6 are 16-bit wide, so we can get rid of explicit
> masking if we restrict pcie_phy_read/pcie_phy_write to use 'u16'
> instead of 'int'. No functional change intended.
>
> > Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> > Cc: Bjorn Helgaas <bhelgaas@google.com>
> > Cc: Fabio Estevam <fabio.estevam@nxp.com>
> > Cc: Chris Healy <cphealy@gmail.com>
> > Cc: Lucas Stach <l.stach@pengutronix.de>
> > Cc: Leonard Crestez <leonard.crestez@nxp.com>
> > Cc: "A.s. Dong" <aisheng.dong@nxp.com>
> > Cc: Richard Zhu <hongxing.zhu@nxp.com>
> Cc: linux-imx@nxp.com
> Cc: linux-arm-kernel@lists.infradead.org
> Cc: linux-kernel@vger.kernel.org
> Cc: linux-pci@vger.kernel.org
> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
> ---
> drivers/pci/controller/dwc/pci-imx6.c | 13 ++++++-------
> 1 file changed, 6 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
> index 7c3ffb751002..9c658ef55aa4 100644
> --- a/drivers/pci/controller/dwc/pci-imx6.c
> +++ b/drivers/pci/controller/dwc/pci-imx6.c
> @@ -195,10 +195,10 @@ static int pcie_phy_wait_ack(struct imx6_pcie *imx6_pcie, int addr)
> }
>
> /* Read from the 16-bit PCIe PHY control registers (not memory-mapped) */
> -static int pcie_phy_read(struct imx6_pcie *imx6_pcie, int addr, int *data)
> +static int pcie_phy_read(struct imx6_pcie *imx6_pcie, int addr, u16 *data)
> {
> > struct dw_pcie *pci = imx6_pcie->pci;
> > - u32 val, phy_ctl;
> > + u32 phy_ctl;
> > int ret;
>
> > ret = pcie_phy_wait_ack(imx6_pcie, addr);
> @@ -213,8 +213,7 @@ static int pcie_phy_read(struct imx6_pcie *imx6_pcie, int addr, int *data)
> > if (ret)
> > return ret;
>
> > - val = dw_pcie_readl_dbi(pci, PCIE_PHY_STAT);
> > - *data = val & 0xffff;
> > + *data = dw_pcie_readl_dbi(pci, PCIE_PHY_STAT);
>
> > /* deassert Read signal */
> > dw_pcie_writel_dbi(pci, PCIE_PHY_CTRL, 0x00);
> @@ -222,7 +221,7 @@ static int pcie_phy_read(struct imx6_pcie *imx6_pcie, int addr, int *data)
> > return pcie_phy_poll_ack(imx6_pcie, 0);
> }
>
> -static int pcie_phy_write(struct imx6_pcie *imx6_pcie, int addr, int data)
> +static int pcie_phy_write(struct imx6_pcie *imx6_pcie, int addr, u16 data)
> {
> > struct dw_pcie *pci = imx6_pcie->pci;
> > u32 var;
> @@ -279,7 +278,7 @@ static int pcie_phy_write(struct imx6_pcie *imx6_pcie, int addr, int data)
>
> static void imx6_pcie_reset_phy(struct imx6_pcie *imx6_pcie)
> {
> > - u32 tmp;
> > + u16 tmp;
>
> > if (!(imx6_pcie->drvdata->flags & IMX6_PCIE_FLAG_IMX6_PHY))
> > return;
> @@ -675,7 +674,7 @@ static int imx6_setup_phy_mpll(struct imx6_pcie *imx6_pcie)
> {
> > unsigned long phy_rate = clk_get_rate(imx6_pcie->pcie_phy);
> > int mult, div;
> > - u32 val;
> > + u16 val;
>
> > if (!(imx6_pcie->drvdata->flags & IMX6_PCIE_FLAG_IMX6_PHY))
> > return 0;
next prev parent reply other threads:[~2019-04-12 16:15 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-04-01 4:25 [PATCH v3 00/11] i.MX6, DesignWare PCI improvements Andrey Smirnov
2019-04-01 4:25 ` [PATCH v3 01/11] PCI: imx6: Simplify imx7d_pcie_wait_for_phy_pll_lock() Andrey Smirnov
2019-04-12 15:49 ` Lucas Stach
2019-04-01 4:25 ` [PATCH v3 02/11] PCI: imx6: Remove redundant debug tracing Andrey Smirnov
2019-04-12 15:53 ` Lucas Stach
2019-04-14 18:47 ` Andrey Smirnov
2019-04-01 4:25 ` [PATCH v3 03/11] PCI: imx6: Return -ETIMEOUT from imx6_pcie_wait_for_speed_change() Andrey Smirnov
2019-04-12 15:54 ` Lucas Stach
2019-04-01 4:25 ` [PATCH v3 04/11] PCI: imx6: Remove PCIE_PL_PFLR_* constants Andrey Smirnov
2019-04-12 15:54 ` Lucas Stach
2019-04-01 4:25 ` [PATCH v3 05/11] PCI: dwc: imx6: Share PHY debug register definitions Andrey Smirnov
2019-04-12 15:56 ` Lucas Stach
2019-04-01 4:25 ` [PATCH v3 06/11] PCI: imx6: Make use of BIT() in constant definitions Andrey Smirnov
2019-04-12 15:56 ` Lucas Stach
2019-04-01 4:25 ` [PATCH v3 07/11] PCI: imx6: Simplify bit operations in PHY functions Andrey Smirnov
2019-04-12 15:59 ` Lucas Stach
2019-04-01 4:25 ` [PATCH v3 08/11] PCI: imx6: Simplify pcie_phy_poll_ack() Andrey Smirnov
2019-04-12 16:12 ` Lucas Stach
2019-04-14 18:46 ` Andrey Smirnov
2019-04-01 4:25 ` [PATCH v3 09/11] PCI: imx6: Restrict PHY register data to 16-bit Andrey Smirnov
2019-04-12 16:15 ` Lucas Stach [this message]
2019-04-01 4:25 ` [PATCH v3 10/11] PCI: imx6: Use flags to indicate support for suspend Andrey Smirnov
2019-04-12 16:17 ` Lucas Stach
2019-04-01 4:25 ` [PATCH v3 11/11] PCI: imx6: Replace calls to udelay() with usleep_range() Andrey Smirnov
2019-04-12 16:26 ` Lucas Stach
2019-04-14 18:48 ` Andrey Smirnov
2019-04-12 9:32 ` [PATCH v3 00/11] i.MX6, DesignWare PCI improvements Lorenzo Pieralisi
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