* [PATCH v1 01/10] dt-bindings: imx6q-pcie: Add iMX8MM PCIe EP mode compatible string
2022-07-19 9:45 [PATCH v1 0/10] Add iMX PCIe EP mode support Richard Zhu
@ 2022-07-19 9:45 ` Richard Zhu
2022-07-19 14:11 ` Rob Herring
2022-07-22 0:28 ` Rob Herring
2022-07-19 9:45 ` [PATCH v1 02/10] dt-bindings: imx6q-pcie: Add iMX8MQ " Richard Zhu
` (8 subsequent siblings)
9 siblings, 2 replies; 17+ messages in thread
From: Richard Zhu @ 2022-07-19 9:45 UTC (permalink / raw)
To: l.stach, bhelgaas, robh+dt, lorenzo.pieralisi, shawnguo, kishon,
kw, frank.li
Cc: hongxing.zhu, linux-pci, devicetree, linux-arm-kernel,
linux-kernel, kernel, linux-imx
Add i.MX8MM PCIe endpoint mode compatible string.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
---
Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
index 252e5b72aee0..d52c6396fe11 100644
--- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
@@ -27,6 +27,7 @@ properties:
- fsl,imx8mq-pcie
- fsl,imx8mm-pcie
- fsl,imx8mp-pcie
+ - fsl,imx8mm-pcie-ep
reg:
items:
--
2.25.1
^ permalink raw reply related [flat|nested] 17+ messages in thread* Re: [PATCH v1 01/10] dt-bindings: imx6q-pcie: Add iMX8MM PCIe EP mode compatible string
2022-07-19 9:45 ` [PATCH v1 01/10] dt-bindings: imx6q-pcie: Add iMX8MM PCIe EP mode compatible string Richard Zhu
@ 2022-07-19 14:11 ` Rob Herring
2022-07-19 14:20 ` Rob Herring
2022-07-21 2:40 ` Hongxing Zhu
2022-07-22 0:28 ` Rob Herring
1 sibling, 2 replies; 17+ messages in thread
From: Rob Herring @ 2022-07-19 14:11 UTC (permalink / raw)
To: Richard Zhu
Cc: l.stach, lorenzo.pieralisi, kishon, linux-kernel, kernel,
linux-imx, kw, robh+dt, bhelgaas, shawnguo, linux-arm-kernel,
devicetree, frank.li, linux-pci
On Tue, 19 Jul 2022 17:45:30 +0800, Richard Zhu wrote:
> Add i.MX8MM PCIe endpoint mode compatible string.
>
> Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
> ---
> Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml | 1 +
> 1 file changed, 1 insertion(+)
>
Running 'make dtbs_check' with the schema in this patch gives the
following warnings. Consider if they are expected or the schema is
incorrect. These may not be new warnings.
Note that it is not yet a requirement to have 0 warnings for dtbs_check.
This will change in the future.
Full log is available here: https://patchwork.ozlabs.org/patch/
pcie@1ffc000: Unevaluated properties are not allowed ('disable-gpio' was unexpected)
arch/arm/boot/dts/imx6dl-emcon-avari.dtb
arch/arm/boot/dts/imx6q-emcon-avari.dtb
pcie@33800000: clock-names:1: 'pcie_bus' was expected
arch/arm64/boot/dts/freescale/imx8mm-beacon-kit.dtb
arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc.dtb
arch/arm64/boot/dts/freescale/imx8mm-ddr4-evk.dtb
arch/arm64/boot/dts/freescale/imx8mm-evk.dtb
arch/arm64/boot/dts/freescale/imx8mm-mx8menlo.dtb
arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml-mba8mx.dtb
arch/arm64/boot/dts/freescale/imx8mm-venice-gw71xx-0x.dtb
arch/arm64/boot/dts/freescale/imx8mm-venice-gw72xx-0x.dtb
arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx-0x.dtb
arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dtb
arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dtb
arch/arm64/boot/dts/freescale/imx8mm-venice-gw7903.dtb
arch/arm64/boot/dts/freescale/imx8mm-verdin-nonwifi-dahlia.dtb
arch/arm64/boot/dts/freescale/imx8mm-verdin-nonwifi-dev.dtb
arch/arm64/boot/dts/freescale/imx8mm-verdin-wifi-dahlia.dtb
arch/arm64/boot/dts/freescale/imx8mm-verdin-wifi-dev.dtb
arch/arm64/boot/dts/freescale/imx8mq-evk.dtb
arch/arm64/boot/dts/freescale/imx8mq-kontron-pitx-imx8m.dtb
arch/arm64/boot/dts/freescale/imx8mq-tqma8mq-mba8mx.dtb
arch/arm64/boot/dts/freescale/imx8mq-zii-ultra-rmb3.dtb
arch/arm64/boot/dts/freescale/imx8mq-zii-ultra-zest.dtb
pcie@33800000: clock-names:2: 'pcie_phy' was expected
arch/arm64/boot/dts/freescale/imx8mm-beacon-kit.dtb
arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc.dtb
arch/arm64/boot/dts/freescale/imx8mm-ddr4-evk.dtb
arch/arm64/boot/dts/freescale/imx8mm-evk.dtb
arch/arm64/boot/dts/freescale/imx8mm-mx8menlo.dtb
arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml-mba8mx.dtb
arch/arm64/boot/dts/freescale/imx8mm-venice-gw71xx-0x.dtb
arch/arm64/boot/dts/freescale/imx8mm-venice-gw72xx-0x.dtb
arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx-0x.dtb
arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dtb
arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dtb
arch/arm64/boot/dts/freescale/imx8mm-venice-gw7903.dtb
arch/arm64/boot/dts/freescale/imx8mm-verdin-nonwifi-dahlia.dtb
arch/arm64/boot/dts/freescale/imx8mm-verdin-nonwifi-dev.dtb
arch/arm64/boot/dts/freescale/imx8mm-verdin-wifi-dahlia.dtb
arch/arm64/boot/dts/freescale/imx8mm-verdin-wifi-dev.dtb
pcie@33800000: clock-names:3: 'pcie_inbound_axi for imx6sx-pcie, pcie_aux for imx8mq-pcie' was expected
arch/arm64/boot/dts/freescale/imx8mq-evk.dtb
arch/arm64/boot/dts/freescale/imx8mq-kontron-pitx-imx8m.dtb
arch/arm64/boot/dts/freescale/imx8mq-tqma8mq-mba8mx.dtb
arch/arm64/boot/dts/freescale/imx8mq-zii-ultra-rmb3.dtb
arch/arm64/boot/dts/freescale/imx8mq-zii-ultra-zest.dtb
pcie@33800000: power-domains: [[100]] is too short
arch/arm/boot/dts/imx7d-colibri-aster.dtb
arch/arm/boot/dts/imx7d-colibri-emmc-aster.dtb
pcie@33800000: power-domains: [[102]] is too short
arch/arm64/boot/dts/freescale/imx8mq-zii-ultra-rmb3.dtb
pcie@33800000: power-domains: [[103]] is too short
arch/arm/boot/dts/imx7d-colibri-emmc-eval-v3.dtb
arch/arm/boot/dts/imx7d-colibri-eval-v3.dtb
pcie@33800000: power-domains: [[106]] is too short
arch/arm64/boot/dts/freescale/imx8mm-verdin-nonwifi-dahlia.dtb
arch/arm64/boot/dts/freescale/imx8mm-verdin-nonwifi-dev.dtb
pcie@33800000: power-domains: [[108]] is too short
arch/arm64/boot/dts/freescale/imx8mm-verdin-wifi-dahlia.dtb
arch/arm64/boot/dts/freescale/imx8mm-verdin-wifi-dev.dtb
pcie@33800000: power-domains: [[124]] is too short
arch/arm64/boot/dts/freescale/imx8mq-librem5-r2.dtb
pcie@33800000: power-domains: [[125]] is too short
arch/arm64/boot/dts/freescale/imx8mq-librem5-r3.dtb
arch/arm64/boot/dts/freescale/imx8mq-librem5-r4.dtb
pcie@33800000: power-domains: [[55]] is too short
arch/arm64/boot/dts/freescale/imx8mm-icore-mx8mm-ctouch2.dtb
arch/arm64/boot/dts/freescale/imx8mm-icore-mx8mm-edimm2.2.dtb
pcie@33800000: power-domains: [[59]] is too short
arch/arm/boot/dts/imx7d-cl-som-imx7.dtb
pcie@33800000: power-domains: [[61]] is too short
arch/arm/boot/dts/imx7d-sbc-imx7.dtb
pcie@33800000: power-domains: [[63]] is too short
arch/arm/boot/dts/imx7d-zii-rmu2.dtb
pcie@33800000: power-domains: [[64]] is too short
arch/arm64/boot/dts/freescale/imx8mm-venice-gw71xx-0x.dtb
arch/arm/boot/dts/imx7d-remarkable2.dtb
pcie@33800000: power-domains: [[66]] is too short
arch/arm64/boot/dts/freescale/imx8mm-ddr4-evk.dtb
pcie@33800000: power-domains: [[68]] is too short
arch/arm64/boot/dts/freescale/imx8mm-venice-gw7903.dtb
arch/arm/boot/dts/imx7d-meerkat96.dtb
pcie@33800000: power-domains: [[69]] is too short
arch/arm64/boot/dts/freescale/imx8mm-evk.dtb
pcie@33800000: power-domains: [[70]] is too short
arch/arm64/boot/dts/freescale/imx8mq-phanbell.dtb
arch/arm64/boot/dts/freescale/imx8mq-pico-pi.dtb
pcie@33800000: power-domains: [[72]] is too short
arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dtb
arch/arm64/boot/dts/freescale/imx8mm-venice-gw72xx-0x.dtb
pcie@33800000: power-domains: [[73]] is too short
arch/arm/boot/dts/imx7d-flex-concentrator.dtb
arch/arm/boot/dts/imx7d-flex-concentrator-mfg.dtb
arch/arm/boot/dts/imx7d-smegw01.dtb
pcie@33800000: power-domains: [[76]] is too short
arch/arm64/boot/dts/freescale/imx8mm-emcon-avari.dtb
arch/arm64/boot/dts/freescale/imx8mm-var-som-symphony.dtb
arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx-0x.dtb
arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dtb
pcie@33800000: power-domains: [[78]] is too short
arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dtb
arch/arm64/boot/dts/freescale/imx8mq-nitrogen.dtb
pcie@33800000: power-domains: [[79]] is too short
arch/arm64/boot/dts/freescale/imx8mq-hummingboard-pulse.dtb
pcie@33800000: power-domains: [[80]] is too short
arch/arm64/boot/dts/freescale/imx8mq-evk.dtb
arch/arm64/boot/dts/freescale/imx8mq-kontron-pitx-imx8m.dtb
pcie@33800000: power-domains: [[81]] is too short
arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dtb
arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml-mba8mx.dtb
pcie@33800000: power-domains: [[82]] is too short
arch/arm64/boot/dts/freescale/imx8mm-beacon-kit.dtb
arch/arm64/boot/dts/freescale/imx8mq-mnt-reform2.dtb
arch/arm64/boot/dts/freescale/imx8mq-thor96.dtb
pcie@33800000: power-domains: [[84]] is too short
arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc.dtb
pcie@33800000: power-domains: [[86]] is too short
arch/arm/boot/dts/imx7d-nitrogen7.dtb
arch/arm/boot/dts/imx7d-pico-nymph.dtb
pcie@33800000: power-domains: [[87]] is too short
arch/arm/boot/dts/imx7d-sdb-reva.dtb
pcie@33800000: power-domains: [[88]] is too short
arch/arm/boot/dts/imx7d-pico-dwarf.dtb
arch/arm/boot/dts/imx7d-pico-hobbit.dtb
arch/arm/boot/dts/imx7d-sdb.dtb
arch/arm/boot/dts/imx7d-sdb-sht11.dtb
pcie@33800000: power-domains: [[89]] is too short
arch/arm/boot/dts/imx7d-pico-pi.dtb
arch/arm/boot/dts/imx7d-zii-rpu2.dtb
pcie@33800000: power-domains: [[92]] is too short
arch/arm64/boot/dts/freescale/imx8mq-tqma8mq-mba8mx.dtb
pcie@33800000: power-domains: [[96]] is too short
arch/arm64/boot/dts/freescale/imx8mm-mx8menlo.dtb
arch/arm/boot/dts/imx7d-mba7.dtb
pcie@33800000: power-domains: [[97]] is too short
arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dtb
pcie@33800000: power-domains: [[98]] is too short
arch/arm64/boot/dts/freescale/imx8mq-zii-ultra-zest.dtb
pcie@33800000: reset-names:0: 'pciephy' was expected
arch/arm64/boot/dts/freescale/imx8mm-beacon-kit.dtb
arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc.dtb
arch/arm64/boot/dts/freescale/imx8mm-ddr4-evk.dtb
arch/arm64/boot/dts/freescale/imx8mm-emcon-avari.dtb
arch/arm64/boot/dts/freescale/imx8mm-evk.dtb
arch/arm64/boot/dts/freescale/imx8mm-icore-mx8mm-ctouch2.dtb
arch/arm64/boot/dts/freescale/imx8mm-icore-mx8mm-edimm2.2.dtb
arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dtb
arch/arm64/boot/dts/freescale/imx8mm-mx8menlo.dtb
arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dtb
arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml-mba8mx.dtb
arch/arm64/boot/dts/freescale/imx8mm-var-som-symphony.dtb
arch/arm64/boot/dts/freescale/imx8mm-venice-gw71xx-0x.dtb
arch/arm64/boot/dts/freescale/imx8mm-venice-gw72xx-0x.dtb
arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx-0x.dtb
arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dtb
arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dtb
arch/arm64/boot/dts/freescale/imx8mm-venice-gw7903.dtb
arch/arm64/boot/dts/freescale/imx8mm-verdin-nonwifi-dahlia.dtb
arch/arm64/boot/dts/freescale/imx8mm-verdin-nonwifi-dev.dtb
arch/arm64/boot/dts/freescale/imx8mm-verdin-wifi-dahlia.dtb
arch/arm64/boot/dts/freescale/imx8mm-verdin-wifi-dev.dtb
pcie@33800000: reset-names:1: 'apps' was expected
arch/arm64/boot/dts/freescale/imx8mm-beacon-kit.dtb
arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc.dtb
arch/arm64/boot/dts/freescale/imx8mm-ddr4-evk.dtb
arch/arm64/boot/dts/freescale/imx8mm-emcon-avari.dtb
arch/arm64/boot/dts/freescale/imx8mm-evk.dtb
arch/arm64/boot/dts/freescale/imx8mm-icore-mx8mm-ctouch2.dtb
arch/arm64/boot/dts/freescale/imx8mm-icore-mx8mm-edimm2.2.dtb
arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dtb
arch/arm64/boot/dts/freescale/imx8mm-mx8menlo.dtb
arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dtb
arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml-mba8mx.dtb
arch/arm64/boot/dts/freescale/imx8mm-var-som-symphony.dtb
arch/arm64/boot/dts/freescale/imx8mm-venice-gw71xx-0x.dtb
arch/arm64/boot/dts/freescale/imx8mm-venice-gw72xx-0x.dtb
arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx-0x.dtb
arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dtb
arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dtb
arch/arm64/boot/dts/freescale/imx8mm-venice-gw7903.dtb
arch/arm64/boot/dts/freescale/imx8mm-verdin-nonwifi-dahlia.dtb
arch/arm64/boot/dts/freescale/imx8mm-verdin-nonwifi-dev.dtb
arch/arm64/boot/dts/freescale/imx8mm-verdin-wifi-dahlia.dtb
arch/arm64/boot/dts/freescale/imx8mm-verdin-wifi-dev.dtb
pcie@33800000: reset-names: ['apps', 'turnoff'] is too short
arch/arm64/boot/dts/freescale/imx8mm-beacon-kit.dtb
arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc.dtb
arch/arm64/boot/dts/freescale/imx8mm-ddr4-evk.dtb
arch/arm64/boot/dts/freescale/imx8mm-emcon-avari.dtb
arch/arm64/boot/dts/freescale/imx8mm-evk.dtb
arch/arm64/boot/dts/freescale/imx8mm-icore-mx8mm-ctouch2.dtb
arch/arm64/boot/dts/freescale/imx8mm-icore-mx8mm-edimm2.2.dtb
arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dtb
arch/arm64/boot/dts/freescale/imx8mm-mx8menlo.dtb
arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dtb
arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml-mba8mx.dtb
arch/arm64/boot/dts/freescale/imx8mm-var-som-symphony.dtb
arch/arm64/boot/dts/freescale/imx8mm-venice-gw71xx-0x.dtb
arch/arm64/boot/dts/freescale/imx8mm-venice-gw72xx-0x.dtb
arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx-0x.dtb
arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dtb
arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dtb
arch/arm64/boot/dts/freescale/imx8mm-venice-gw7903.dtb
arch/arm64/boot/dts/freescale/imx8mm-verdin-nonwifi-dahlia.dtb
arch/arm64/boot/dts/freescale/imx8mm-verdin-nonwifi-dev.dtb
arch/arm64/boot/dts/freescale/imx8mm-verdin-wifi-dahlia.dtb
arch/arm64/boot/dts/freescale/imx8mm-verdin-wifi-dev.dtb
pcie@33800000: resets: [[25, 28], [25, 29]] is too short
arch/arm64/boot/dts/freescale/imx8mm-icore-mx8mm-ctouch2.dtb
arch/arm64/boot/dts/freescale/imx8mm-icore-mx8mm-edimm2.2.dtb
pcie@33800000: resets: [[26, 28], [26, 29]] is too short
arch/arm64/boot/dts/freescale/imx8mm-var-som-symphony.dtb
arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dtb
pcie@33800000: resets: [[27, 28], [27, 29]] is too short
arch/arm64/boot/dts/freescale/imx8mm-ddr4-evk.dtb
arch/arm64/boot/dts/freescale/imx8mm-evk.dtb
arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dtb
arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml-mba8mx.dtb
arch/arm64/boot/dts/freescale/imx8mm-venice-gw71xx-0x.dtb
arch/arm64/boot/dts/freescale/imx8mm-venice-gw7903.dtb
pcie@33800000: resets: [[28, 28], [28, 29]] is too short
arch/arm64/boot/dts/freescale/imx8mm-beacon-kit.dtb
arch/arm64/boot/dts/freescale/imx8mm-emcon-avari.dtb
arch/arm64/boot/dts/freescale/imx8mm-venice-gw72xx-0x.dtb
arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx-0x.dtb
arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dtb
pcie@33800000: resets: [[29, 28], [29, 29]] is too short
arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dtb
pcie@33800000: resets: [[31, 28], [31, 29]] is too short
arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc.dtb
pcie@33800000: resets: [[33, 28], [33, 29]] is too short
arch/arm64/boot/dts/freescale/imx8mm-mx8menlo.dtb
pcie@33800000: resets: [[39, 28], [39, 29]] is too short
arch/arm64/boot/dts/freescale/imx8mm-verdin-nonwifi-dahlia.dtb
arch/arm64/boot/dts/freescale/imx8mm-verdin-nonwifi-dev.dtb
arch/arm64/boot/dts/freescale/imx8mm-verdin-wifi-dahlia.dtb
arch/arm64/boot/dts/freescale/imx8mm-verdin-wifi-dev.dtb
pcie@33800000: Unevaluated properties are not allowed ('clock-names', 'epdev_on-supply', 'hard-wired', 'power-domains' were unexpected)
arch/arm64/boot/dts/freescale/imx8mq-tqma8mq-mba8mx.dtb
pcie@33800000: Unevaluated properties are not allowed ('clock-names', 'power-domains', 'reset-names', 'resets' were unexpected)
arch/arm64/boot/dts/freescale/imx8mm-beacon-kit.dtb
arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc.dtb
arch/arm64/boot/dts/freescale/imx8mm-ddr4-evk.dtb
arch/arm64/boot/dts/freescale/imx8mm-evk.dtb
arch/arm64/boot/dts/freescale/imx8mm-mx8menlo.dtb
arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml-mba8mx.dtb
arch/arm64/boot/dts/freescale/imx8mm-venice-gw71xx-0x.dtb
arch/arm64/boot/dts/freescale/imx8mm-venice-gw72xx-0x.dtb
arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx-0x.dtb
arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dtb
arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dtb
arch/arm64/boot/dts/freescale/imx8mm-venice-gw7903.dtb
arch/arm64/boot/dts/freescale/imx8mm-verdin-nonwifi-dahlia.dtb
arch/arm64/boot/dts/freescale/imx8mm-verdin-nonwifi-dev.dtb
arch/arm64/boot/dts/freescale/imx8mm-verdin-wifi-dahlia.dtb
arch/arm64/boot/dts/freescale/imx8mm-verdin-wifi-dev.dtb
pcie@33800000: Unevaluated properties are not allowed ('clock-names', 'power-domains' were unexpected)
arch/arm64/boot/dts/freescale/imx8mq-evk.dtb
arch/arm64/boot/dts/freescale/imx8mq-kontron-pitx-imx8m.dtb
arch/arm64/boot/dts/freescale/imx8mq-zii-ultra-rmb3.dtb
arch/arm64/boot/dts/freescale/imx8mq-zii-ultra-zest.dtb
pcie@33800000: Unevaluated properties are not allowed ('power-domains', 'reset-names', 'resets' were unexpected)
arch/arm64/boot/dts/freescale/imx8mm-emcon-avari.dtb
arch/arm64/boot/dts/freescale/imx8mm-icore-mx8mm-ctouch2.dtb
arch/arm64/boot/dts/freescale/imx8mm-icore-mx8mm-edimm2.2.dtb
arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dtb
arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dtb
arch/arm64/boot/dts/freescale/imx8mm-var-som-symphony.dtb
pcie@33800000: Unevaluated properties are not allowed ('power-domains' was unexpected)
arch/arm64/boot/dts/freescale/imx8mq-hummingboard-pulse.dtb
arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dtb
arch/arm64/boot/dts/freescale/imx8mq-librem5-r2.dtb
arch/arm64/boot/dts/freescale/imx8mq-librem5-r3.dtb
arch/arm64/boot/dts/freescale/imx8mq-librem5-r4.dtb
arch/arm64/boot/dts/freescale/imx8mq-mnt-reform2.dtb
arch/arm64/boot/dts/freescale/imx8mq-nitrogen.dtb
arch/arm64/boot/dts/freescale/imx8mq-phanbell.dtb
arch/arm64/boot/dts/freescale/imx8mq-pico-pi.dtb
arch/arm64/boot/dts/freescale/imx8mq-thor96.dtb
arch/arm/boot/dts/imx7d-cl-som-imx7.dtb
arch/arm/boot/dts/imx7d-colibri-aster.dtb
arch/arm/boot/dts/imx7d-colibri-emmc-aster.dtb
arch/arm/boot/dts/imx7d-colibri-emmc-eval-v3.dtb
arch/arm/boot/dts/imx7d-colibri-eval-v3.dtb
arch/arm/boot/dts/imx7d-flex-concentrator.dtb
arch/arm/boot/dts/imx7d-flex-concentrator-mfg.dtb
arch/arm/boot/dts/imx7d-mba7.dtb
arch/arm/boot/dts/imx7d-meerkat96.dtb
arch/arm/boot/dts/imx7d-nitrogen7.dtb
arch/arm/boot/dts/imx7d-pico-dwarf.dtb
arch/arm/boot/dts/imx7d-pico-hobbit.dtb
arch/arm/boot/dts/imx7d-pico-nymph.dtb
arch/arm/boot/dts/imx7d-pico-pi.dtb
arch/arm/boot/dts/imx7d-remarkable2.dtb
arch/arm/boot/dts/imx7d-sbc-imx7.dtb
arch/arm/boot/dts/imx7d-sdb.dtb
arch/arm/boot/dts/imx7d-sdb-reva.dtb
arch/arm/boot/dts/imx7d-sdb-sht11.dtb
arch/arm/boot/dts/imx7d-smegw01.dtb
arch/arm/boot/dts/imx7d-zii-rmu2.dtb
arch/arm/boot/dts/imx7d-zii-rpu2.dtb
pcie@33c00000: 'bus-range' is a required property
arch/arm64/boot/dts/freescale/imx8mq-evk.dtb
arch/arm64/boot/dts/freescale/imx8mq-kontron-pitx-imx8m.dtb
arch/arm64/boot/dts/freescale/imx8mq-mnt-reform2.dtb
arch/arm64/boot/dts/freescale/imx8mq-tqma8mq-mba8mx.dtb
arch/arm64/boot/dts/freescale/imx8mq-zii-ultra-rmb3.dtb
arch/arm64/boot/dts/freescale/imx8mq-zii-ultra-zest.dtb
pcie@33c00000: clock-names:1: 'pcie_bus' was expected
arch/arm64/boot/dts/freescale/imx8mq-evk.dtb
arch/arm64/boot/dts/freescale/imx8mq-kontron-pitx-imx8m.dtb
arch/arm64/boot/dts/freescale/imx8mq-mnt-reform2.dtb
arch/arm64/boot/dts/freescale/imx8mq-tqma8mq-mba8mx.dtb
arch/arm64/boot/dts/freescale/imx8mq-zii-ultra-rmb3.dtb
arch/arm64/boot/dts/freescale/imx8mq-zii-ultra-zest.dtb
pcie@33c00000: clock-names:3: 'pcie_inbound_axi for imx6sx-pcie, pcie_aux for imx8mq-pcie' was expected
arch/arm64/boot/dts/freescale/imx8mq-evk.dtb
arch/arm64/boot/dts/freescale/imx8mq-kontron-pitx-imx8m.dtb
arch/arm64/boot/dts/freescale/imx8mq-mnt-reform2.dtb
arch/arm64/boot/dts/freescale/imx8mq-tqma8mq-mba8mx.dtb
arch/arm64/boot/dts/freescale/imx8mq-zii-ultra-rmb3.dtb
arch/arm64/boot/dts/freescale/imx8mq-zii-ultra-zest.dtb
pcie@33c00000: power-domains: [[102]] is too short
arch/arm64/boot/dts/freescale/imx8mq-zii-ultra-rmb3.dtb
pcie@33c00000: power-domains: [[124]] is too short
arch/arm64/boot/dts/freescale/imx8mq-librem5-r2.dtb
pcie@33c00000: power-domains: [[125]] is too short
arch/arm64/boot/dts/freescale/imx8mq-librem5-r3.dtb
arch/arm64/boot/dts/freescale/imx8mq-librem5-r4.dtb
pcie@33c00000: power-domains: [[70]] is too short
arch/arm64/boot/dts/freescale/imx8mq-phanbell.dtb
arch/arm64/boot/dts/freescale/imx8mq-pico-pi.dtb
pcie@33c00000: power-domains: [[78]] is too short
arch/arm64/boot/dts/freescale/imx8mq-nitrogen.dtb
pcie@33c00000: power-domains: [[79]] is too short
arch/arm64/boot/dts/freescale/imx8mq-hummingboard-pulse.dtb
pcie@33c00000: power-domains: [[80]] is too short
arch/arm64/boot/dts/freescale/imx8mq-evk.dtb
arch/arm64/boot/dts/freescale/imx8mq-kontron-pitx-imx8m.dtb
pcie@33c00000: power-domains: [[82]] is too short
arch/arm64/boot/dts/freescale/imx8mq-mnt-reform2.dtb
arch/arm64/boot/dts/freescale/imx8mq-thor96.dtb
pcie@33c00000: power-domains: [[92]] is too short
arch/arm64/boot/dts/freescale/imx8mq-tqma8mq-mba8mx.dtb
pcie@33c00000: power-domains: [[97]] is too short
arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dtb
pcie@33c00000: power-domains: [[98]] is too short
arch/arm64/boot/dts/freescale/imx8mq-zii-ultra-zest.dtb
pcie@33c00000: Unevaluated properties are not allowed ('clock-names', 'epdev_on-supply', 'hard-wired', 'power-domains' were unexpected)
arch/arm64/boot/dts/freescale/imx8mq-tqma8mq-mba8mx.dtb
pcie@33c00000: Unevaluated properties are not allowed ('clock-names', 'power-domains' were unexpected)
arch/arm64/boot/dts/freescale/imx8mq-evk.dtb
arch/arm64/boot/dts/freescale/imx8mq-kontron-pitx-imx8m.dtb
arch/arm64/boot/dts/freescale/imx8mq-mnt-reform2.dtb
arch/arm64/boot/dts/freescale/imx8mq-zii-ultra-rmb3.dtb
arch/arm64/boot/dts/freescale/imx8mq-zii-ultra-zest.dtb
pcie@33c00000: Unevaluated properties are not allowed ('power-domains' was unexpected)
arch/arm64/boot/dts/freescale/imx8mq-hummingboard-pulse.dtb
arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dtb
arch/arm64/boot/dts/freescale/imx8mq-librem5-r2.dtb
arch/arm64/boot/dts/freescale/imx8mq-librem5-r3.dtb
arch/arm64/boot/dts/freescale/imx8mq-librem5-r4.dtb
arch/arm64/boot/dts/freescale/imx8mq-nitrogen.dtb
arch/arm64/boot/dts/freescale/imx8mq-phanbell.dtb
arch/arm64/boot/dts/freescale/imx8mq-pico-pi.dtb
arch/arm64/boot/dts/freescale/imx8mq-thor96.dtb
pcie@8ffc000: clock-names:3: 'pcie_inbound_axi for imx6sx-pcie, pcie_aux for imx8mq-pcie' was expected
arch/arm/boot/dts/imx6sx-nitrogen6sx.dtb
arch/arm/boot/dts/imx6sx-sabreauto.dtb
arch/arm/boot/dts/imx6sx-sdb.dtb
arch/arm/boot/dts/imx6sx-sdb-mqs.dtb
arch/arm/boot/dts/imx6sx-sdb-reva.dtb
arch/arm/boot/dts/imx6sx-sdb-sai.dtb
arch/arm/boot/dts/imx6sx-softing-vining-2000.dtb
arch/arm/boot/dts/imx6sx-udoo-neo-basic.dtb
arch/arm/boot/dts/imx6sx-udoo-neo-extended.dtb
arch/arm/boot/dts/imx6sx-udoo-neo-full.dtb
pcie@8ffc000: Unevaluated properties are not allowed ('clock-names' was unexpected)
arch/arm/boot/dts/imx6sx-nitrogen6sx.dtb
arch/arm/boot/dts/imx6sx-sabreauto.dtb
arch/arm/boot/dts/imx6sx-sdb.dtb
arch/arm/boot/dts/imx6sx-sdb-mqs.dtb
arch/arm/boot/dts/imx6sx-sdb-reva.dtb
arch/arm/boot/dts/imx6sx-sdb-sai.dtb
arch/arm/boot/dts/imx6sx-softing-vining-2000.dtb
arch/arm/boot/dts/imx6sx-udoo-neo-basic.dtb
arch/arm/boot/dts/imx6sx-udoo-neo-extended.dtb
arch/arm/boot/dts/imx6sx-udoo-neo-full.dtb
^ permalink raw reply [flat|nested] 17+ messages in thread* Re: [PATCH v1 01/10] dt-bindings: imx6q-pcie: Add iMX8MM PCIe EP mode compatible string
2022-07-19 14:11 ` Rob Herring
@ 2022-07-19 14:20 ` Rob Herring
2022-07-21 2:40 ` Hongxing Zhu
1 sibling, 0 replies; 17+ messages in thread
From: Rob Herring @ 2022-07-19 14:20 UTC (permalink / raw)
To: Richard Zhu
Cc: Lucas Stach, Lorenzo Pieralisi, Kishon Vijay Abraham I,
linux-kernel, Sascha Hauer, NXP Linux Team, Krzysztof Wilczynski,
Bjorn Helgaas, Shawn Guo, linux-arm-kernel, devicetree, Frank Li,
PCI
On Tue, Jul 19, 2022 at 8:11 AM Rob Herring <robh@kernel.org> wrote:
>
> On Tue, 19 Jul 2022 17:45:30 +0800, Richard Zhu wrote:
> > Add i.MX8MM PCIe endpoint mode compatible string.
> >
> > Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
> > ---
> > Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml | 1 +
> > 1 file changed, 1 insertion(+)
> >
>
> Running 'make dtbs_check' with the schema in this patch gives the
> following warnings. Consider if they are expected or the schema is
> incorrect. These may not be new warnings.
>
> Note that it is not yet a requirement to have 0 warnings for dtbs_check.
> This will change in the future.
These are obviously not caused by this change, but it's a long list of
warnings and many look like the schema needs to be changed. For
example, this one is obviously a schema problem:
> pcie@33800000: clock-names:3: 'pcie_inbound_axi for imx6sx-pcie, pcie_aux for imx8mq-pcie' was expected
Rob
^ permalink raw reply [flat|nested] 17+ messages in thread
* RE: [PATCH v1 01/10] dt-bindings: imx6q-pcie: Add iMX8MM PCIe EP mode compatible string
2022-07-19 14:11 ` Rob Herring
2022-07-19 14:20 ` Rob Herring
@ 2022-07-21 2:40 ` Hongxing Zhu
1 sibling, 0 replies; 17+ messages in thread
From: Hongxing Zhu @ 2022-07-21 2:40 UTC (permalink / raw)
To: Rob Herring
Cc: l.stach, lorenzo.pieralisi, kishon, linux-kernel, kernel,
dl-linux-imx, kw, robh+dt, bhelgaas, shawnguo, linux-arm-kernel,
devicetree, Frank Li, linux-pci
> -----Original Message-----
> From: Rob Herring <robh@kernel.org>
> Sent: 2022年7月19日 22:11
> To: Hongxing Zhu <hongxing.zhu@nxp.com>
> Cc: l.stach@pengutronix.de; lorenzo.pieralisi@arm.com; kishon@ti.com;
> linux-kernel@vger.kernel.org; kernel@pengutronix.de; dl-linux-imx
> <linux-imx@nxp.com>; kw@linux.com; robh+dt@kernel.org;
> bhelgaas@google.com; shawnguo@kernel.org;
> linux-arm-kernel@lists.infradead.org; devicetree@vger.kernel.org; Frank Li
> <frank.li@nxp.com>; linux-pci@vger.kernel.org
> Subject: Re: [PATCH v1 01/10] dt-bindings: imx6q-pcie: Add iMX8MM PCIe EP
> mode compatible string
>
> On Tue, 19 Jul 2022 17:45:30 +0800, Richard Zhu wrote:
> > Add i.MX8MM PCIe endpoint mode compatible string.
> >
> > Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
> > ---
> > Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml | 1 +
> > 1 file changed, 1 insertion(+)
> >
>
> Running 'make dtbs_check' with the schema in this patch gives the following
> warnings. Consider if they are expected or the schema is incorrect. These may
> not be new warnings.
>
> Note that it is not yet a requirement to have 0 warnings for dtbs_check.
> This will change in the future.
Hi Rob:
Thanks for your kindly help on this.
There are so many warning. I would consider how to fix them since a lot of
dts files are related.
Best Regards
Richard Zhu
>
> Full log is available here:
> https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatchw
> ork.ozlabs.org%2Fpatch%2F&data=05%7C01%7Chongxing.zhu%40nxp.co
> m%7C7c686264e9e540d78a7908da699085a1%7C686ea1d3bc2b4c6fa92cd9
> 9c5c301635%7C0%7C0%7C637938366691697843%7CUnknown%7CTWFpbG
> Zsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6M
> n0%3D%7C3000%7C%7C%7C&sdata=R05hHFh0c9ST5s2xvh8LRHUAULZy
> bL73g466uv0dUl0%3D&reserved=0
>
>
> pcie@1ffc000: Unevaluated properties are not allowed ('disable-gpio' was
> unexpected)
> arch/arm/boot/dts/imx6dl-emcon-avari.dtb
> arch/arm/boot/dts/imx6q-emcon-avari.dtb
>
> pcie@33800000: clock-names:1: 'pcie_bus' was expected
> arch/arm64/boot/dts/freescale/imx8mm-beacon-kit.dtb
> arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc.dtb
> arch/arm64/boot/dts/freescale/imx8mm-ddr4-evk.dtb
> arch/arm64/boot/dts/freescale/imx8mm-evk.dtb
> arch/arm64/boot/dts/freescale/imx8mm-mx8menlo.dtb
> arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml-mba8mx.dtb
> arch/arm64/boot/dts/freescale/imx8mm-venice-gw71xx-0x.dtb
> arch/arm64/boot/dts/freescale/imx8mm-venice-gw72xx-0x.dtb
> arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx-0x.dtb
> arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dtb
> arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dtb
> arch/arm64/boot/dts/freescale/imx8mm-venice-gw7903.dtb
> arch/arm64/boot/dts/freescale/imx8mm-verdin-nonwifi-dahlia.dtb
> arch/arm64/boot/dts/freescale/imx8mm-verdin-nonwifi-dev.dtb
> arch/arm64/boot/dts/freescale/imx8mm-verdin-wifi-dahlia.dtb
> arch/arm64/boot/dts/freescale/imx8mm-verdin-wifi-dev.dtb
> arch/arm64/boot/dts/freescale/imx8mq-evk.dtb
> arch/arm64/boot/dts/freescale/imx8mq-kontron-pitx-imx8m.dtb
> arch/arm64/boot/dts/freescale/imx8mq-tqma8mq-mba8mx.dtb
> arch/arm64/boot/dts/freescale/imx8mq-zii-ultra-rmb3.dtb
> arch/arm64/boot/dts/freescale/imx8mq-zii-ultra-zest.dtb
>
> pcie@33800000: clock-names:2: 'pcie_phy' was expected
> arch/arm64/boot/dts/freescale/imx8mm-beacon-kit.dtb
> arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc.dtb
> arch/arm64/boot/dts/freescale/imx8mm-ddr4-evk.dtb
> arch/arm64/boot/dts/freescale/imx8mm-evk.dtb
> arch/arm64/boot/dts/freescale/imx8mm-mx8menlo.dtb
> arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml-mba8mx.dtb
> arch/arm64/boot/dts/freescale/imx8mm-venice-gw71xx-0x.dtb
> arch/arm64/boot/dts/freescale/imx8mm-venice-gw72xx-0x.dtb
> arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx-0x.dtb
> arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dtb
> arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dtb
> arch/arm64/boot/dts/freescale/imx8mm-venice-gw7903.dtb
> arch/arm64/boot/dts/freescale/imx8mm-verdin-nonwifi-dahlia.dtb
> arch/arm64/boot/dts/freescale/imx8mm-verdin-nonwifi-dev.dtb
> arch/arm64/boot/dts/freescale/imx8mm-verdin-wifi-dahlia.dtb
> arch/arm64/boot/dts/freescale/imx8mm-verdin-wifi-dev.dtb
>
> pcie@33800000: clock-names:3: 'pcie_inbound_axi for imx6sx-pcie, pcie_aux
> for imx8mq-pcie' was expected
> arch/arm64/boot/dts/freescale/imx8mq-evk.dtb
> arch/arm64/boot/dts/freescale/imx8mq-kontron-pitx-imx8m.dtb
> arch/arm64/boot/dts/freescale/imx8mq-tqma8mq-mba8mx.dtb
> arch/arm64/boot/dts/freescale/imx8mq-zii-ultra-rmb3.dtb
> arch/arm64/boot/dts/freescale/imx8mq-zii-ultra-zest.dtb
>
> pcie@33800000: power-domains: [[100]] is too short
> arch/arm/boot/dts/imx7d-colibri-aster.dtb
> arch/arm/boot/dts/imx7d-colibri-emmc-aster.dtb
>
> pcie@33800000: power-domains: [[102]] is too short
> arch/arm64/boot/dts/freescale/imx8mq-zii-ultra-rmb3.dtb
>
> pcie@33800000: power-domains: [[103]] is too short
> arch/arm/boot/dts/imx7d-colibri-emmc-eval-v3.dtb
> arch/arm/boot/dts/imx7d-colibri-eval-v3.dtb
>
> pcie@33800000: power-domains: [[106]] is too short
> arch/arm64/boot/dts/freescale/imx8mm-verdin-nonwifi-dahlia.dtb
> arch/arm64/boot/dts/freescale/imx8mm-verdin-nonwifi-dev.dtb
>
> pcie@33800000: power-domains: [[108]] is too short
> arch/arm64/boot/dts/freescale/imx8mm-verdin-wifi-dahlia.dtb
> arch/arm64/boot/dts/freescale/imx8mm-verdin-wifi-dev.dtb
>
> pcie@33800000: power-domains: [[124]] is too short
> arch/arm64/boot/dts/freescale/imx8mq-librem5-r2.dtb
>
> pcie@33800000: power-domains: [[125]] is too short
> arch/arm64/boot/dts/freescale/imx8mq-librem5-r3.dtb
> arch/arm64/boot/dts/freescale/imx8mq-librem5-r4.dtb
>
> pcie@33800000: power-domains: [[55]] is too short
> arch/arm64/boot/dts/freescale/imx8mm-icore-mx8mm-ctouch2.dtb
> arch/arm64/boot/dts/freescale/imx8mm-icore-mx8mm-edimm2.2.dtb
>
> pcie@33800000: power-domains: [[59]] is too short
> arch/arm/boot/dts/imx7d-cl-som-imx7.dtb
>
> pcie@33800000: power-domains: [[61]] is too short
> arch/arm/boot/dts/imx7d-sbc-imx7.dtb
>
> pcie@33800000: power-domains: [[63]] is too short
> arch/arm/boot/dts/imx7d-zii-rmu2.dtb
>
> pcie@33800000: power-domains: [[64]] is too short
> arch/arm64/boot/dts/freescale/imx8mm-venice-gw71xx-0x.dtb
> arch/arm/boot/dts/imx7d-remarkable2.dtb
>
> pcie@33800000: power-domains: [[66]] is too short
> arch/arm64/boot/dts/freescale/imx8mm-ddr4-evk.dtb
>
> pcie@33800000: power-domains: [[68]] is too short
> arch/arm64/boot/dts/freescale/imx8mm-venice-gw7903.dtb
> arch/arm/boot/dts/imx7d-meerkat96.dtb
>
> pcie@33800000: power-domains: [[69]] is too short
> arch/arm64/boot/dts/freescale/imx8mm-evk.dtb
>
> pcie@33800000: power-domains: [[70]] is too short
> arch/arm64/boot/dts/freescale/imx8mq-phanbell.dtb
> arch/arm64/boot/dts/freescale/imx8mq-pico-pi.dtb
>
> pcie@33800000: power-domains: [[72]] is too short
> arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dtb
> arch/arm64/boot/dts/freescale/imx8mm-venice-gw72xx-0x.dtb
>
> pcie@33800000: power-domains: [[73]] is too short
> arch/arm/boot/dts/imx7d-flex-concentrator.dtb
> arch/arm/boot/dts/imx7d-flex-concentrator-mfg.dtb
> arch/arm/boot/dts/imx7d-smegw01.dtb
>
> pcie@33800000: power-domains: [[76]] is too short
> arch/arm64/boot/dts/freescale/imx8mm-emcon-avari.dtb
> arch/arm64/boot/dts/freescale/imx8mm-var-som-symphony.dtb
> arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx-0x.dtb
> arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dtb
>
> pcie@33800000: power-domains: [[78]] is too short
> arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dtb
> arch/arm64/boot/dts/freescale/imx8mq-nitrogen.dtb
>
> pcie@33800000: power-domains: [[79]] is too short
> arch/arm64/boot/dts/freescale/imx8mq-hummingboard-pulse.dtb
>
> pcie@33800000: power-domains: [[80]] is too short
> arch/arm64/boot/dts/freescale/imx8mq-evk.dtb
> arch/arm64/boot/dts/freescale/imx8mq-kontron-pitx-imx8m.dtb
>
> pcie@33800000: power-domains: [[81]] is too short
> arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dtb
> arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml-mba8mx.dtb
>
> pcie@33800000: power-domains: [[82]] is too short
> arch/arm64/boot/dts/freescale/imx8mm-beacon-kit.dtb
> arch/arm64/boot/dts/freescale/imx8mq-mnt-reform2.dtb
> arch/arm64/boot/dts/freescale/imx8mq-thor96.dtb
>
> pcie@33800000: power-domains: [[84]] is too short
> arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc.dtb
>
> pcie@33800000: power-domains: [[86]] is too short
> arch/arm/boot/dts/imx7d-nitrogen7.dtb
> arch/arm/boot/dts/imx7d-pico-nymph.dtb
>
> pcie@33800000: power-domains: [[87]] is too short
> arch/arm/boot/dts/imx7d-sdb-reva.dtb
>
> pcie@33800000: power-domains: [[88]] is too short
> arch/arm/boot/dts/imx7d-pico-dwarf.dtb
> arch/arm/boot/dts/imx7d-pico-hobbit.dtb
> arch/arm/boot/dts/imx7d-sdb.dtb
> arch/arm/boot/dts/imx7d-sdb-sht11.dtb
>
> pcie@33800000: power-domains: [[89]] is too short
> arch/arm/boot/dts/imx7d-pico-pi.dtb
> arch/arm/boot/dts/imx7d-zii-rpu2.dtb
>
> pcie@33800000: power-domains: [[92]] is too short
> arch/arm64/boot/dts/freescale/imx8mq-tqma8mq-mba8mx.dtb
>
> pcie@33800000: power-domains: [[96]] is too short
> arch/arm64/boot/dts/freescale/imx8mm-mx8menlo.dtb
> arch/arm/boot/dts/imx7d-mba7.dtb
>
> pcie@33800000: power-domains: [[97]] is too short
> arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dtb
>
> pcie@33800000: power-domains: [[98]] is too short
> arch/arm64/boot/dts/freescale/imx8mq-zii-ultra-zest.dtb
>
> pcie@33800000: reset-names:0: 'pciephy' was expected
> arch/arm64/boot/dts/freescale/imx8mm-beacon-kit.dtb
> arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc.dtb
> arch/arm64/boot/dts/freescale/imx8mm-ddr4-evk.dtb
> arch/arm64/boot/dts/freescale/imx8mm-emcon-avari.dtb
> arch/arm64/boot/dts/freescale/imx8mm-evk.dtb
> arch/arm64/boot/dts/freescale/imx8mm-icore-mx8mm-ctouch2.dtb
> arch/arm64/boot/dts/freescale/imx8mm-icore-mx8mm-edimm2.2.dtb
> arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dtb
> arch/arm64/boot/dts/freescale/imx8mm-mx8menlo.dtb
> arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dtb
> arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml-mba8mx.dtb
> arch/arm64/boot/dts/freescale/imx8mm-var-som-symphony.dtb
> arch/arm64/boot/dts/freescale/imx8mm-venice-gw71xx-0x.dtb
> arch/arm64/boot/dts/freescale/imx8mm-venice-gw72xx-0x.dtb
> arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx-0x.dtb
> arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dtb
> arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dtb
> arch/arm64/boot/dts/freescale/imx8mm-venice-gw7903.dtb
> arch/arm64/boot/dts/freescale/imx8mm-verdin-nonwifi-dahlia.dtb
> arch/arm64/boot/dts/freescale/imx8mm-verdin-nonwifi-dev.dtb
> arch/arm64/boot/dts/freescale/imx8mm-verdin-wifi-dahlia.dtb
> arch/arm64/boot/dts/freescale/imx8mm-verdin-wifi-dev.dtb
>
> pcie@33800000: reset-names:1: 'apps' was expected
> arch/arm64/boot/dts/freescale/imx8mm-beacon-kit.dtb
> arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc.dtb
> arch/arm64/boot/dts/freescale/imx8mm-ddr4-evk.dtb
> arch/arm64/boot/dts/freescale/imx8mm-emcon-avari.dtb
> arch/arm64/boot/dts/freescale/imx8mm-evk.dtb
> arch/arm64/boot/dts/freescale/imx8mm-icore-mx8mm-ctouch2.dtb
> arch/arm64/boot/dts/freescale/imx8mm-icore-mx8mm-edimm2.2.dtb
> arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dtb
> arch/arm64/boot/dts/freescale/imx8mm-mx8menlo.dtb
> arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dtb
> arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml-mba8mx.dtb
> arch/arm64/boot/dts/freescale/imx8mm-var-som-symphony.dtb
> arch/arm64/boot/dts/freescale/imx8mm-venice-gw71xx-0x.dtb
> arch/arm64/boot/dts/freescale/imx8mm-venice-gw72xx-0x.dtb
> arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx-0x.dtb
> arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dtb
> arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dtb
> arch/arm64/boot/dts/freescale/imx8mm-venice-gw7903.dtb
> arch/arm64/boot/dts/freescale/imx8mm-verdin-nonwifi-dahlia.dtb
> arch/arm64/boot/dts/freescale/imx8mm-verdin-nonwifi-dev.dtb
> arch/arm64/boot/dts/freescale/imx8mm-verdin-wifi-dahlia.dtb
> arch/arm64/boot/dts/freescale/imx8mm-verdin-wifi-dev.dtb
>
> pcie@33800000: reset-names: ['apps', 'turnoff'] is too short
> arch/arm64/boot/dts/freescale/imx8mm-beacon-kit.dtb
> arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc.dtb
> arch/arm64/boot/dts/freescale/imx8mm-ddr4-evk.dtb
> arch/arm64/boot/dts/freescale/imx8mm-emcon-avari.dtb
> arch/arm64/boot/dts/freescale/imx8mm-evk.dtb
> arch/arm64/boot/dts/freescale/imx8mm-icore-mx8mm-ctouch2.dtb
> arch/arm64/boot/dts/freescale/imx8mm-icore-mx8mm-edimm2.2.dtb
> arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dtb
> arch/arm64/boot/dts/freescale/imx8mm-mx8menlo.dtb
> arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dtb
> arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml-mba8mx.dtb
> arch/arm64/boot/dts/freescale/imx8mm-var-som-symphony.dtb
> arch/arm64/boot/dts/freescale/imx8mm-venice-gw71xx-0x.dtb
> arch/arm64/boot/dts/freescale/imx8mm-venice-gw72xx-0x.dtb
> arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx-0x.dtb
> arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dtb
> arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dtb
> arch/arm64/boot/dts/freescale/imx8mm-venice-gw7903.dtb
> arch/arm64/boot/dts/freescale/imx8mm-verdin-nonwifi-dahlia.dtb
> arch/arm64/boot/dts/freescale/imx8mm-verdin-nonwifi-dev.dtb
> arch/arm64/boot/dts/freescale/imx8mm-verdin-wifi-dahlia.dtb
> arch/arm64/boot/dts/freescale/imx8mm-verdin-wifi-dev.dtb
>
> pcie@33800000: resets: [[25, 28], [25, 29]] is too short
> arch/arm64/boot/dts/freescale/imx8mm-icore-mx8mm-ctouch2.dtb
> arch/arm64/boot/dts/freescale/imx8mm-icore-mx8mm-edimm2.2.dtb
>
> pcie@33800000: resets: [[26, 28], [26, 29]] is too short
> arch/arm64/boot/dts/freescale/imx8mm-var-som-symphony.dtb
> arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dtb
>
> pcie@33800000: resets: [[27, 28], [27, 29]] is too short
> arch/arm64/boot/dts/freescale/imx8mm-ddr4-evk.dtb
> arch/arm64/boot/dts/freescale/imx8mm-evk.dtb
> arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dtb
> arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml-mba8mx.dtb
> arch/arm64/boot/dts/freescale/imx8mm-venice-gw71xx-0x.dtb
> arch/arm64/boot/dts/freescale/imx8mm-venice-gw7903.dtb
>
> pcie@33800000: resets: [[28, 28], [28, 29]] is too short
> arch/arm64/boot/dts/freescale/imx8mm-beacon-kit.dtb
> arch/arm64/boot/dts/freescale/imx8mm-emcon-avari.dtb
> arch/arm64/boot/dts/freescale/imx8mm-venice-gw72xx-0x.dtb
> arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx-0x.dtb
> arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dtb
>
> pcie@33800000: resets: [[29, 28], [29, 29]] is too short
> arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dtb
>
> pcie@33800000: resets: [[31, 28], [31, 29]] is too short
> arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc.dtb
>
> pcie@33800000: resets: [[33, 28], [33, 29]] is too short
> arch/arm64/boot/dts/freescale/imx8mm-mx8menlo.dtb
>
> pcie@33800000: resets: [[39, 28], [39, 29]] is too short
> arch/arm64/boot/dts/freescale/imx8mm-verdin-nonwifi-dahlia.dtb
> arch/arm64/boot/dts/freescale/imx8mm-verdin-nonwifi-dev.dtb
> arch/arm64/boot/dts/freescale/imx8mm-verdin-wifi-dahlia.dtb
> arch/arm64/boot/dts/freescale/imx8mm-verdin-wifi-dev.dtb
>
> pcie@33800000: Unevaluated properties are not allowed ('clock-names',
> 'epdev_on-supply', 'hard-wired', 'power-domains' were unexpected)
> arch/arm64/boot/dts/freescale/imx8mq-tqma8mq-mba8mx.dtb
>
> pcie@33800000: Unevaluated properties are not allowed ('clock-names',
> 'power-domains', 'reset-names', 'resets' were unexpected)
> arch/arm64/boot/dts/freescale/imx8mm-beacon-kit.dtb
> arch/arm64/boot/dts/freescale/imx8mm-data-modul-edm-sbc.dtb
> arch/arm64/boot/dts/freescale/imx8mm-ddr4-evk.dtb
> arch/arm64/boot/dts/freescale/imx8mm-evk.dtb
> arch/arm64/boot/dts/freescale/imx8mm-mx8menlo.dtb
> arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml-mba8mx.dtb
> arch/arm64/boot/dts/freescale/imx8mm-venice-gw71xx-0x.dtb
> arch/arm64/boot/dts/freescale/imx8mm-venice-gw72xx-0x.dtb
> arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx-0x.dtb
> arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dtb
> arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dtb
> arch/arm64/boot/dts/freescale/imx8mm-venice-gw7903.dtb
> arch/arm64/boot/dts/freescale/imx8mm-verdin-nonwifi-dahlia.dtb
> arch/arm64/boot/dts/freescale/imx8mm-verdin-nonwifi-dev.dtb
> arch/arm64/boot/dts/freescale/imx8mm-verdin-wifi-dahlia.dtb
> arch/arm64/boot/dts/freescale/imx8mm-verdin-wifi-dev.dtb
>
> pcie@33800000: Unevaluated properties are not allowed ('clock-names',
> 'power-domains' were unexpected)
> arch/arm64/boot/dts/freescale/imx8mq-evk.dtb
> arch/arm64/boot/dts/freescale/imx8mq-kontron-pitx-imx8m.dtb
> arch/arm64/boot/dts/freescale/imx8mq-zii-ultra-rmb3.dtb
> arch/arm64/boot/dts/freescale/imx8mq-zii-ultra-zest.dtb
>
> pcie@33800000: Unevaluated properties are not allowed ('power-domains',
> 'reset-names', 'resets' were unexpected)
> arch/arm64/boot/dts/freescale/imx8mm-emcon-avari.dtb
> arch/arm64/boot/dts/freescale/imx8mm-icore-mx8mm-ctouch2.dtb
> arch/arm64/boot/dts/freescale/imx8mm-icore-mx8mm-edimm2.2.dtb
> arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dtb
> arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dtb
> arch/arm64/boot/dts/freescale/imx8mm-var-som-symphony.dtb
>
> pcie@33800000: Unevaluated properties are not allowed ('power-domains'
> was unexpected)
> arch/arm64/boot/dts/freescale/imx8mq-hummingboard-pulse.dtb
> arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dtb
> arch/arm64/boot/dts/freescale/imx8mq-librem5-r2.dtb
> arch/arm64/boot/dts/freescale/imx8mq-librem5-r3.dtb
> arch/arm64/boot/dts/freescale/imx8mq-librem5-r4.dtb
> arch/arm64/boot/dts/freescale/imx8mq-mnt-reform2.dtb
> arch/arm64/boot/dts/freescale/imx8mq-nitrogen.dtb
> arch/arm64/boot/dts/freescale/imx8mq-phanbell.dtb
> arch/arm64/boot/dts/freescale/imx8mq-pico-pi.dtb
> arch/arm64/boot/dts/freescale/imx8mq-thor96.dtb
> arch/arm/boot/dts/imx7d-cl-som-imx7.dtb
> arch/arm/boot/dts/imx7d-colibri-aster.dtb
> arch/arm/boot/dts/imx7d-colibri-emmc-aster.dtb
> arch/arm/boot/dts/imx7d-colibri-emmc-eval-v3.dtb
> arch/arm/boot/dts/imx7d-colibri-eval-v3.dtb
> arch/arm/boot/dts/imx7d-flex-concentrator.dtb
> arch/arm/boot/dts/imx7d-flex-concentrator-mfg.dtb
> arch/arm/boot/dts/imx7d-mba7.dtb
> arch/arm/boot/dts/imx7d-meerkat96.dtb
> arch/arm/boot/dts/imx7d-nitrogen7.dtb
> arch/arm/boot/dts/imx7d-pico-dwarf.dtb
> arch/arm/boot/dts/imx7d-pico-hobbit.dtb
> arch/arm/boot/dts/imx7d-pico-nymph.dtb
> arch/arm/boot/dts/imx7d-pico-pi.dtb
> arch/arm/boot/dts/imx7d-remarkable2.dtb
> arch/arm/boot/dts/imx7d-sbc-imx7.dtb
> arch/arm/boot/dts/imx7d-sdb.dtb
> arch/arm/boot/dts/imx7d-sdb-reva.dtb
> arch/arm/boot/dts/imx7d-sdb-sht11.dtb
> arch/arm/boot/dts/imx7d-smegw01.dtb
> arch/arm/boot/dts/imx7d-zii-rmu2.dtb
> arch/arm/boot/dts/imx7d-zii-rpu2.dtb
>
> pcie@33c00000: 'bus-range' is a required property
> arch/arm64/boot/dts/freescale/imx8mq-evk.dtb
> arch/arm64/boot/dts/freescale/imx8mq-kontron-pitx-imx8m.dtb
> arch/arm64/boot/dts/freescale/imx8mq-mnt-reform2.dtb
> arch/arm64/boot/dts/freescale/imx8mq-tqma8mq-mba8mx.dtb
> arch/arm64/boot/dts/freescale/imx8mq-zii-ultra-rmb3.dtb
> arch/arm64/boot/dts/freescale/imx8mq-zii-ultra-zest.dtb
>
> pcie@33c00000: clock-names:1: 'pcie_bus' was expected
> arch/arm64/boot/dts/freescale/imx8mq-evk.dtb
> arch/arm64/boot/dts/freescale/imx8mq-kontron-pitx-imx8m.dtb
> arch/arm64/boot/dts/freescale/imx8mq-mnt-reform2.dtb
> arch/arm64/boot/dts/freescale/imx8mq-tqma8mq-mba8mx.dtb
> arch/arm64/boot/dts/freescale/imx8mq-zii-ultra-rmb3.dtb
> arch/arm64/boot/dts/freescale/imx8mq-zii-ultra-zest.dtb
>
> pcie@33c00000: clock-names:3: 'pcie_inbound_axi for imx6sx-pcie, pcie_aux
> for imx8mq-pcie' was expected
> arch/arm64/boot/dts/freescale/imx8mq-evk.dtb
> arch/arm64/boot/dts/freescale/imx8mq-kontron-pitx-imx8m.dtb
> arch/arm64/boot/dts/freescale/imx8mq-mnt-reform2.dtb
> arch/arm64/boot/dts/freescale/imx8mq-tqma8mq-mba8mx.dtb
> arch/arm64/boot/dts/freescale/imx8mq-zii-ultra-rmb3.dtb
> arch/arm64/boot/dts/freescale/imx8mq-zii-ultra-zest.dtb
>
> pcie@33c00000: power-domains: [[102]] is too short
> arch/arm64/boot/dts/freescale/imx8mq-zii-ultra-rmb3.dtb
>
> pcie@33c00000: power-domains: [[124]] is too short
> arch/arm64/boot/dts/freescale/imx8mq-librem5-r2.dtb
>
> pcie@33c00000: power-domains: [[125]] is too short
> arch/arm64/boot/dts/freescale/imx8mq-librem5-r3.dtb
> arch/arm64/boot/dts/freescale/imx8mq-librem5-r4.dtb
>
> pcie@33c00000: power-domains: [[70]] is too short
> arch/arm64/boot/dts/freescale/imx8mq-phanbell.dtb
> arch/arm64/boot/dts/freescale/imx8mq-pico-pi.dtb
>
> pcie@33c00000: power-domains: [[78]] is too short
> arch/arm64/boot/dts/freescale/imx8mq-nitrogen.dtb
>
> pcie@33c00000: power-domains: [[79]] is too short
> arch/arm64/boot/dts/freescale/imx8mq-hummingboard-pulse.dtb
>
> pcie@33c00000: power-domains: [[80]] is too short
> arch/arm64/boot/dts/freescale/imx8mq-evk.dtb
> arch/arm64/boot/dts/freescale/imx8mq-kontron-pitx-imx8m.dtb
>
> pcie@33c00000: power-domains: [[82]] is too short
> arch/arm64/boot/dts/freescale/imx8mq-mnt-reform2.dtb
> arch/arm64/boot/dts/freescale/imx8mq-thor96.dtb
>
> pcie@33c00000: power-domains: [[92]] is too short
> arch/arm64/boot/dts/freescale/imx8mq-tqma8mq-mba8mx.dtb
>
> pcie@33c00000: power-domains: [[97]] is too short
> arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dtb
>
> pcie@33c00000: power-domains: [[98]] is too short
> arch/arm64/boot/dts/freescale/imx8mq-zii-ultra-zest.dtb
>
> pcie@33c00000: Unevaluated properties are not allowed ('clock-names',
> 'epdev_on-supply', 'hard-wired', 'power-domains' were unexpected)
> arch/arm64/boot/dts/freescale/imx8mq-tqma8mq-mba8mx.dtb
>
> pcie@33c00000: Unevaluated properties are not allowed ('clock-names',
> 'power-domains' were unexpected)
> arch/arm64/boot/dts/freescale/imx8mq-evk.dtb
> arch/arm64/boot/dts/freescale/imx8mq-kontron-pitx-imx8m.dtb
> arch/arm64/boot/dts/freescale/imx8mq-mnt-reform2.dtb
> arch/arm64/boot/dts/freescale/imx8mq-zii-ultra-rmb3.dtb
> arch/arm64/boot/dts/freescale/imx8mq-zii-ultra-zest.dtb
>
> pcie@33c00000: Unevaluated properties are not allowed ('power-domains'
> was unexpected)
> arch/arm64/boot/dts/freescale/imx8mq-hummingboard-pulse.dtb
> arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dtb
> arch/arm64/boot/dts/freescale/imx8mq-librem5-r2.dtb
> arch/arm64/boot/dts/freescale/imx8mq-librem5-r3.dtb
> arch/arm64/boot/dts/freescale/imx8mq-librem5-r4.dtb
> arch/arm64/boot/dts/freescale/imx8mq-nitrogen.dtb
> arch/arm64/boot/dts/freescale/imx8mq-phanbell.dtb
> arch/arm64/boot/dts/freescale/imx8mq-pico-pi.dtb
> arch/arm64/boot/dts/freescale/imx8mq-thor96.dtb
>
> pcie@8ffc000: clock-names:3: 'pcie_inbound_axi for imx6sx-pcie, pcie_aux for
> imx8mq-pcie' was expected
> arch/arm/boot/dts/imx6sx-nitrogen6sx.dtb
> arch/arm/boot/dts/imx6sx-sabreauto.dtb
> arch/arm/boot/dts/imx6sx-sdb.dtb
> arch/arm/boot/dts/imx6sx-sdb-mqs.dtb
> arch/arm/boot/dts/imx6sx-sdb-reva.dtb
> arch/arm/boot/dts/imx6sx-sdb-sai.dtb
> arch/arm/boot/dts/imx6sx-softing-vining-2000.dtb
> arch/arm/boot/dts/imx6sx-udoo-neo-basic.dtb
> arch/arm/boot/dts/imx6sx-udoo-neo-extended.dtb
> arch/arm/boot/dts/imx6sx-udoo-neo-full.dtb
>
> pcie@8ffc000: Unevaluated properties are not allowed ('clock-names' was
> unexpected)
> arch/arm/boot/dts/imx6sx-nitrogen6sx.dtb
> arch/arm/boot/dts/imx6sx-sabreauto.dtb
> arch/arm/boot/dts/imx6sx-sdb.dtb
> arch/arm/boot/dts/imx6sx-sdb-mqs.dtb
> arch/arm/boot/dts/imx6sx-sdb-reva.dtb
> arch/arm/boot/dts/imx6sx-sdb-sai.dtb
> arch/arm/boot/dts/imx6sx-softing-vining-2000.dtb
> arch/arm/boot/dts/imx6sx-udoo-neo-basic.dtb
> arch/arm/boot/dts/imx6sx-udoo-neo-extended.dtb
> arch/arm/boot/dts/imx6sx-udoo-neo-full.dtb
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH v1 01/10] dt-bindings: imx6q-pcie: Add iMX8MM PCIe EP mode compatible string
2022-07-19 9:45 ` [PATCH v1 01/10] dt-bindings: imx6q-pcie: Add iMX8MM PCIe EP mode compatible string Richard Zhu
2022-07-19 14:11 ` Rob Herring
@ 2022-07-22 0:28 ` Rob Herring
1 sibling, 0 replies; 17+ messages in thread
From: Rob Herring @ 2022-07-22 0:28 UTC (permalink / raw)
To: Richard Zhu
Cc: kishon, devicetree, linux-pci, kernel, lorenzo.pieralisi,
linux-imx, shawnguo, linux-arm-kernel, l.stach, kw, frank.li,
linux-kernel, bhelgaas, robh+dt
On Tue, 19 Jul 2022 17:45:30 +0800, Richard Zhu wrote:
> Add i.MX8MM PCIe endpoint mode compatible string.
>
> Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
> ---
> Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml | 1 +
> 1 file changed, 1 insertion(+)
>
Acked-by: Rob Herring <robh@kernel.org>
^ permalink raw reply [flat|nested] 17+ messages in thread
* [PATCH v1 02/10] dt-bindings: imx6q-pcie: Add iMX8MQ PCIe EP mode compatible string
2022-07-19 9:45 [PATCH v1 0/10] Add iMX PCIe EP mode support Richard Zhu
2022-07-19 9:45 ` [PATCH v1 01/10] dt-bindings: imx6q-pcie: Add iMX8MM PCIe EP mode compatible string Richard Zhu
@ 2022-07-19 9:45 ` Richard Zhu
2022-07-22 0:28 ` Rob Herring
2022-07-19 9:45 ` [PATCH v1 03/10] PCI: dwc: Kconfig: Add iMX PCIe EP mode support Richard Zhu
` (7 subsequent siblings)
9 siblings, 1 reply; 17+ messages in thread
From: Richard Zhu @ 2022-07-19 9:45 UTC (permalink / raw)
To: l.stach, bhelgaas, robh+dt, lorenzo.pieralisi, shawnguo, kishon,
kw, frank.li
Cc: hongxing.zhu, linux-pci, devicetree, linux-arm-kernel,
linux-kernel, kernel, linux-imx
Add i.MX8MQ PCIe endpoint mode compatible string.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
---
Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
index d52c6396fe11..85b7c1663054 100644
--- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
@@ -28,6 +28,7 @@ properties:
- fsl,imx8mm-pcie
- fsl,imx8mp-pcie
- fsl,imx8mm-pcie-ep
+ - fsl,imx8mq-pcie-ep
reg:
items:
--
2.25.1
^ permalink raw reply related [flat|nested] 17+ messages in thread* Re: [PATCH v1 02/10] dt-bindings: imx6q-pcie: Add iMX8MQ PCIe EP mode compatible string
2022-07-19 9:45 ` [PATCH v1 02/10] dt-bindings: imx6q-pcie: Add iMX8MQ " Richard Zhu
@ 2022-07-22 0:28 ` Rob Herring
0 siblings, 0 replies; 17+ messages in thread
From: Rob Herring @ 2022-07-22 0:28 UTC (permalink / raw)
To: Richard Zhu
Cc: lorenzo.pieralisi, shawnguo, kw, l.stach, linux-arm-kernel,
devicetree, kishon, kernel, robh+dt, linux-pci, linux-imx,
bhelgaas, frank.li, linux-kernel
On Tue, 19 Jul 2022 17:45:31 +0800, Richard Zhu wrote:
> Add i.MX8MQ PCIe endpoint mode compatible string.
>
> Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
> ---
> Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml | 1 +
> 1 file changed, 1 insertion(+)
>
Acked-by: Rob Herring <robh@kernel.org>
^ permalink raw reply [flat|nested] 17+ messages in thread
* [PATCH v1 03/10] PCI: dwc: Kconfig: Add iMX PCIe EP mode support
2022-07-19 9:45 [PATCH v1 0/10] Add iMX PCIe EP mode support Richard Zhu
2022-07-19 9:45 ` [PATCH v1 01/10] dt-bindings: imx6q-pcie: Add iMX8MM PCIe EP mode compatible string Richard Zhu
2022-07-19 9:45 ` [PATCH v1 02/10] dt-bindings: imx6q-pcie: Add iMX8MQ " Richard Zhu
@ 2022-07-19 9:45 ` Richard Zhu
2022-07-19 9:45 ` [PATCH v1 04/10] arm64: dts: Add iMX8MM PCIe EP support Richard Zhu
` (6 subsequent siblings)
9 siblings, 0 replies; 17+ messages in thread
From: Richard Zhu @ 2022-07-19 9:45 UTC (permalink / raw)
To: l.stach, bhelgaas, robh+dt, lorenzo.pieralisi, shawnguo, kishon,
kw, frank.li
Cc: hongxing.zhu, linux-pci, devicetree, linux-arm-kernel,
linux-kernel, kernel, linux-imx
Since i.MX PCIe is one dual mode PCIe controller.
Add i.MX PCIe EP mode support, and split the PCIe modes to the Root
Complex mode and Endpoint mode.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
---
drivers/pci/controller/dwc/Kconfig | 25 ++++++++++++++++++++++++-
1 file changed, 24 insertions(+), 1 deletion(-)
diff --git a/drivers/pci/controller/dwc/Kconfig b/drivers/pci/controller/dwc/Kconfig
index 62ce3abf0f19..a24d8cacf1be 100644
--- a/drivers/pci/controller/dwc/Kconfig
+++ b/drivers/pci/controller/dwc/Kconfig
@@ -92,10 +92,33 @@ config PCI_EXYNOS
functions to implement the driver.
config PCI_IMX6
- bool "Freescale i.MX6/7/8 PCIe controller"
+ bool
+
+config PCI_IMX6_HOST
+ bool "Freescale i.MX6/7/8 PCIe controller host mode"
depends on ARCH_MXC || COMPILE_TEST
depends on PCI_MSI_IRQ_DOMAIN
select PCIE_DW_HOST
+ select PCI_IMX6
+ help
+ Enables support for the PCIe controller Root Complex mode in the
+ iMX6/7/8 SoCs.
+ This controller can work either as EP or RC. In order to enable
+ host-specific features PCIE_DW_HOST must be selected and in order
+ to enable device-specific features PCIE_DW_EP must be selected.
+
+config PCI_IMX6_EP
+ bool "Freescale i.MX6/7/8 PCIe controller endpoint mode"
+ depends on ARCH_MXC || COMPILE_TEST
+ depends on PCI_ENDPOINT
+ select PCIE_DW_EP
+ select PCI_IMX6
+ help
+ Enables support for the PCIe controller endpoint mode in the
+ iMX6/7/8 SoCs.
+ This controller can work either as EP or RC. In order to enable
+ host-specific features PCIE_DW_HOST must be selected and in order
+ to enable device-specific features PCIE_DW_EP must be selected.
config PCIE_SPEAR13XX
bool "STMicroelectronics SPEAr PCIe controller"
--
2.25.1
^ permalink raw reply related [flat|nested] 17+ messages in thread* [PATCH v1 04/10] arm64: dts: Add iMX8MM PCIe EP support
2022-07-19 9:45 [PATCH v1 0/10] Add iMX PCIe EP mode support Richard Zhu
` (2 preceding siblings ...)
2022-07-19 9:45 ` [PATCH v1 03/10] PCI: dwc: Kconfig: Add iMX PCIe EP mode support Richard Zhu
@ 2022-07-19 9:45 ` Richard Zhu
2022-07-19 9:45 ` [PATCH v1 05/10] arm64: dts: Add iMX8MQ " Richard Zhu
` (5 subsequent siblings)
9 siblings, 0 replies; 17+ messages in thread
From: Richard Zhu @ 2022-07-19 9:45 UTC (permalink / raw)
To: l.stach, bhelgaas, robh+dt, lorenzo.pieralisi, shawnguo, kishon,
kw, frank.li
Cc: hongxing.zhu, linux-pci, devicetree, linux-arm-kernel,
linux-kernel, kernel, linux-imx
Add iMX8MM PCIe EP support.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
---
arch/arm64/boot/dts/freescale/imx8mm.dtsi | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
index afb90f59c83c..eca7a42ac52a 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
@@ -1291,6 +1291,26 @@ pcie0: pcie@33800000 {
status = "disabled";
};
+ pcie0_ep: pcie_ep@33800000 {
+ compatible = "fsl,imx8mm-pcie-ep";
+ reg = <0x33800000 0x400000>,
+ <0x18000000 0x8000000>;
+ reg-names = "regs", "addr_space";
+ num-lanes = <1>;
+ interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "dma";
+ fsl,max-link-speed = <2>;
+ power-domains = <&pgc_pcie>;
+ resets = <&src IMX8MQ_RESET_PCIE_CTRL_APPS_EN>,
+ <&src IMX8MQ_RESET_PCIE_CTRL_APPS_TURNOFF>;
+ reset-names = "apps", "turnoff";
+ phys = <&pcie_phy>;
+ phy-names = "pcie-phy";
+ num-ib-windows = <4>;
+ num-ob-windows = <4>;
+ status = "disabled";
+ };
+
gpu_3d: gpu@38000000 {
compatible = "vivante,gc";
reg = <0x38000000 0x8000>;
--
2.25.1
^ permalink raw reply related [flat|nested] 17+ messages in thread* [PATCH v1 05/10] arm64: dts: Add iMX8MQ PCIe EP support
2022-07-19 9:45 [PATCH v1 0/10] Add iMX PCIe EP mode support Richard Zhu
` (3 preceding siblings ...)
2022-07-19 9:45 ` [PATCH v1 04/10] arm64: dts: Add iMX8MM PCIe EP support Richard Zhu
@ 2022-07-19 9:45 ` Richard Zhu
2022-07-19 9:45 ` [PATCH v1 06/10] arm64: dts: Add iMX8MM PCIe EP support on EVK board Richard Zhu
` (4 subsequent siblings)
9 siblings, 0 replies; 17+ messages in thread
From: Richard Zhu @ 2022-07-19 9:45 UTC (permalink / raw)
To: l.stach, bhelgaas, robh+dt, lorenzo.pieralisi, shawnguo, kishon,
kw, frank.li
Cc: hongxing.zhu, linux-pci, devicetree, linux-arm-kernel,
linux-kernel, kernel, linux-imx
Add iMX8MQ PCIe EP support.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
---
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 27 +++++++++++++++++++++++
1 file changed, 27 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index e9f0cdd10ab6..1c94e798e02f 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -1581,6 +1581,33 @@ pcie1: pcie@33c00000 {
status = "disabled";
};
+ pcie1_ep: pcie_ep@33c00000 {
+ compatible = "fsl,imx8mq-pcie-ep";
+ reg = <0x33c00000 0x000400000>,
+ <0x20000000 0x08000000>;
+ reg-names = "regs", "addr_space";
+ num-lanes = <1>;
+ interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "dma";
+ fsl,max-link-speed = <2>;
+ power-domains = <&pgc_pcie>;
+ resets = <&src IMX8MQ_RESET_PCIEPHY2>,
+ <&src IMX8MQ_RESET_PCIE2_CTRL_APPS_EN>,
+ <&src IMX8MQ_RESET_PCIE2_CTRL_APPS_TURNOFF>;
+ reset-names = "pciephy", "apps", "turnoff";
+ assigned-clocks = <&clk IMX8MQ_CLK_PCIE2_CTRL>,
+ <&clk IMX8MQ_CLK_PCIE2_PHY>,
+ <&clk IMX8MQ_CLK_PCIE2_AUX>;
+ assigned-clock-parents = <&clk IMX8MQ_SYS2_PLL_250M>,
+ <&clk IMX8MQ_SYS2_PLL_100M>,
+ <&clk IMX8MQ_SYS1_PLL_80M>;
+ assigned-clock-rates = <250000000>, <100000000>,
+ <10000000>;
+ num-ib-windows = <4>;
+ num-ob-windows = <4>;
+ status = "disabled";
+ };
+
gic: interrupt-controller@38800000 {
compatible = "arm,gic-v3";
reg = <0x38800000 0x10000>, /* GIC Dist */
--
2.25.1
^ permalink raw reply related [flat|nested] 17+ messages in thread* [PATCH v1 06/10] arm64: dts: Add iMX8MM PCIe EP support on EVK board
2022-07-19 9:45 [PATCH v1 0/10] Add iMX PCIe EP mode support Richard Zhu
` (4 preceding siblings ...)
2022-07-19 9:45 ` [PATCH v1 05/10] arm64: dts: Add iMX8MQ " Richard Zhu
@ 2022-07-19 9:45 ` Richard Zhu
2022-07-19 9:45 ` [PATCH v1 07/10] arm64: dts: Add iMX8MQ " Richard Zhu
` (3 subsequent siblings)
9 siblings, 0 replies; 17+ messages in thread
From: Richard Zhu @ 2022-07-19 9:45 UTC (permalink / raw)
To: l.stach, bhelgaas, robh+dt, lorenzo.pieralisi, shawnguo, kishon,
kw, frank.li
Cc: hongxing.zhu, linux-pci, devicetree, linux-arm-kernel,
linux-kernel, kernel, linux-imx
Add iMX8MM PCIe EP support on EVK board.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
---
arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi
index 7d6317d95b13..240699f4773d 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi
@@ -370,6 +370,20 @@ &pcie0 {
status = "okay";
};
+&pcie0_ep{
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pcie0>;
+ clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&clk IMX8MM_CLK_PCIE1_AUX>,
+ <&pcie0_refclk>;
+ clock-names = "pcie", "pcie_aux", "pcie_bus";
+ assigned-clocks = <&clk IMX8MM_CLK_PCIE1_AUX>,
+ <&clk IMX8MM_CLK_PCIE1_CTRL>;
+ assigned-clock-rates = <10000000>, <250000000>;
+ assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>,
+ <&clk IMX8MM_SYS_PLL2_250M>;
+ status = "disabled";
+};
+
&sai2 {
#sound-dai-cells = <0>;
pinctrl-names = "default";
--
2.25.1
^ permalink raw reply related [flat|nested] 17+ messages in thread* [PATCH v1 07/10] arm64: dts: Add iMX8MQ PCIe EP support on EVK board
2022-07-19 9:45 [PATCH v1 0/10] Add iMX PCIe EP mode support Richard Zhu
` (5 preceding siblings ...)
2022-07-19 9:45 ` [PATCH v1 06/10] arm64: dts: Add iMX8MM PCIe EP support on EVK board Richard Zhu
@ 2022-07-19 9:45 ` Richard Zhu
2022-07-19 9:45 ` [PATCH v1 08/10] misc: pci_endpoint_test: Add iMX8 PCIe EP device support Richard Zhu
` (2 subsequent siblings)
9 siblings, 0 replies; 17+ messages in thread
From: Richard Zhu @ 2022-07-19 9:45 UTC (permalink / raw)
To: l.stach, bhelgaas, robh+dt, lorenzo.pieralisi, shawnguo, kishon,
kw, frank.li
Cc: hongxing.zhu, linux-pci, devicetree, linux-arm-kernel,
linux-kernel, kernel, linux-imx
Add iMX8MQ PCIe EP support on EVK board.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
---
arch/arm64/boot/dts/freescale/imx8mq-evk.dts | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
index 82387b9cb800..9f3bad9b49a6 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
@@ -377,6 +377,18 @@ &pcie1 {
status = "okay";
};
+&pcie1_ep {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pcie1>;
+ clocks = <&clk IMX8MQ_CLK_PCIE2_ROOT>,
+ <&clk IMX8MQ_CLK_PCIE2_AUX>,
+ <&clk IMX8MQ_CLK_PCIE2_PHY>,
+ <&pcie0_refclk>;
+ clock-names = "pcie", "pcie_aux", "pcie_phy", "pcie_bus";
+ vph-supply = <&vgen5_reg>;
+ status = "disabled";
+};
+
&pgc_gpu {
power-supply = <&sw1a_reg>;
};
--
2.25.1
^ permalink raw reply related [flat|nested] 17+ messages in thread* [PATCH v1 08/10] misc: pci_endpoint_test: Add iMX8 PCIe EP device support
2022-07-19 9:45 [PATCH v1 0/10] Add iMX PCIe EP mode support Richard Zhu
` (6 preceding siblings ...)
2022-07-19 9:45 ` [PATCH v1 07/10] arm64: dts: Add iMX8MQ " Richard Zhu
@ 2022-07-19 9:45 ` Richard Zhu
2022-07-19 9:45 ` [PATCH v1 09/10] PCI: imx6: Add iMX8MM PCIe EP mode Richard Zhu
2022-07-19 9:45 ` [PATCH v1 10/10] PCI: imx6: Add iMX8MQ PCIe EP support Richard Zhu
9 siblings, 0 replies; 17+ messages in thread
From: Richard Zhu @ 2022-07-19 9:45 UTC (permalink / raw)
To: l.stach, bhelgaas, robh+dt, lorenzo.pieralisi, shawnguo, kishon,
kw, frank.li
Cc: hongxing.zhu, linux-pci, devicetree, linux-arm-kernel,
linux-kernel, kernel, linux-imx
Set the DEVICE_ID of i.MX8 PCIe and add iMX8 PCIE EP device support in
pci_endpoint_test driver.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
---
drivers/misc/pci_endpoint_test.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/misc/pci_endpoint_test.c b/drivers/misc/pci_endpoint_test.c
index 8f786a225dcf..18cea40c697b 100644
--- a/drivers/misc/pci_endpoint_test.c
+++ b/drivers/misc/pci_endpoint_test.c
@@ -72,6 +72,7 @@
#define PCI_DEVICE_ID_TI_J7200 0xb00f
#define PCI_DEVICE_ID_TI_AM64 0xb010
#define PCI_DEVICE_ID_LS1088A 0x80c0
+#define PCI_DEVICE_ID_IMX8 0x0808
#define is_am654_pci_dev(pdev) \
((pdev)->device == PCI_DEVICE_ID_TI_AM654)
@@ -958,6 +959,7 @@ static const struct pci_device_id pci_endpoint_test_tbl[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_FREESCALE, 0x81c0),
.driver_data = (kernel_ulong_t)&default_data,
},
+ { PCI_DEVICE(PCI_VENDOR_ID_FREESCALE, PCI_DEVICE_ID_IMX8),},
{ PCI_DEVICE(PCI_VENDOR_ID_FREESCALE, PCI_DEVICE_ID_LS1088A),
.driver_data = (kernel_ulong_t)&default_data,
},
--
2.25.1
^ permalink raw reply related [flat|nested] 17+ messages in thread* [PATCH v1 09/10] PCI: imx6: Add iMX8MM PCIe EP mode
2022-07-19 9:45 [PATCH v1 0/10] Add iMX PCIe EP mode support Richard Zhu
` (7 preceding siblings ...)
2022-07-19 9:45 ` [PATCH v1 08/10] misc: pci_endpoint_test: Add iMX8 PCIe EP device support Richard Zhu
@ 2022-07-19 9:45 ` Richard Zhu
2022-07-24 8:01 ` kernel test robot
2022-07-19 9:45 ` [PATCH v1 10/10] PCI: imx6: Add iMX8MQ PCIe EP support Richard Zhu
9 siblings, 1 reply; 17+ messages in thread
From: Richard Zhu @ 2022-07-19 9:45 UTC (permalink / raw)
To: l.stach, bhelgaas, robh+dt, lorenzo.pieralisi, shawnguo, kishon,
kw, frank.li
Cc: hongxing.zhu, linux-pci, devicetree, linux-arm-kernel,
linux-kernel, kernel, linux-imx
Based on i.MX8MM platforms, add the i.MX8MM PCIe EP mode support.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
---
drivers/pci/controller/dwc/pci-imx6.c | 148 +++++++++++++++++++++++---
1 file changed, 134 insertions(+), 14 deletions(-)
diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
index 655240ce60e0..ba4ac258c13d 100644
--- a/drivers/pci/controller/dwc/pci-imx6.c
+++ b/drivers/pci/controller/dwc/pci-imx6.c
@@ -51,6 +51,7 @@ enum imx6_pcie_variants {
IMX7D,
IMX8MQ,
IMX8MM,
+ IMX8MM_EP,
};
#define IMX6_PCIE_FLAG_IMX6_PHY BIT(0)
@@ -59,6 +60,7 @@ enum imx6_pcie_variants {
struct imx6_pcie_drvdata {
enum imx6_pcie_variants variant;
+ enum dw_pcie_device_mode mode;
u32 flags;
int dbi_length;
};
@@ -150,23 +152,27 @@ struct imx6_pcie {
static unsigned int imx6_pcie_grp_offset(const struct imx6_pcie *imx6_pcie)
{
WARN_ON(imx6_pcie->drvdata->variant != IMX8MQ &&
- imx6_pcie->drvdata->variant != IMX8MM);
+ imx6_pcie->drvdata->variant != IMX8MM &&
+ imx6_pcie->drvdata->variant != IMX8MM_EP);
return imx6_pcie->controller_id == 1 ? IOMUXC_GPR16 : IOMUXC_GPR14;
}
static void imx6_pcie_configure_type(struct imx6_pcie *imx6_pcie)
{
- unsigned int mask, val;
+ unsigned int mask, val, mode;
+
+ if (imx6_pcie->drvdata->mode == DW_PCIE_EP_TYPE)
+ mode = PCI_EXP_TYPE_ENDPOINT;
+ else
+ mode = PCI_EXP_TYPE_ROOT_PORT;
if (imx6_pcie->drvdata->variant == IMX8MQ &&
imx6_pcie->controller_id == 1) {
mask = IMX8MQ_GPR12_PCIE2_CTRL_DEVICE_TYPE;
- val = FIELD_PREP(IMX8MQ_GPR12_PCIE2_CTRL_DEVICE_TYPE,
- PCI_EXP_TYPE_ROOT_PORT);
+ val = FIELD_PREP(IMX8MQ_GPR12_PCIE2_CTRL_DEVICE_TYPE, mode);
} else {
mask = IMX6Q_GPR12_DEVICE_TYPE;
- val = FIELD_PREP(IMX6Q_GPR12_DEVICE_TYPE,
- PCI_EXP_TYPE_ROOT_PORT);
+ val = FIELD_PREP(IMX6Q_GPR12_DEVICE_TYPE, mode);
}
regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, mask, val);
@@ -301,6 +307,7 @@ static void imx6_pcie_init_phy(struct imx6_pcie *imx6_pcie)
{
switch (imx6_pcie->drvdata->variant) {
case IMX8MM:
+ case IMX8MM_EP:
/*
* The PHY initialization had been done in the PHY
* driver, break here directly.
@@ -557,6 +564,7 @@ static int imx6_pcie_enable_ref_clk(struct imx6_pcie *imx6_pcie)
case IMX7D:
break;
case IMX8MM:
+ case IMX8MM_EP:
case IMX8MQ:
ret = clk_prepare_enable(imx6_pcie->pcie_aux);
if (ret) {
@@ -601,6 +609,7 @@ static void imx6_pcie_disable_ref_clk(struct imx6_pcie *imx6_pcie)
IMX7D_GPR12_PCIE_PHY_REFCLK_SEL);
break;
case IMX8MM:
+ case IMX8MM_EP:
case IMX8MQ:
clk_disable_unprepare(imx6_pcie->pcie_aux);
break;
@@ -669,6 +678,7 @@ static void imx6_pcie_assert_core_reset(struct imx6_pcie *imx6_pcie)
reset_control_assert(imx6_pcie->pciephy_reset);
fallthrough;
case IMX8MM:
+ case IMX8MM_EP:
reset_control_assert(imx6_pcie->apps_reset);
break;
case IMX6SX:
@@ -744,6 +754,7 @@ static int imx6_pcie_deassert_core_reset(struct imx6_pcie *imx6_pcie)
break;
case IMX6Q: /* Nothing to do */
case IMX8MM:
+ case IMX8MM_EP:
break;
}
@@ -793,6 +804,7 @@ static void imx6_pcie_ltssm_enable(struct device *dev)
case IMX7D:
case IMX8MQ:
case IMX8MM:
+ case IMX8MM_EP:
reset_control_deassert(imx6_pcie->apps_reset);
break;
}
@@ -812,6 +824,7 @@ static void imx6_pcie_ltssm_disable(struct device *dev)
case IMX7D:
case IMX8MQ:
case IMX8MM:
+ case IMX8MM_EP:
reset_control_assert(imx6_pcie->apps_reset);
break;
}
@@ -992,8 +1005,102 @@ static const struct dw_pcie_host_ops imx6_pcie_host_ops = {
static const struct dw_pcie_ops dw_pcie_ops = {
.start_link = imx6_pcie_start_link,
+ .stop_link = imx6_pcie_stop_link,
};
+static void imx6_pcie_ep_init(struct dw_pcie_ep *ep)
+{
+ enum pci_barno bar;
+ struct dw_pcie *pci = to_dw_pcie_from_ep(ep);
+
+ for (bar = BAR_0; bar <= BAR_5; bar++)
+ dw_pcie_ep_reset_bar(pci, bar);
+}
+
+static int imx6_pcie_ep_raise_irq(struct dw_pcie_ep *ep, u8 func_no,
+ enum pci_epc_irq_type type,
+ u16 interrupt_num)
+{
+ struct dw_pcie *pci = to_dw_pcie_from_ep(ep);
+
+ switch (type) {
+ case PCI_EPC_IRQ_LEGACY:
+ return dw_pcie_ep_raise_legacy_irq(ep, func_no);
+ case PCI_EPC_IRQ_MSI:
+ return dw_pcie_ep_raise_msi_irq(ep, func_no, interrupt_num);
+ case PCI_EPC_IRQ_MSIX:
+ return dw_pcie_ep_raise_msix_irq(ep, func_no, interrupt_num);
+ default:
+ dev_err(pci->dev, "UNKNOWN IRQ type\n");
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static const struct pci_epc_features imx8m_pcie_epc_features = {
+ .linkup_notifier = false,
+ .msi_capable = true,
+ .msix_capable = false,
+ .reserved_bar = 1 << BAR_1 | 1 << BAR_3,
+ .align = SZ_64K,
+};
+
+static const struct pci_epc_features*
+imx6_pcie_ep_get_features(struct dw_pcie_ep *ep)
+{
+ return &imx8m_pcie_epc_features;
+}
+
+static const struct dw_pcie_ep_ops pcie_ep_ops = {
+ .ep_init = imx6_pcie_ep_init,
+ .raise_irq = imx6_pcie_ep_raise_irq,
+ .get_features = imx6_pcie_ep_get_features,
+};
+
+static int imx6_add_pcie_ep(struct imx6_pcie *imx6_pcie,
+ struct platform_device *pdev)
+{
+ int ret;
+ unsigned int pcie_dbi2_offset;
+ struct dw_pcie_ep *ep;
+ struct resource *res;
+ struct dw_pcie *pci = imx6_pcie->pci;
+ struct pcie_port *pp = &pci->pp;
+ struct device *dev = pci->dev;
+
+ imx6_pcie_host_init(pp);
+ ep = &pci->ep;
+ ep->ops = &pcie_ep_ops;
+
+ switch (imx6_pcie->drvdata->variant) {
+ case IMX8MM_EP:
+ pcie_dbi2_offset = SZ_1M;
+ break;
+ default:
+ pcie_dbi2_offset = SZ_4K;
+ break;
+ }
+ pci->dbi_base2 = pci->dbi_base + pcie_dbi2_offset;
+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "addr_space");
+ if (!res)
+ return -EINVAL;
+
+ ep->phys_base = res->start;
+ ep->addr_size = resource_size(res);
+ ep->page_size = SZ_64K;
+
+ ret = dw_pcie_ep_init(ep);
+ if (ret) {
+ dev_err(dev, "failed to initialize endpoint\n");
+ return ret;
+ }
+ /* Start LTSSM. */
+ imx6_pcie_ltssm_enable(dev);
+
+ return 0;
+}
+
#ifdef CONFIG_PM_SLEEP
static void imx6_pcie_pm_turnoff(struct imx6_pcie *imx6_pcie)
{
@@ -1181,6 +1288,7 @@ static int imx6_pcie_probe(struct platform_device *pdev)
}
break;
case IMX8MM:
+ case IMX8MM_EP:
imx6_pcie->pcie_aux = devm_clk_get(dev, "pcie_aux");
if (IS_ERR(imx6_pcie->pcie_aux))
return dev_err_probe(dev, PTR_ERR(imx6_pcie->pcie_aux),
@@ -1269,15 +1377,22 @@ static int imx6_pcie_probe(struct platform_device *pdev)
if (ret)
return ret;
- ret = dw_pcie_host_init(&pci->pp);
- if (ret < 0)
- return ret;
+ if (imx6_pcie->drvdata->mode == DW_PCIE_EP_TYPE) {
+ ret = imx6_add_pcie_ep(imx6_pcie, pdev);
+ if (ret < 0)
+ return ret;
+ } else {
+ ret = dw_pcie_host_init(&pci->pp);
+ if (ret < 0)
+ return ret;
- if (pci_msi_enabled()) {
- u8 offset = dw_pcie_find_capability(pci, PCI_CAP_ID_MSI);
- val = dw_pcie_readw_dbi(pci, offset + PCI_MSI_FLAGS);
- val |= PCI_MSI_FLAGS_ENABLE;
- dw_pcie_writew_dbi(pci, offset + PCI_MSI_FLAGS, val);
+ if (pci_msi_enabled()) {
+ u8 offset = dw_pcie_find_capability(pci, PCI_CAP_ID_MSI);
+
+ val = dw_pcie_readw_dbi(pci, offset + PCI_MSI_FLAGS);
+ val |= PCI_MSI_FLAGS_ENABLE;
+ dw_pcie_writew_dbi(pci, offset + PCI_MSI_FLAGS, val);
+ }
}
return 0;
@@ -1322,6 +1437,10 @@ static const struct imx6_pcie_drvdata drvdata[] = {
.variant = IMX8MM,
.flags = IMX6_PCIE_FLAG_SUPPORTS_SUSPEND,
},
+ [IMX8MM_EP] = {
+ .variant = IMX8MM_EP,
+ .mode = DW_PCIE_EP_TYPE,
+ },
};
static const struct of_device_id imx6_pcie_of_match[] = {
@@ -1331,6 +1450,7 @@ static const struct of_device_id imx6_pcie_of_match[] = {
{ .compatible = "fsl,imx7d-pcie", .data = &drvdata[IMX7D], },
{ .compatible = "fsl,imx8mq-pcie", .data = &drvdata[IMX8MQ], },
{ .compatible = "fsl,imx8mm-pcie", .data = &drvdata[IMX8MM], },
+ { .compatible = "fsl,imx8mm-pcie-ep", .data = &drvdata[IMX8MM_EP], },
{},
};
--
2.25.1
^ permalink raw reply related [flat|nested] 17+ messages in thread* Re: [PATCH v1 09/10] PCI: imx6: Add iMX8MM PCIe EP mode
2022-07-19 9:45 ` [PATCH v1 09/10] PCI: imx6: Add iMX8MM PCIe EP mode Richard Zhu
@ 2022-07-24 8:01 ` kernel test robot
0 siblings, 0 replies; 17+ messages in thread
From: kernel test robot @ 2022-07-24 8:01 UTC (permalink / raw)
To: Richard Zhu, l.stach, bhelgaas, robh+dt, lorenzo.pieralisi,
shawnguo, kishon, kw, frank.li
Cc: kbuild-all, hongxing.zhu, linux-pci, devicetree,
linux-arm-kernel, linux-kernel, kernel, linux-imx
Hi Richard,
I love your patch! Yet something to improve:
[auto build test ERROR on next-20220718]
[cannot apply to helgaas-pci/next robh/for-next char-misc/char-misc-testing v5.19-rc7 v5.19-rc6 v5.19-rc5 linus/master v5.19-rc7]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Richard-Zhu/Add-iMX-PCIe-EP-mode-support/20220719-180421
base: 036ad6daa8f0fd357af7f50f9da58539eaa6f68c
config: powerpc-allmodconfig (https://download.01.org/0day-ci/archive/20220724/202207241506.pe2RsQWk-lkp@intel.com/config)
compiler: powerpc-linux-gcc (GCC) 12.1.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/intel-lab-lkp/linux/commit/1ebd36a42f9836f97d60b714e8ae000135c68576
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review Richard-Zhu/Add-iMX-PCIe-EP-mode-support/20220719-180421
git checkout 1ebd36a42f9836f97d60b714e8ae000135c68576
# save the config file
mkdir build_dir && cp config build_dir/.config
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross W=1 O=build_dir ARCH=powerpc SHELL=/bin/bash drivers/pci/controller/dwc/
If you fix the issue, kindly add following tag where applicable
Reported-by: kernel test robot <lkp@intel.com>
All errors (new ones prefixed by >>):
drivers/pci/controller/dwc/pci-imx6.c: In function 'imx6_add_pcie_ep':
>> drivers/pci/controller/dwc/pci-imx6.c:1069:32: error: initialization of 'struct pcie_port *' from incompatible pointer type 'struct dw_pcie_rp *' [-Werror=incompatible-pointer-types]
1069 | struct pcie_port *pp = &pci->pp;
| ^
drivers/pci/controller/dwc/pci-imx6.c:1072:29: error: passing argument 1 of 'imx6_pcie_host_init' from incompatible pointer type [-Werror=incompatible-pointer-types]
1072 | imx6_pcie_host_init(pp);
| ^~
| |
| struct pcie_port *
drivers/pci/controller/dwc/pci-imx6.c:925:51: note: expected 'struct dw_pcie_rp *' but argument is of type 'struct pcie_port *'
925 | static int imx6_pcie_host_init(struct dw_pcie_rp *pp)
| ~~~~~~~~~~~~~~~~~~~^~
cc1: some warnings being treated as errors
vim +1069 drivers/pci/controller/dwc/pci-imx6.c
1060
1061 static int imx6_add_pcie_ep(struct imx6_pcie *imx6_pcie,
1062 struct platform_device *pdev)
1063 {
1064 int ret;
1065 unsigned int pcie_dbi2_offset;
1066 struct dw_pcie_ep *ep;
1067 struct resource *res;
1068 struct dw_pcie *pci = imx6_pcie->pci;
> 1069 struct pcie_port *pp = &pci->pp;
1070 struct device *dev = pci->dev;
1071
1072 imx6_pcie_host_init(pp);
1073 ep = &pci->ep;
1074 ep->ops = &pcie_ep_ops;
1075
1076 switch (imx6_pcie->drvdata->variant) {
1077 case IMX8MM_EP:
1078 pcie_dbi2_offset = SZ_1M;
1079 break;
1080 default:
1081 pcie_dbi2_offset = SZ_4K;
1082 break;
1083 }
1084 pci->dbi_base2 = pci->dbi_base + pcie_dbi2_offset;
1085 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "addr_space");
1086 if (!res)
1087 return -EINVAL;
1088
1089 ep->phys_base = res->start;
1090 ep->addr_size = resource_size(res);
1091 ep->page_size = SZ_64K;
1092
1093 ret = dw_pcie_ep_init(ep);
1094 if (ret) {
1095 dev_err(dev, "failed to initialize endpoint\n");
1096 return ret;
1097 }
1098 /* Start LTSSM. */
1099 imx6_pcie_ltssm_enable(dev);
1100
1101 return 0;
1102 }
1103
--
0-DAY CI Kernel Test Service
https://01.org/lkp
^ permalink raw reply [flat|nested] 17+ messages in thread
* [PATCH v1 10/10] PCI: imx6: Add iMX8MQ PCIe EP support
2022-07-19 9:45 [PATCH v1 0/10] Add iMX PCIe EP mode support Richard Zhu
` (8 preceding siblings ...)
2022-07-19 9:45 ` [PATCH v1 09/10] PCI: imx6: Add iMX8MM PCIe EP mode Richard Zhu
@ 2022-07-19 9:45 ` Richard Zhu
9 siblings, 0 replies; 17+ messages in thread
From: Richard Zhu @ 2022-07-19 9:45 UTC (permalink / raw)
To: l.stach, bhelgaas, robh+dt, lorenzo.pieralisi, shawnguo, kishon,
kw, frank.li
Cc: hongxing.zhu, linux-pci, devicetree, linux-arm-kernel,
linux-kernel, kernel, linux-imx
Add the iMX8MQ PCIe EP support
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
---
drivers/pci/controller/dwc/pci-imx6.c | 34 +++++++++++++++++++++++----
1 file changed, 29 insertions(+), 5 deletions(-)
diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
index ba4ac258c13d..1df634370291 100644
--- a/drivers/pci/controller/dwc/pci-imx6.c
+++ b/drivers/pci/controller/dwc/pci-imx6.c
@@ -52,6 +52,7 @@ enum imx6_pcie_variants {
IMX8MQ,
IMX8MM,
IMX8MM_EP,
+ IMX8MQ_EP,
};
#define IMX6_PCIE_FLAG_IMX6_PHY BIT(0)
@@ -152,6 +153,7 @@ struct imx6_pcie {
static unsigned int imx6_pcie_grp_offset(const struct imx6_pcie *imx6_pcie)
{
WARN_ON(imx6_pcie->drvdata->variant != IMX8MQ &&
+ imx6_pcie->drvdata->variant != IMX8MQ_EP &&
imx6_pcie->drvdata->variant != IMX8MM &&
imx6_pcie->drvdata->variant != IMX8MM_EP);
return imx6_pcie->controller_id == 1 ? IOMUXC_GPR16 : IOMUXC_GPR14;
@@ -166,13 +168,22 @@ static void imx6_pcie_configure_type(struct imx6_pcie *imx6_pcie)
else
mode = PCI_EXP_TYPE_ROOT_PORT;
- if (imx6_pcie->drvdata->variant == IMX8MQ &&
- imx6_pcie->controller_id == 1) {
- mask = IMX8MQ_GPR12_PCIE2_CTRL_DEVICE_TYPE;
- val = FIELD_PREP(IMX8MQ_GPR12_PCIE2_CTRL_DEVICE_TYPE, mode);
- } else {
+ switch (imx6_pcie->drvdata->variant) {
+ case IMX8MQ:
+ case IMX8MQ_EP:
+ if (imx6_pcie->controller_id == 1) {
+ mask = IMX8MQ_GPR12_PCIE2_CTRL_DEVICE_TYPE;
+ val = FIELD_PREP(IMX8MQ_GPR12_PCIE2_CTRL_DEVICE_TYPE,
+ mode);
+ } else {
+ mask = IMX6Q_GPR12_DEVICE_TYPE;
+ val = FIELD_PREP(IMX6Q_GPR12_DEVICE_TYPE, mode);
+ }
+ break;
+ default:
mask = IMX6Q_GPR12_DEVICE_TYPE;
val = FIELD_PREP(IMX6Q_GPR12_DEVICE_TYPE, mode);
+ break;
}
regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12, mask, val);
@@ -314,6 +325,7 @@ static void imx6_pcie_init_phy(struct imx6_pcie *imx6_pcie)
*/
break;
case IMX8MQ:
+ case IMX8MQ_EP:
/*
* TODO: Currently this code assumes external
* oscillator is being used
@@ -566,6 +578,7 @@ static int imx6_pcie_enable_ref_clk(struct imx6_pcie *imx6_pcie)
case IMX8MM:
case IMX8MM_EP:
case IMX8MQ:
+ case IMX8MQ_EP:
ret = clk_prepare_enable(imx6_pcie->pcie_aux);
if (ret) {
dev_err(dev, "unable to enable pcie_aux clock\n");
@@ -611,6 +624,7 @@ static void imx6_pcie_disable_ref_clk(struct imx6_pcie *imx6_pcie)
case IMX8MM:
case IMX8MM_EP:
case IMX8MQ:
+ case IMX8MQ_EP:
clk_disable_unprepare(imx6_pcie->pcie_aux);
break;
default:
@@ -675,6 +689,7 @@ static void imx6_pcie_assert_core_reset(struct imx6_pcie *imx6_pcie)
switch (imx6_pcie->drvdata->variant) {
case IMX7D:
case IMX8MQ:
+ case IMX8MQ_EP:
reset_control_assert(imx6_pcie->pciephy_reset);
fallthrough;
case IMX8MM:
@@ -716,6 +731,7 @@ static int imx6_pcie_deassert_core_reset(struct imx6_pcie *imx6_pcie)
switch (imx6_pcie->drvdata->variant) {
case IMX8MQ:
+ case IMX8MQ_EP:
reset_control_deassert(imx6_pcie->pciephy_reset);
break;
case IMX7D:
@@ -803,6 +819,7 @@ static void imx6_pcie_ltssm_enable(struct device *dev)
break;
case IMX7D:
case IMX8MQ:
+ case IMX8MQ_EP:
case IMX8MM:
case IMX8MM_EP:
reset_control_deassert(imx6_pcie->apps_reset);
@@ -823,6 +840,7 @@ static void imx6_pcie_ltssm_disable(struct device *dev)
break;
case IMX7D:
case IMX8MQ:
+ case IMX8MQ_EP:
case IMX8MM:
case IMX8MM_EP:
reset_control_assert(imx6_pcie->apps_reset);
@@ -1264,6 +1282,7 @@ static int imx6_pcie_probe(struct platform_device *pdev)
"pcie_inbound_axi clock missing or invalid\n");
break;
case IMX8MQ:
+ case IMX8MQ_EP:
imx6_pcie->pcie_aux = devm_clk_get(dev, "pcie_aux");
if (IS_ERR(imx6_pcie->pcie_aux))
return dev_err_probe(dev, PTR_ERR(imx6_pcie->pcie_aux),
@@ -1441,6 +1460,10 @@ static const struct imx6_pcie_drvdata drvdata[] = {
.variant = IMX8MM_EP,
.mode = DW_PCIE_EP_TYPE,
},
+ [IMX8MQ_EP] = {
+ .variant = IMX8MQ_EP,
+ .mode = DW_PCIE_EP_TYPE,
+ },
};
static const struct of_device_id imx6_pcie_of_match[] = {
@@ -1451,6 +1474,7 @@ static const struct of_device_id imx6_pcie_of_match[] = {
{ .compatible = "fsl,imx8mq-pcie", .data = &drvdata[IMX8MQ], },
{ .compatible = "fsl,imx8mm-pcie", .data = &drvdata[IMX8MM], },
{ .compatible = "fsl,imx8mm-pcie-ep", .data = &drvdata[IMX8MM_EP], },
+ { .compatible = "fsl,imx8mq-pcie-ep", .data = &drvdata[IMX8MQ_EP], },
{},
};
--
2.25.1
^ permalink raw reply related [flat|nested] 17+ messages in thread