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From: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
To: Kishon Vijay Abraham I <kishon@ti.com>
Cc: Gustavo Pimentel <gustavo.pimentel@synopsys.com>,
	"bhelgaas@google.com" <bhelgaas@google.com>,
	"Joao.Pinto@synopsys.com" <Joao.Pinto@synopsys.com>,
	"jingoohan1@gmail.com" <jingoohan1@gmail.com>,
	"robh+dt@kernel.org" <robh+dt@kernel.org>,
	"mark.rutland@arm.com" <mark.rutland@arm.com>,
	"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>
Subject: Re: [PATCH v7 3/9] PCI: endpoint: functions/pci-epf-test: Add second entry
Date: Thu, 3 May 2018 15:16:36 +0100	[thread overview]
Message-ID: <20180503141636.GA23270@e107981-ln.cambridge.arm.com> (raw)
In-Reply-To: <cf2772d5-26c0-b0e3-1e5b-ace91c1ea105@ti.com>

On Thu, May 03, 2018 at 12:03:15PM +0530, Kishon Vijay Abraham I wrote:

[...]

> >> Since the linkup notifier and BAR index (where auxiliary registers are
> >> located) may be configurable and is something platform dependent,
> >> perhaps the configuration of this variables should be done by module
> >> parameter and not by configfs, leaving this configuration
> >> responsibility in charge of each platform.
> > 
> > They are platform dependent because they depend on the EP controller.
> > That's why I said that those are EP controller parameters. I do not
> > think they are module parameters either - they should be part of HW
> > description in firmware.
> 
> The problem is because pci-epf-test cannot be described in HW. pci-epf-test is
> also not automatically bound to the EP controller but is bound by the user like
> below
> ln -s functions/pci_epf_test/func1 controllers/51000000.pcie_ep/
> 
> So given that user anyways has to bind the epf device to the controller, based
> on the platform the user can use a different configfs entry like below
> ln -s functions/pci_epf_test_dw/func1 controllers/51000000.pcie_ep/ or
> ln -s functions/pci_epf_test_k2g/func1 controllers/21800000.pcie-ep/
> 
> If the epf can be described in dt, then something like below can be done
> pcie1_ep: pcie_ep@51000000 {
> 	compatible = "ti,dra7-pcie-ep";
> 	interrupts = <0 232 0x4>;
> 	num-lanes = <1>;
> 	num-ib-windows = <4>;
> 	num-ob-windows = <16>;
> 	phys = <&pcie1_phy>;
> 	phy-names = "pcie-phy0";
> 	pci_epf_test: pci_epf_test@0 {
> 		name = "pci_epf_test_dw";
> 		<other properties>;
> 	}
> };
> 
> With this pci-dra7xx.c driver should create pci_epf_device using
> pci_epf_create("pci_epf_test_dw");
> 
> Then the driver_data corresponding to "pci_epf_test_dw" will select linkup
> notifier or BAR index etc.

Those two properties are properties of the EP controller (it is not 100%
clear to me how the test BAR register is defined), is this correct ?

If yes, given that those properties are not useful before an EPF is
bound to an EPC, can't they be retrieved at bind time from the EPC
controller data (that we can add through DT bindings) ?

Thanks,
Lorenzo

  reply	other threads:[~2018-05-03 14:16 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-04-24 13:44 [PATCH v7 0/9] Designware EP support and code clean up Gustavo Pimentel
2018-04-24 13:44 ` [PATCH v7 1/9] bindings: PCI: designware: Example update Gustavo Pimentel
2018-04-24 13:44 ` [PATCH v7 2/9] PCI: dwc: Add support for endpoint mode Gustavo Pimentel
2018-04-24 13:44 ` [PATCH v7 3/9] PCI: endpoint: functions/pci-epf-test: Add second entry Gustavo Pimentel
2018-04-26 16:56   ` Lorenzo Pieralisi
2018-04-30 17:32     ` Gustavo Pimentel
2018-05-01 10:07     ` Kishon Vijay Abraham I
2018-05-01 11:54       ` Lorenzo Pieralisi
2018-05-01 12:23         ` Kishon Vijay Abraham I
2018-05-01 14:26           ` Lorenzo Pieralisi
2018-05-02 10:39             ` Gustavo Pimentel
2018-05-02 16:51               ` Lorenzo Pieralisi
2018-05-03  6:33                 ` Kishon Vijay Abraham I
2018-05-03 14:16                   ` Lorenzo Pieralisi [this message]
2018-05-04  5:58                     ` Kishon Vijay Abraham I
2018-05-04 11:18                       ` Lorenzo Pieralisi
2018-05-03 15:21                   ` Gustavo Pimentel
2018-04-24 13:44 ` [PATCH v7 4/9] bindings: PCI: designware: Add support for the EP in Designware driver Gustavo Pimentel
2018-04-24 13:44 ` [PATCH v7 5/9] misc: pci_endpoint_test: Add designware EP entry Gustavo Pimentel
2018-04-24 13:44 ` [PATCH v7 6/9] PCI: dwc: Define maximum number of vectors Gustavo Pimentel
2018-04-24 14:39   ` Jingoo Han
2018-04-24 13:44 ` [PATCH v7 7/9] PCI: dwc: Replace lower into upper case characters Gustavo Pimentel
2018-04-24 13:44 ` [PATCH v7 8/9] PCI: dwc: Small computation improvement Gustavo Pimentel
2018-04-24 13:44 ` [PATCH v7 9/9] PCI: dwc: Replace magic number by defines Gustavo Pimentel

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