From: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
To: bhelgaas@google.com, lorenzo.pieralisi@arm.com,
Joao.Pinto@synopsys.com, jingoohan1@gmail.com, kishon@ti.com,
robh+dt@kernel.org, mark.rutland@arm.com
Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org, gustavo.pimentel@synopsys.com
Subject: [PATCH v7 4/9] bindings: PCI: designware: Add support for the EP in Designware driver
Date: Tue, 24 Apr 2018 14:44:41 +0100 [thread overview]
Message-ID: <130650f98603a2d734b9a441a70b334dac4a402d.1524577064.git.gustavo.pimentel@synopsys.com> (raw)
In-Reply-To: <cover.1524577064.git.gustavo.pimentel@synopsys.com>
In-Reply-To: <cover.1524577064.git.gustavo.pimentel@synopsys.com>
Add device tree binding documentation for the Endpoint in PCIe Designware
driver.
Signed-off-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
Reviewed-by: Rob Herring <robh@kernel.org>
---
Change v1->v2:
- Add a missing log description.
- Add "snps,dw-pcie" compatible string following Kishon's suggestion.
Change v2->v3:
- Reverted pcie_ep name to pcie.
Changes v3->v4:
- Reverted "snps,dw-pcie-rc" compatible string requested by Rob Herring.
Changes v4->v5:
- Removed device_type entry from EP requested by Rob Herring.
Changes v5->v6:
- Nothing changed, just to follow the patch set version.
Changes v6->v7:
- Nothing changed, just to follow the patch set version.
Documentation/devicetree/bindings/pci/designware-pcie.txt | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/Documentation/devicetree/bindings/pci/designware-pcie.txt b/Documentation/devicetree/bindings/pci/designware-pcie.txt
index 7f9804d..c124f9b 100644
--- a/Documentation/devicetree/bindings/pci/designware-pcie.txt
+++ b/Documentation/devicetree/bindings/pci/designware-pcie.txt
@@ -3,6 +3,7 @@
Required properties:
- compatible:
"snps,dw-pcie" for RC mode;
+ "snps,dw-pcie-ep" for EP mode;
- reg: Should contain the configuration address space.
- reg-names: Must be "config" for the PCIe configuration space.
(The old way of getting the configuration address space from "ranges"
@@ -56,3 +57,14 @@ Example configuration:
#interrupt-cells = <1>;
num-lanes = <1>;
};
+or
+ pcie: pcie@dfc00000 {
+ compatible = "snps,dw-pcie-ep";
+ reg = <0xdfc00000 0x0001000>, /* IP registers 1 */
+ <0xdfc01000 0x0001000>, /* IP registers 2 */
+ <0xd0000000 0x2000000>; /* Configuration space */
+ reg-names = "dbi", "dbi2", "addr_space";
+ num-ib-windows = <6>;
+ num-ob-windows = <2>;
+ num-lanes = <1>;
+ };
--
2.7.4
next prev parent reply other threads:[~2018-04-24 13:44 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-04-24 13:44 [PATCH v7 0/9] Designware EP support and code clean up Gustavo Pimentel
2018-04-24 13:44 ` [PATCH v7 1/9] bindings: PCI: designware: Example update Gustavo Pimentel
2018-04-24 13:44 ` [PATCH v7 2/9] PCI: dwc: Add support for endpoint mode Gustavo Pimentel
2018-04-24 13:44 ` [PATCH v7 3/9] PCI: endpoint: functions/pci-epf-test: Add second entry Gustavo Pimentel
2018-04-26 16:56 ` Lorenzo Pieralisi
2018-04-30 17:32 ` Gustavo Pimentel
2018-05-01 10:07 ` Kishon Vijay Abraham I
2018-05-01 11:54 ` Lorenzo Pieralisi
2018-05-01 12:23 ` Kishon Vijay Abraham I
2018-05-01 14:26 ` Lorenzo Pieralisi
2018-05-02 10:39 ` Gustavo Pimentel
2018-05-02 16:51 ` Lorenzo Pieralisi
2018-05-03 6:33 ` Kishon Vijay Abraham I
2018-05-03 14:16 ` Lorenzo Pieralisi
2018-05-04 5:58 ` Kishon Vijay Abraham I
2018-05-04 11:18 ` Lorenzo Pieralisi
2018-05-03 15:21 ` Gustavo Pimentel
2018-04-24 13:44 ` Gustavo Pimentel [this message]
2018-04-24 13:44 ` [PATCH v7 5/9] misc: pci_endpoint_test: Add designware EP entry Gustavo Pimentel
2018-04-24 13:44 ` [PATCH v7 6/9] PCI: dwc: Define maximum number of vectors Gustavo Pimentel
2018-04-24 14:39 ` Jingoo Han
2018-04-24 13:44 ` [PATCH v7 7/9] PCI: dwc: Replace lower into upper case characters Gustavo Pimentel
2018-04-24 13:44 ` [PATCH v7 8/9] PCI: dwc: Small computation improvement Gustavo Pimentel
2018-04-24 13:44 ` [PATCH v7 9/9] PCI: dwc: Replace magic number by defines Gustavo Pimentel
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