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From: "Woods, Brian" <Brian.Woods@amd.com>
To: Borislav Petkov <bp@alien8.de>
Cc: "Woods, Brian" <Brian.Woods@amd.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Ingo Molnar <mingo@redhat.com>, "H. Peter Anvin" <hpa@zytor.com>,
	"x86@kernel.org" <x86@kernel.org>,
	Clemens Ladisch <clemens@ladisch.de>,
	Jean Delvare <jdelvare@suse.com>,
	Guenter Roeck <linux@roeck-us.net>,
	Bjorn Helgaas <bhelgaas@google.com>, Pu Wen <puwen@hygon.cn>,
	Jia Zhang <qianyue.zj@alibaba-inc.com>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"linux-hwmon@vger.kernel.org" <linux-hwmon@vger.kernel.org>,
	"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>
Subject: Re: [PATCH 2/4] x86/amd_nb: add support for newer PCI topologies
Date: Mon, 5 Nov 2018 20:33:34 +0000	[thread overview]
Message-ID: <20181105203330.GB27399@amd.com> (raw)
In-Reply-To: <20181105193840.GA26868@zn.tnic>

On Mon, Nov 05, 2018 at 08:38:40PM +0100, Borislav Petkov wrote:
> On Fri, Nov 02, 2018 at 06:11:07PM +0000, Woods, Brian wrote:
> > Add support for new processors which have multiple PCI root complexes
> > per data fabric/SMN interface.
> 
> Please write out abbreviations. I believe it is only you and I who know
> what SMN means. :)

Will do.

> > The interfaces per root complex are redundant and should be skipped.
> 
> And I believe it is only you who understands that sentence. :)
> 
> Please elaborate why interfaces need to be skipped, *which* interfaces
> need to be skipped and which is the correct interface to access DF/SMN
> through?

See last comment.

> > This makes sure the DF/SMN interfaces get accessed via the correct
> > root complex.
> >
> > Ex:
> > DF/SMN 0 -> 60
> > 	    40
> > 	    20
> > 	    00
> > DF/SMN 1 -> e0
> > 	    c0
> > 	    a0
> > 	    80
> > 
> > Signed-off-by: Brian Woods <brian.woods@amd.com>
> > ---
> >  arch/x86/kernel/amd_nb.c | 41 +++++++++++++++++++++++++++++++++++------
> >  1 file changed, 35 insertions(+), 6 deletions(-)
> > 
> > diff --git a/arch/x86/kernel/amd_nb.c b/arch/x86/kernel/amd_nb.c
> > index 19d489ee2b1e..c0bf26aeb7c3 100644
> > --- a/arch/x86/kernel/amd_nb.c
> > +++ b/arch/x86/kernel/amd_nb.c
> > @@ -213,7 +213,10 @@ int amd_cache_northbridges(void)
> >  	const struct pci_device_id *root_ids = amd_root_ids;
> >  	struct pci_dev *root, *misc, *link;
> >  	struct amd_northbridge *nb;
> > -	u16 i = 0;
> > +	u16 roots_per_misc = 0;
> > +	u16 misc_count = 0;
> > +	u16 root_count = 0;
> > +	u16 i, j;
> >  
> >  	if (amd_northbridges.num)
> >  		return 0;
> > @@ -226,26 +229,52 @@ int amd_cache_northbridges(void)
> >  
> >  	misc = NULL;
> >  	while ((misc = next_northbridge(misc, misc_ids)) != NULL)
> > -		i++;
> > +		misc_count++;
> >  
> > -	if (!i)
> > +	root = NULL;
> > +	while ((root = next_northbridge(root, root_ids)) != NULL)
> > +		root_count++;
> > +
> > +	if (!misc_count)
> >  		return -ENODEV;
> 
> So you're doing the root_count above but returning in the !misc_count
> case. So that root_count iteration was unnecessary work. IOW, you should
> keep the misc_count check after its loop.

I think having them togeter is cleaner. If you aren't finding any
misc IDs, I highly doubt you'll find any root IDs.  There shouldn't
be much of a difference in how fast the function exits, either way.
If you want it the other way though, I don't mind changing it.

> >  
> > -	nb = kcalloc(i, sizeof(struct amd_northbridge), GFP_KERNEL);
> > +	if (root_count) {
> > +		roots_per_misc = root_count / misc_count;
> > +
> > +		/*
> > +		 * There should be _exactly_ N roots for each DF/SMN
> > +		 * interface.
> > +		 */
> > +		if (!roots_per_misc || (root_count % roots_per_misc)) {
> > +			pr_info("Unsupported AMD DF/PCI configuration found\n");
> > +			return -ENODEV;
> > +		}
> > +	}
> > +
> > +	nb = kcalloc(misc_count, sizeof(struct amd_northbridge), GFP_KERNEL);
> >  	if (!nb)
> >  		return -ENOMEM;
> >  
> >  	amd_northbridges.nb = nb;
> > -	amd_northbridges.num = i;
> > +	amd_northbridges.num = misc_count;
> >  
> >  	link = misc = root = NULL;
> > -	for (i = 0; i != amd_northbridges.num; i++) {
> > +	for (i = 0; i < amd_northbridges.num; i++) {
> >  		node_to_amd_nb(i)->root = root =
> >  			next_northbridge(root, root_ids);
> >  		node_to_amd_nb(i)->misc = misc =
> >  			next_northbridge(misc, misc_ids);
> >  		node_to_amd_nb(i)->link = link =
> >  			next_northbridge(link, link_ids);
> > +
> > +		/*
> > +		 * If there are more root devices than data fabric/SMN,
> > +		 * interfaces, then the root devices per DF/SMN
> > +		 * interface are redundant and N-1 should be skipped so
> > +		 * they aren't mapped incorrectly.
> > +		 */
> 
> This text is trying to explain it a bit better but you still still need
> to specify which are the redundant ones. All N-1 or is there a special
> root device through which the DF/SMN gets accessed or?
> 
> Thx.
Would

		/*
		 * If there are more PCI root devices than data fabric/
		 * system management network interfaces, then the (N)
		 * PCI roots per DF/SMN interface are functionally the
		 * same (for DF/SMN access) and N-1 are redundant.  The
		 * N-1 PCI roots should be skipped per DF/SMN interface
		 * so the DF/SMN interfaces get mapped to the correct
		 * PCI root.
		 */

be better?  I would update the commit msg also.

> -- 
> Regards/Gruss,
>     Boris.
> 
> Good mailing practices for 400: avoid top-posting and trim the reply.

-- 
Brian Woods

  reply	other threads:[~2018-11-05 20:33 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-11-02 18:11 [PATCH 0/4] Update DF/SMN access and k10temp for AMD F17h M30h Woods, Brian
2018-11-02 18:11 ` [PATCH 1/4] k10temp: x86/amd_nb: consolidate shared device IDs Woods, Brian
2018-11-02 18:24   ` Guenter Roeck
2018-11-02 18:11 ` [PATCH 2/4] x86/amd_nb: add support for newer PCI topologies Woods, Brian
2018-11-02 19:59   ` Bjorn Helgaas
2018-11-02 23:29     ` Borislav Petkov
2018-11-05 21:45       ` Bjorn Helgaas
2018-11-05 21:56         ` Borislav Petkov
2018-11-06 21:42           ` Bjorn Helgaas
2018-11-06 22:00             ` Borislav Petkov
2018-11-06 23:20               ` Bjorn Helgaas
2018-11-07  9:18                 ` Borislav Petkov
2018-11-07 13:38                   ` Bjorn Helgaas
2018-11-07 16:07                     ` Borislav Petkov
2018-11-07 17:10                       ` Bjorn Helgaas
2018-11-07 17:17                         ` Borislav Petkov
2018-11-07 19:50                       ` Woods, Brian
2018-11-07 13:51                   ` Guenter Roeck
2018-11-07 17:16                     ` Bjorn Helgaas
2018-11-07 19:15                 ` Srinivas Pandruvada
2018-11-07 21:31                   ` Bjorn Helgaas
2018-11-07 22:42                     ` Srinivas Pandruvada
2018-11-07 23:14                       ` Bjorn Helgaas
2018-11-07 23:30                         ` Srinivas Pandruvada
2018-11-07 23:44                           ` Srinivas Pandruvada
2018-11-08  1:40                         ` Guenter Roeck
2018-11-08 13:59                           ` Bjorn Helgaas
2018-11-05 19:38   ` Borislav Petkov
2018-11-05 20:33     ` Woods, Brian [this message]
2018-11-05 21:42       ` Borislav Petkov
2018-11-05 23:32         ` Woods, Brian
2018-11-06  8:27           ` Borislav Petkov
2018-11-02 18:11 ` [PATCH 3/4] x86/amd_nb: add PCI device IDs for F17h M30h Woods, Brian
2018-11-02 18:11 ` [PATCH 4/4] hwmon: k10temp: add support for AMD F17h M30h CPUs Woods, Brian
2018-11-02 18:26   ` Guenter Roeck
2018-11-05 20:32   ` Borislav Petkov

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