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From: Bjorn Helgaas <helgaas@kernel.org>
To: "Z.q. Hou" <zhiqiang.hou@nxp.com>
Cc: "linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
	"linux-arm-kernel@lists.infradead.org" 
	<linux-arm-kernel@lists.infradead.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"robh+dt@kernel.org" <robh+dt@kernel.org>,
	"mark.rutland@arm.com" <mark.rutland@arm.com>,
	"l.subrahmanya@mobiveil.co.in" <l.subrahmanya@mobiveil.co.in>,
	"shawnguo@kernel.org" <shawnguo@kernel.org>,
	Leo Li <leoyang.li@nxp.com>,
	"lorenzo.pieralisi@arm.com" <lorenzo.pieralisi@arm.com>,
	"catalin.marinas@arm.com" <catalin.marinas@arm.com>,
	"will.deacon@arm.com" <will.deacon@arm.com>,
	"M.h. Lian" <minghuan.lian@nxp.com>,
	Xiaowei Bao <xiaowei.bao@nxp.com>,
	Mingkai Hu <mingkai.hu@nxp.com>
Subject: Re: [PATCHv4 00/28] PCI: refactor Mobiveil driver and add PCIe Gen4 driver for NXP Layerscape SoCs
Date: Mon, 11 Mar 2019 08:33:10 -0500
Message-ID: <20190311133310.GE214730@google.com> (raw)
In-Reply-To: <20190311093130.7209-1-Zhiqiang.Hou@nxp.com>

Hi,

On Mon, Mar 11, 2019 at 09:29:54AM +0000, Z.q. Hou wrote:
> From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> 
> This patch set is aim to refactor the Mobiveil driver and add
> PCIe support for NXP Layerscape series SoCs integrated Mobiveil's
> PCIe Gen4 controller.
> 
> Hou Zhiqiang (28):
>   PCI: mobiveil: uniform the register accessors

"uniform" is not a verb.  Maybe "Unify register accessors"?

>   PCI: mobiveil: format the code without function change
>   PCI: mobiveil: correct the returned error number
>   PCI: mobiveil: remove flag MSI_FLAG_MULTI_PCI_MSI
>   PCI: mobiveil: correct PCI base address in MEM/IO outbound windows
>   PCI: mobiveil: replace the resource list iteration function
>   PCI: mobiveil: use WIN_NUM_0 explicitly for CFG outbound window
>   PCI: mobiveil: use the 1st inbound window for MEM inbound transactions
>   PCI: mobiveil: correct inbound/outbound window setup routines
>   PCI: mobiveil: fix the INTx process error
>   PCI: mobiveil: only fix up the Class Code field
>   PCI: mobiveil: move out the link up waiting from mobiveil_host_init

Add parens for function names, e.g., "mobiveil_host_init()".  This
occurs several more times, including both subject lines and changelogs.

>   PCI: mobiveil: move irq chained handler setup out of DT parse

Capitalize acronyms in English text (subject lines, changelogs,
comments), e.g., s/irq/IRQ/

>   PCI: mobiveil: initialize Primary/Secondary/Subordinate bus number
>   dt-bindings: pci: mobiveil: change gpio_slave and apb_csr to optional
>   PCI: mobiveil: refactor Mobiveil PCIe Host Bridge IP driver

This should give a hint about the purpose of refactoring.  Sounds like
it's to make it easier to support both host and endpoint mode?

>   PCI: mobiveil: fix the checking of valid device
>   PCI: mobiveil: add link up condition check
>   PCI: mobiveil: continue to initialize the host upon no PCIe link
>   PCI: mobiveil: disabled IB and OB windows set by bootloader
>   PCI: mobiveil: add Byte and Half-Word width register accessors

"Byte" and "Half-Word" do not need to be capitalized.  Also, the
changelog has a typo: "Half-Work" for "half-word".

>   PCI: mobiveil: make mobiveil_host_init can be used to re-init host

Here's another of the places that need parens after the function name.

>   dt-bindings: pci: Add NXP Layerscape SoCs PCIe Gen4 controller
>   PCI: mobiveil: add PCIe Gen4 RC driver for NXP Layerscape SoCs
>   PCI: mobiveil: ls_pcie_g4: add Workaround for A-011577
>   PCI: mobiveil: ls_pcie_g4: add Workaround for A-011451

The reader of these changelogs likely doesn't know what internal
identifiers like "A-011577" mean, but *does* want a hint about what
problem is being fixed and what platforms are affected.  So instead of
the "ls_pcie_g4:" prefix, use something like:

  PCI: mobiveil: Work around LX2160A r1.0 config access erratum
  PCI: mobiveil: Work around LX2160A r1.0 split completion erratum

and mention the erratum ID (A-011577) in the changelog.  If you can
include the actual erratum text in the changelog, that would be even
better.

s/ERRATA/errata/ in the changelogs.

>   arm64: dts: freescale: lx2160a: add pcie DT nodes

"PCIe"

>   arm64: defconfig: Enable CONFIG_PCI_LAYERSCAPE_GEN4

I already asked you once [1] to:

  please pay attention to the changelog conventions, e.g., capitalize the
  first word of the sentence ("Remove flag ...", "Correct PCI base address
  ...", etc), capitalize acronyms like "PCI" and "IRQ", use parentheses
  after function names, etc.  You can see the conventions by running "git
  log --oneline drivers/pci/controller".

For example, instead of this:

  PCI: mobiveil: add link up condition check

it should be this:

  PCI: mobiveil: Add link up condition check

Please wait at least a few days before posting a v5 in case there are
other comments.

Bjorn

[1] https://lore.kernel.org/linux-pci/20190130153447.GB229773@google.com

  parent reply index

Thread overview: 55+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-03-11  9:29 Z.q. Hou
2019-03-11  9:30 ` [PATCHv4 01/28] PCI: mobiveil: uniform the register accessors Z.q. Hou
2019-03-11  9:30 ` [PATCHv4 02/28] PCI: mobiveil: format the code without function change Z.q. Hou
2019-03-11  9:30 ` [PATCHv4 03/28] PCI: mobiveil: correct the returned error number Z.q. Hou
2019-03-11  9:30 ` [PATCHv4 04/28] PCI: mobiveil: remove flag MSI_FLAG_MULTI_PCI_MSI Z.q. Hou
2019-03-11  9:30 ` [PATCHv4 05/28] PCI: mobiveil: correct PCI base address in MEM/IO outbound windows Z.q. Hou
2019-03-11  9:30 ` [PATCHv4 06/28] PCI: mobiveil: replace the resource list iteration function Z.q. Hou
2019-03-11  9:30 ` [PATCHv4 07/28] PCI: mobiveil: use WIN_NUM_0 explicitly for CFG outbound window Z.q. Hou
2019-03-11  9:31 ` [PATCHv4 08/28] PCI: mobiveil: use the 1st inbound window for MEM inbound transactions Z.q. Hou
2019-03-11  9:31 ` [PATCHv4 09/28] PCI: mobiveil: correct inbound/outbound window setup routines Z.q. Hou
2019-03-11  9:31 ` [PATCHv4 10/28] PCI: mobiveil: fix the INTx process error Z.q. Hou
2019-03-11 14:08   ` Bjorn Helgaas
2019-03-12  4:42     ` Z.q. Hou
2019-03-11  9:31 ` [PATCHv4 11/28] PCI: mobiveil: only fix up the Class Code field Z.q. Hou
2019-03-11 14:14   ` Bjorn Helgaas
2019-03-12  9:17     ` Z.q. Hou
2019-03-13 10:59       ` Subrahmanya Lingappa
2019-03-11  9:31 ` [PATCHv4 12/28] PCI: mobiveil: move out the link up waiting from mobiveil_host_init Z.q. Hou
2019-03-11  9:31 ` [PATCHv4 13/28] PCI: mobiveil: move irq chained handler setup out of DT parse Z.q. Hou
2019-03-11  9:31 ` [PATCHv4 14/28] PCI: mobiveil: initialize Primary/Secondary/Subordinate bus number Z.q. Hou
2019-03-11  9:31 ` [PATCHv4 15/28] dt-bindings: pci: mobiveil: change gpio_slave and apb_csr to optional Z.q. Hou
2019-03-11  9:32 ` [PATCHv4 16/28] PCI: mobiveil: refactor Mobiveil PCIe Host Bridge IP driver Z.q. Hou
2019-03-26 17:34   ` Lorenzo Pieralisi
2019-03-27  2:04     ` Z.q. Hou
2019-03-27 17:39       ` Lorenzo Pieralisi
2019-03-28  2:09         ` Z.q. Hou
2019-03-28 16:09           ` Lorenzo Pieralisi
2019-03-29  6:07             ` Z.q. Hou
2019-03-11  9:32 ` [PATCHv4 17/28] PCI: mobiveil: fix the checking of valid device Z.q. Hou
2019-03-11  9:32 ` [PATCHv4 18/28] PCI: mobiveil: add link up condition check Z.q. Hou
2019-03-11  9:32 ` [PATCHv4 19/28] PCI: mobiveil: continue to initialize the host upon no PCIe link Z.q. Hou
2019-03-11  9:32 ` [PATCHv4 20/28] PCI: mobiveil: disabled IB and OB windows set by bootloader Z.q. Hou
2019-03-11  9:32 ` [PATCHv4 21/28] PCI: mobiveil: add Byte and Half-Word width register accessors Z.q. Hou
2019-03-11  9:32 ` [PATCHv4 22/28] PCI: mobiveil: make mobiveil_host_init can be used to re-init host Z.q. Hou
2019-03-11  9:33 ` [PATCHv4 23/28] dt-bindings: pci: Add NXP Layerscape SoCs PCIe Gen4 controller Z.q. Hou
2019-03-11 22:11   ` Rob Herring
2019-03-12  3:17     ` Z.q. Hou
2019-03-12  9:42   ` Z.q. Hou
2019-03-11  9:33 ` [PATCHv4 24/28] PCI: mobiveil: add PCIe Gen4 RC driver for NXP Layerscape SoCs Z.q. Hou
2019-03-11 14:01   ` Bjorn Helgaas
2019-03-12  4:40     ` Z.q. Hou
2019-03-11  9:33 ` [PATCHv4 25/28] PCI: mobiveil: ls_pcie_g4: add Workaround for A-011577 Z.q. Hou
2019-03-13 14:51   ` Z.q. Hou
2019-03-11  9:33 ` [PATCHv4 26/28] PCI: mobiveil: ls_pcie_g4: add Workaround for A-011451 Z.q. Hou
2019-03-11 17:34   ` Bjorn Helgaas
2019-03-12  9:34     ` Z.q. Hou
2019-03-12 13:34       ` Bjorn Helgaas
2019-03-13 14:49         ` Z.q. Hou
2019-03-13 14:51   ` Z.q. Hou
2019-03-11  9:33 ` [PATCHv4 27/28] arm64: dts: freescale: lx2160a: add pcie DT nodes Z.q. Hou
2019-03-11  9:33 ` [PATCHv4 28/28] arm64: defconfig: Enable CONFIG_PCI_LAYERSCAPE_GEN4 Z.q. Hou
2019-03-11 13:33 ` Bjorn Helgaas [this message]
2019-03-12  4:18   ` [PATCHv4 00/28] PCI: refactor Mobiveil driver and add PCIe Gen4 driver for NXP Layerscape SoCs Z.q. Hou
2019-03-26 17:37 ` Lorenzo Pieralisi
2019-03-27  2:11   ` Z.q. Hou

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