From: Keith Busch <kbusch@kernel.org>
To: Jon Derrick <jonathan.derrick@intel.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Bjorn Helgaas <helgaas@kernel.org>,
linux-pci@vger.kernel.org
Subject: Re: [PATCH 2/3] PCI: vmd: Align IRQ lists with child device vectors
Date: Thu, 7 Nov 2019 03:06:30 +0900 [thread overview]
Message-ID: <20191106180630.GC29853@redsun51.ssa.fujisawa.hgst.com> (raw)
In-Reply-To: <1573040408-3831-3-git-send-email-jonathan.derrick@intel.com>
On Wed, Nov 06, 2019 at 04:40:07AM -0700, Jon Derrick wrote:
> In order to provide better affinity alignment along the entire storage
> stack, VMD IRQ lists can be assigned to in a manner where the underlying
> IRQ can be affinitized the same as the child (NVMe) device.
>
> This patch changes the assignment of child device vectors in IRQ lists
> from a round-robin strategy to a matching-entry strategy. NVMe
> affinities are deterministic in a VMD domain when these devices have the
> same vector count as limited by the VMD MSI domain or cpu count. When
> one or more child devices are attached on a VMD domain, this patch
> aligns the NVMe submission-side affinity with the VMD completion-side
> affinity as it completes through the VMD IRQ list.
This really only works if the child devices have the same irq count as
the vmd device. If the vmd device has more interrupts than the child
devices, this will end up overloading the lower vmd interrupts without
even using the higher ones.
next prev parent reply other threads:[~2019-11-06 18:06 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-06 11:40 [PATCH 0/3] PCI: vmd: Reducing tail latency by affining to the storage stack Jon Derrick
2019-11-06 11:40 ` [PATCH 1/3] PCI: vmd: Reduce VMD vectors using NVMe calculation Jon Derrick
2019-11-06 18:02 ` Keith Busch
2019-11-06 19:51 ` Derrick, Jonathan
2019-11-06 11:40 ` [PATCH 2/3] PCI: vmd: Align IRQ lists with child device vectors Jon Derrick
2019-11-06 18:06 ` Keith Busch [this message]
2019-11-06 20:14 ` Derrick, Jonathan
2019-11-06 11:40 ` [PATCH 3/3] PCI: vmd: Use managed irq affinities Jon Derrick
2019-11-06 18:10 ` Keith Busch
2019-11-06 20:14 ` Derrick, Jonathan
2019-11-06 20:27 ` Keith Busch
2019-11-06 20:33 ` Derrick, Jonathan
2019-11-18 10:49 ` Lorenzo Pieralisi
2019-11-18 16:43 ` Derrick, Jonathan
2019-11-07 9:39 ` [PATCH 0/3] PCI: vmd: Reducing tail latency by affining to the storage stack Christoph Hellwig
2019-11-07 14:12 ` Derrick, Jonathan
2019-11-07 15:37 ` hch
2019-11-07 15:40 ` Derrick, Jonathan
2019-11-07 15:42 ` hch
2019-11-07 15:47 ` Derrick, Jonathan
2019-11-11 17:03 ` hch
2022-12-23 2:33 ` Kai-Heng Feng
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20191106180630.GC29853@redsun51.ssa.fujisawa.hgst.com \
--to=kbusch@kernel.org \
--cc=helgaas@kernel.org \
--cc=jonathan.derrick@intel.com \
--cc=linux-pci@vger.kernel.org \
--cc=lorenzo.pieralisi@arm.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).