From: "Marek Behún" <email@example.com> To: Bjorn Helgaas <firstname.lastname@example.org> Cc: "Pali Rohár" <email@example.com>, "Stefan Chulski" <firstname.lastname@example.org>, "Bjorn Helgaas" <email@example.com>, "Thomas Petazzoni" <firstname.lastname@example.org>, "Stefan Roese" <email@example.com>, "Phil Sutter" <firstname.lastname@example.org>, "Mario Six" <email@example.com>, "Lorenzo Pieralisi" <firstname.lastname@example.org>, "email@example.com" <firstname.lastname@example.org> Subject: Re: [EXT] Re: pci mvebu issue (memory controller) Date: Wed, 2 Jun 2021 23:59:36 +0200 [thread overview] Message-ID: <20210602235936.4dac5537@thinkpad> (raw) In-Reply-To: <20210602211335.oe6r35ctkdtc52ic@pali> On Wed, 2 Jun 2021 23:13:35 +0200 Pali Rohár <email@example.com> wrote: > > If the NICs are ordinary PCIe endpoints there must be *something* to > > terminate the other end of the link. Maybe it has some sort of > > non-standard programming interface, but from a PCIe topology point of > > view, it's a root port. > > > > I don't think I can contribute anything to the stuff below. It sounds > > like there's some confusion about how to handle these root ports that > > aren't exactly root ports. That's really up to uboot and the mvebu > > driver to figure out. > > Yes, I understand, it is non-standard and since beginning I'm also > confused how this stuff work at all... And this is also reason why > kernel emulates those root ports (via virtual PCIe bridge devices) to > present "standard" topology. > > Remaining question is: should really kernel filter that "memory > controller" device and do not show it in linux PCIe device hierarchy? > Bjorn, this discussion has gone a little too complex. The basic issue which Pali tries to solve can be recapitulated: - there is a "memory controller" device on the "virtual" bus - Linux' pci-mvebu driver hides this device - we don't know what is the purpose of this device; it is visible even if there is no PCIe device connected - Pali wants to know what is the purpose of this "memory controller" and whether this device should be hidden by Linux and U-Boot, as it currently is, or if the controller driver should expose this device Marek
next prev parent reply other threads:[~2021-06-02 21:59 UTC|newest] Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top [not found] <20210602110703.ymdt6nxsjl7e6glk@pali> 2021-06-02 19:14 ` Bjorn Helgaas 2021-06-02 20:39 ` Pali Rohár 2021-06-02 21:01 ` Bjorn Helgaas 2021-06-02 21:13 ` Pali Rohár 2021-06-02 21:59 ` Marek Behún [this message] 2021-02-09 13:17 Marek Behún 2021-02-10 8:54 ` Thomas Petazzoni 2021-02-10 13:59 ` [EXT] " Stefan Chulski 2021-02-19 17:44 ` Pali Rohár 2021-03-04 18:29 ` Bjorn Helgaas 2021-11-01 18:07 ` Jason Gunthorpe
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=20210602235936.4dac5537@thinkpad \ --firstname.lastname@example.org \ --email@example.com \ --firstname.lastname@example.org \ --email@example.com \ --firstname.lastname@example.org \ --email@example.com \ --firstname.lastname@example.org \ --email@example.com \ --firstname.lastname@example.org \ --email@example.com \ --firstname.lastname@example.org \ --subject='Re: [EXT] Re: pci mvebu issue (memory controller)' \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: link
This is a public inbox, see mirroring instructions for how to clone and mirror all data and code used for this inbox; as well as URLs for NNTP newsgroup(s).