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From: Vidya Sagar <vidyas@nvidia.com>
To: <bhelgaas@google.com>, <lorenzo.pieralisi@arm.com>,
	<robh+dt@kernel.org>, <thierry.reding@gmail.com>,
	<jonathanh@nvidia.com>
Cc: <kishon@ti.com>, <vkoul@kernel.org>, <kw@linux.com>,
	<krzysztof.kozlowski@canonical.com>, <p.zabel@pengutronix.de>,
	<mperttunen@nvidia.com>, <linux-pci@vger.kernel.org>,
	<devicetree@vger.kernel.org>, <linux-tegra@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>, <linux-phy@lists.infradead.org>,
	<kthota@nvidia.com>, <mmaddireddy@nvidia.com>,
	<vidyas@nvidia.com>, <sagar.tv@gmail.com>
Subject: [PATCH V1 04/10] dt-bindings: PHY: P2U: Add support for Tegra234 P2U block
Date: Sat, 5 Feb 2022 21:51:38 +0530	[thread overview]
Message-ID: <20220205162144.30240-5-vidyas@nvidia.com> (raw)
In-Reply-To: <20220205162144.30240-1-vidyas@nvidia.com>

Add support for Tegra234 P2U (PIPE to UPHY) module block which is a glue
module instantiated once for each PCIe lane between Synopsys DesignWare
core based PCIe IP and Universal PHY block.

Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
---
 .../bindings/phy/phy-tegra194-p2u.yaml          | 17 +++++++++++++----
 1 file changed, 13 insertions(+), 4 deletions(-)

diff --git a/Documentation/devicetree/bindings/phy/phy-tegra194-p2u.yaml b/Documentation/devicetree/bindings/phy/phy-tegra194-p2u.yaml
index 9a89d05efbda..6ba1f69b1126 100644
--- a/Documentation/devicetree/bindings/phy/phy-tegra194-p2u.yaml
+++ b/Documentation/devicetree/bindings/phy/phy-tegra194-p2u.yaml
@@ -4,7 +4,7 @@
 $id: "http://devicetree.org/schemas/phy/phy-tegra194-p2u.yaml#"
 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
 
-title: NVIDIA Tegra194 P2U binding
+title: NVIDIA Tegra194 & Tegra234 P2U binding
 
 maintainers:
   - Thierry Reding <treding@nvidia.com>
@@ -12,13 +12,17 @@ maintainers:
 description: >
   Tegra194 has two PHY bricks namely HSIO (High Speed IO) and NVHS (NVIDIA High
   Speed) each interfacing with 12 and 8 P2U instances respectively.
+  Tegra234 has three PHY bricks namesly HSIO, NVHS and GBE (Gigabit Ethernet)
+  each interfacing with 8, 8 and 8 P2U instances respectively.
   A P2U instance is a glue logic between Synopsys DesignWare Core PCIe IP's PIPE
-  interface and PHY of HSIO/NVHS bricks. Each P2U instance represents one PCIe
-  lane.
+  interface and PHY of HSIO/NVHS/GBE bricks. Each P2U instance represents one
+  PCIe lane.
 
 properties:
   compatible:
-    const: nvidia,tegra194-p2u
+    oneOf:
+      - const: nvidia,tegra194-p2u
+      - const: nvidia,tegra234-p2u
 
   reg:
     maxItems: 1
@@ -28,6 +32,11 @@ properties:
     items:
       - const: ctl
 
+  nvidia,skip-sz-protect-en:
+    description: Should be present if two PCIe retimers are present between
+      the root port and its immediate downstream device.
+      type: boolean
+
   '#phy-cells':
     const: 0
 
-- 
2.17.1


  parent reply	other threads:[~2022-02-05 16:22 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-02-05 16:21 [PATCH V1 00/10] PCI: tegra: Add Tegra234 PCIe support Vidya Sagar
2022-02-05 16:21 ` [PATCH V1 01/10] dt-bindings: Add Tegra234 PCIe clocks and resets Vidya Sagar
2022-02-11 14:51   ` Rob Herring
2022-02-05 16:21 ` [PATCH V1 02/10] dt-bindings: power: Add Tegra234 PCIe power domains Vidya Sagar
2022-02-11 14:52   ` Rob Herring
2022-02-05 16:21 ` [PATCH V1 03/10] dt-bindings: memory: Add Tegra234 PCIe memory Vidya Sagar
2022-02-06 11:33   ` Krzysztof Kozlowski
2022-02-24 19:04     ` Thierry Reding
2022-02-11 14:53   ` Rob Herring
2022-02-05 16:21 ` Vidya Sagar [this message]
2022-02-07  6:47   ` [PATCH V1 04/10] dt-bindings: PHY: P2U: Add support for Tegra234 P2U block Raul Tambre
2022-02-11 14:55   ` Rob Herring
2022-02-05 16:21 ` [PATCH V1 05/10] dt-bindings: PCI: tegra: Add device tree support for Tegra234 Vidya Sagar
2022-02-11 14:57   ` Rob Herring
2022-02-05 16:21 ` [PATCH V1 06/10] arm64: tegra: Add P2U and PCIe controller nodes to Tegra234 DT Vidya Sagar
2022-02-05 16:21 ` [PATCH V1 07/10] arm64: tegra: Enable PCIe slots in P3737-0000 board Vidya Sagar
2022-02-06 11:29   ` Krzysztof Kozlowski
2022-02-05 16:21 ` [PATCH V1 08/10] phy: tegra: Add PCIe PIPE2UPHY support for Tegra234 Vidya Sagar
2022-02-05 16:21 ` [PATCH V1 09/10] PCI: Disable MSI for Tegra234 root ports Vidya Sagar
2022-02-07 17:36   ` Bjorn Helgaas
2022-04-23  7:22     ` Vidya Sagar
2022-02-05 16:21 ` [PATCH V1 10/10] PCI: tegra: Add Tegra234 PCIe support Vidya Sagar
2022-02-07 18:19   ` Bjorn Helgaas

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