From: "Pali Rohár" <pali@kernel.org>
To: Jon Hunter <jonathanh@nvidia.com>
Cc: "Thierry Reding" <thierry.reding@gmail.com>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Vidya Sagar" <vidyas@nvidia.com>,
linux-tegra@vger.kernel.org, linux-pci@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH] PCI: tegra: Use PCI_CONF1_EXT_ADDRESS() macro
Date: Tue, 11 Oct 2022 18:55:08 +0200 [thread overview]
Message-ID: <20221011165508.ezpwvmzmxywqoj4u@pali> (raw)
In-Reply-To: <18a48407-9fd7-175d-0c7f-5702b077f13d@nvidia.com>
On Tuesday 11 October 2022 17:47:50 Jon Hunter wrote:
> On 11/10/2022 17:16, Pali Rohár wrote:
>
> ...
>
> > I see, this is stupid mistake. PCIe config read and write operations
> > needs to be 4-byte aligned, so normally it is done by calculating 4-byte
> > aligned base address and then using appropriate cpu load/store
> > instruction to access just defined size/offset of 4-byte config space
> > register.
> >
> > pci-tegra.c is using common helper functions pci_generic_config_read()
> > and pci_generic_config_write(), which expects final address with offset,
> > and not 4-byte aligned address.
> >
> > I'm not sure what should be the proper fix, but for me it looks like
> > that pci_generic_config_read() and pci_generic_config_write() could be
> > adjusted to handle it.
> >
> > In any case, above patch is a regressions and I see there two options
> > for now:
> >
> > 1) Reverting that patch
> >
> > 2) Adding "offset |= where & 0x3;" after the PCI_CONF1_EXT_ADDRESS()
> > macro to set also lower 2 bits of accessed register.
> >
> > Jon, Lorenzo, what do you think? Could you test if 2) is working fine?
>
>
> I tested 'offset |= where & 0xff' which is essentially the same as the above
> and that is working and so I am sure that the above works too. However, I do
> wonder if reverting is simpler because we already have a '&
> ~PCI_CONF1_ENABLE' and now adding '| where & 0x3' seems to diminish the
> value of this change.
>
> Cheers
> Jon
>
> --
> nvpublic
Well, if decision would be that pci_generic_config_read() could be
modified in the future to handle aligning, then '|= where & 0x3' block
would be moved from driver to generic function...
I'm really not sure which option to choose.
next prev parent reply other threads:[~2022-10-11 16:55 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-28 12:19 [PATCH] PCI: tegra: Use PCI_CONF1_EXT_ADDRESS() macro Pali Rohár
2022-09-28 14:35 ` Thierry Reding
2022-09-28 14:40 ` Thierry Reding
2022-09-29 8:47 ` Lorenzo Pieralisi
2022-10-11 15:42 ` Jon Hunter
2022-10-11 16:16 ` Pali Rohár
2022-10-11 16:47 ` Jon Hunter
2022-10-11 16:55 ` Pali Rohár [this message]
2022-10-17 7:43 ` Lorenzo Pieralisi
2022-10-17 8:40 ` Jon Hunter
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