From: Matt Ranostay <mranostay@ti.com>
To: <rogerq@kernel.org>, <lpieralisi@kernel.org>, <robh@kernel.org>,
<kw@linux.com>, <bhelgaas@google.com>,
<krzysztof.kozlowski@linaro.org>, <vigneshr@ti.com>,
<tjoseph@cadence.com>, <sergio.paracuellos@gmail.com>,
<pthombar@cadence.com>, <linux-pci@vger.kernel.org>
Cc: <devicetree@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-omap@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
Matt Ranostay <mranostay@ti.com>, Achal Verma <a-verma1@ti.com>
Subject: [PATCH v7 5/5] PCI: j721e: add j784s4 PCIe configuration
Date: Thu, 24 Nov 2022 00:12:21 -0800 [thread overview]
Message-ID: <20221124081221.1206167-6-mranostay@ti.com> (raw)
In-Reply-To: <20221124081221.1206167-1-mranostay@ti.com>
Add PCIe configuration for j784s4 platform which has 4x lane support.
Tested-by: Achal Verma <a-verma1@ti.com>
Signed-off-by: Matt Ranostay <mranostay@ti.com>
---
drivers/pci/controller/cadence/pci-j721e.c | 23 ++++++++++++++++++++++
1 file changed, 23 insertions(+)
diff --git a/drivers/pci/controller/cadence/pci-j721e.c b/drivers/pci/controller/cadence/pci-j721e.c
index dab3db9be6d8..c484d658c18a 100644
--- a/drivers/pci/controller/cadence/pci-j721e.c
+++ b/drivers/pci/controller/cadence/pci-j721e.c
@@ -330,6 +330,21 @@ static const struct j721e_pcie_data am64_pcie_ep_data = {
.max_lanes = 1,
};
+static const struct j721e_pcie_data j784s4_pcie_rc_data = {
+ .mode = PCI_MODE_RC,
+ .quirk_retrain_flag = true,
+ .is_intc_v1 = true,
+ .byte_access_allowed = false,
+ .linkdown_irq_regfield = LINK_DOWN,
+ .max_lanes = 4,
+};
+
+static const struct j721e_pcie_data j784s4_pcie_ep_data = {
+ .mode = PCI_MODE_EP,
+ .linkdown_irq_regfield = LINK_DOWN,
+ .max_lanes = 4,
+};
+
static const struct of_device_id of_j721e_pcie_match[] = {
{
.compatible = "ti,j721e-pcie-host",
@@ -355,6 +370,14 @@ static const struct of_device_id of_j721e_pcie_match[] = {
.compatible = "ti,am64-pcie-ep",
.data = &am64_pcie_ep_data,
},
+ {
+ .compatible = "ti,j784s4-pcie-host",
+ .data = &j784s4_pcie_rc_data,
+ },
+ {
+ .compatible = "ti,j784s4-pcie-ep",
+ .data = &j784s4_pcie_ep_data,
+ },
{},
};
--
2.38.GIT
next prev parent reply other threads:[~2022-11-24 8:14 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-24 8:12 [PATCH v7 0/5] PCI: add 4x lane support for pci-j721e controllers Matt Ranostay
2022-11-24 8:12 ` [PATCH v7 1/5] dt-bindings: PCI: ti,j721e-pci-*: add checks for num-lanes Matt Ranostay
2022-11-26 14:30 ` Krzysztof Kozlowski
2022-11-24 8:12 ` [PATCH v7 2/5] PCI: j721e: Add per platform maximum lane settings Matt Ranostay
2022-11-25 12:27 ` Roger Quadros
2022-11-24 8:12 ` [PATCH v7 3/5] PCI: j721e: Add PCIe 4x lane selection support Matt Ranostay
2022-11-25 12:31 ` Roger Quadros
2023-02-02 16:09 ` Lorenzo Pieralisi
2022-11-24 8:12 ` [PATCH v7 4/5] dt-bindings: PCI: ti,j721e-pci-*: add j784s4-pci-* compatible strings Matt Ranostay
2022-11-26 14:30 ` Krzysztof Kozlowski
2022-11-24 8:12 ` Matt Ranostay [this message]
2022-11-25 12:32 ` [PATCH v7 5/5] PCI: j721e: add j784s4 PCIe configuration Roger Quadros
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