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From: "Derrick, Jonathan" <jonathan.derrick@intel.com>
To: "kbusch@kernel.org" <kbusch@kernel.org>
Cc: "lorenzo.pieralisi@arm.com" <lorenzo.pieralisi@arm.com>,
	"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
	"helgaas@kernel.org" <helgaas@kernel.org>
Subject: Re: [PATCH] PCI: vmd: Add AHCI to fast interrupt list
Date: Mon, 14 Sep 2020 12:21:07 +0000	[thread overview]
Message-ID: <7bfa36aff6bd83a4083b84d54896673fec28812c.camel@intel.com> (raw)
In-Reply-To: <20200912022636.GB3655346@dhcp-10-100-145-180.wdl.wdc.com>

On Fri, 2020-09-11 at 19:26 -0700, Keith Busch wrote:
> On Fri, Sep 04, 2020 at 11:13:25AM -0600, Jon Derrick wrote:
> > Some platforms have an AHCI controller behind VMD. These platforms are
> > working correctly except for a case when the AHCI MSI is programmed with
> > VMD IRQ vector 0 (0xfee00000). When programmed with any other interrupt
> > (0xfeeNN000), the MSI is routed correctly and is handled by VMD. Placing
> > the AHCI MSI(s) in the fast-interrupt allow list solves the issue.
> 
> The only reason we have the fast vs. slow is because of the non-posted
> transactions from slow driver's interrupt handlers tanking performance
> of the nvme devices sharing the same vector. The microsemi switchtec was
> one of the first such devices identified that led to the current
> split in the VMD domain. AHCI's driver also has non-posted transactions
> in their interrupt handling, so you probably don't want those devices
> sharing vectors with your fast nvme devices.

Good points and I think this would be simply resolved by offsetting the
starting vector and avoiding vector 0 for all vectors.

Thanks

  reply	other threads:[~2020-09-14 17:38 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-09-04 17:13 [PATCH] PCI: vmd: Add AHCI to fast interrupt list Jon Derrick
2020-09-08  7:15 ` You-Sheng Yang
2020-09-12  2:26 ` Keith Busch
2020-09-14 12:21   ` Derrick, Jonathan [this message]
2020-10-19  9:37 ` Jian-Hong Pan
2020-10-20 15:20   ` Keith Busch

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