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From: Marek Vasut <marek.vasut@gmail.com>
To: Bjorn Helgaas <helgaas@kernel.org>
Cc: linux-pci@vger.kernel.org, Bjorn Helgaas <bhelgaas@google.com>,
	Geert Uytterhoeven <geert+renesas@glider.be>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	Wolfram Sang <wsa@the-dreams.de>,
	Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>,
	linux-renesas-soc@vger.kernel.org
Subject: Re: [PATCH V4] PCI: rcar: Add L1 link state fix into data abort hook
Date: Wed, 16 Dec 2020 18:56:11 +0100	[thread overview]
Message-ID: <87361bf6-0fef-3641-1dcb-21c56a2cf0b0@gmail.com> (raw)
In-Reply-To: <20201214203805.GA250639@bjorn-Precision-5520>

On 12/14/20 9:38 PM, Bjorn Helgaas wrote:
> On Tue, Dec 08, 2020 at 07:05:09PM +0100, Marek Vasut wrote:
>> On 12/8/20 5:40 PM, Bjorn Helgaas wrote:
> 
>>> Does this problem occur in both these cases?
>>>
>>>     1) When ASPM enters L1, and
>>>
>>>     2) When software writes PCI_PM_CTRL to put the device in D3hot?
>>>
>>> IIUC both cases require the link to go to L1.  I guess the same
>>> software workaround applies to both cases?
>>
>> Yes
> 
> If ASPM puts the Link in L1 and the device needs to DMA, how does the
> Link get back to L0?

It cannot, so I would expect the DMA access would fail.

> Do we use the same data abort hook?  If getting
> back to L0 requires help from software, it seems like that would
> invalidate the L1 exit latency advertised by the devices.  Wouldn't
> that mean we couldn't safely enable L1 at all unless the endpoint
> could tolerate unlimited exit latency?

Possibly, there could be limitations to the L1 support in some corner 
cases. Does that mean the L1 support should be disabled completely ?

  reply	other threads:[~2020-12-16 18:05 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-10-16 12:04 [PATCH V4] PCI: rcar: Add L1 link state fix into data abort hook marek.vasut
2020-10-17 14:03 ` Geert Uytterhoeven
2020-11-19 17:35 ` Lorenzo Pieralisi
2020-11-29 13:05   ` Marek Vasut
2020-12-08 10:18     ` Lorenzo Pieralisi
2020-12-08 17:45       ` Marek Vasut
2020-12-08 17:52         ` Geert Uytterhoeven
2020-12-08 16:40 ` Bjorn Helgaas
2020-12-08 18:05   ` Marek Vasut
2020-12-08 18:46     ` Bjorn Helgaas
2020-12-10 12:12       ` Lorenzo Pieralisi
2020-12-12 19:12         ` Marek Vasut
2020-12-14 17:13           ` Lorenzo Pieralisi
2020-12-16 17:52             ` Marek Vasut
2020-12-12 19:10       ` Marek Vasut
2020-12-14 20:38     ` Bjorn Helgaas
2020-12-16 17:56       ` Marek Vasut [this message]
2020-12-16 18:20         ` Bjorn Helgaas

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