From: Marc Zyngier <maz@kernel.org>
To: Mark Kettenis <mark.kettenis@xs4all.nl>
Cc: devicetree@vger.kernel.org, alyssa@rosenzweig.io,
Mark Kettenis <kettenis@openbsd.org>,
Thomas Gleixner <tglx@linutronix.de>,
Rob Herring <robh+dt@kernel.org>,
Hector Martin <marcan@marcan.st>,
Bjorn Helgaas <bhelgaas@google.com>,
Florian Fainelli <f.fainelli@gmail.com>,
bcm-kernel-feedback-list@broadcom.com,
Nicolas Saenz Julienne <nsaenz@kernel.org>,
Jim Quinlan <jim2101024@gmail.com>,
Daire McNamara <daire.mcnamara@microchip.com>,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org,
linux-rpi-kernel@lists.infradead.org
Subject: Re: [PATCH v4 0/4] Apple M1 PCIe DT bindings
Date: Tue, 21 Sep 2021 12:01:36 +0100 [thread overview]
Message-ID: <87ilyuur8v.wl-maz@kernel.org> (raw)
In-Reply-To: <20210827171534.62380-1-mark.kettenis@xs4all.nl>
On Fri, 27 Aug 2021 18:15:25 +0100,
Mark Kettenis <mark.kettenis@xs4all.nl> wrote:
>
> From: Mark Kettenis <kettenis@openbsd.org>
>
> This small series adds bindings for the PCIe controller found on the
> Apple M1 SoC.
>
> At this point, the primary consumer for these bindings is U-Boot.
> With these bindings U-Boot can bring up the links for the root ports
> of the PCIe root complex. A simple OS driver can then provide
> standard ECAM access and manage MSI interrupts to provide access
> to the built-in Ethernet and XHCI controllers of the Mac mini.
>
> The Apple controller incorporates Synopsys Designware PCIe logic
> to implement its root port. But unlike other hardware currently
> supported by U-Boot and the Linux kernel the Apple hardware
> integrates multiple root ports. As such the existing bindings
> for the DWC PCIe interface can't be used. There is a single ECAM
> space for all root space, but separate GPIOs to take the PCI devices
> on those ports out of reset. Therefore the standard "reset-gpio" and
> "max-link-speed" properties appear on the child nodes representing
> the PCI devices that correspond to the individual root ports.
>
> MSIs are handled by the PCIe controller and translated into "regular
> interrupts". A range of 32 MSIs is provided. These 32 MSIs can be
> distributed over the root ports as the OS sees fit by programming the
> PCIe controller port registers.
>
> This now adds an MSI controller binding schema and uses the generic
> msi-ranges property to specify how the MSIs are mapped to interrupts
> on the AIC. I copied some of the description text in the MSI
> controller binding schema from msi.txt but it may need some further
> tweaks to make sense.
>
> Patch 2/2 of this series depends on the pinctrl series I sent earlier
> and will probably go through Hector Martin's Apple M1 SoC tree.
>
>
> Changelog:
>
> v4: - Convert MSI controller binding to YAML
> - Add generic msi-ranges property to MSI controller binding
> - Fix typos/formatting in apple,pcie binding
> - Use generic MSI controller binding in apple,pcie
>
> v3: - Remove unneeded include in example
>
> v2: - Adjust name for ECAM in "reg-names"
> - Drop "phy" registers
> - Expand description
> - Add description for "interrupts"
> - Fix incorrect minItems for "interrupts"
> - Fix incorrect MaxItems for "reg-names"
> - Document the use of "msi-controller", "msi-parent", "iommu-map" and
> "iommu-map-mask"
> - Fix "bus-range" and "iommu-map" properties in the example
>
> Mark Kettenis (4):
> dt-bindings: interrupt-controller: Convert MSI controller to
> json-schema
> dt-bindings: interrupt-controller: msi: Add msi-ranges property
> dt-bindings: pci: Add DT bindings for apple,pcie
> arm64: apple: Add PCIe node
>
> .../interrupt-controller/msi-controller.yaml | 42 +++++
> .../devicetree/bindings/pci/apple,pcie.yaml | 165 ++++++++++++++++++
> .../bindings/pci/brcm,stb-pcie.yaml | 1 +
> .../bindings/pci/microchip,pcie-host.yaml | 1 +
> MAINTAINERS | 1 +
> arch/arm64/boot/dts/apple/t8103.dtsi | 63 +++++++
> 6 files changed, 273 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/interrupt-controller/msi-controller.yaml
> create mode 100644 Documentation/devicetree/bindings/pci/apple,pcie.yaml
With Rob's comments addressed, and the fix on the M1 RC MMIO region,
for the whole series:
Acked-by: Marc Zyngier <maz@kernel.org>
M.
--
Without deviation from the norm, progress is not possible.
prev parent reply other threads:[~2021-09-21 11:01 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-27 17:15 [PATCH v4 0/4] Apple M1 PCIe DT bindings Mark Kettenis
2021-08-27 17:15 ` [PATCH v4 1/4] dt-bindings: interrupt-controller: Convert MSI controller to json-schema Mark Kettenis
2021-08-27 19:15 ` Mark Kettenis
2021-08-31 21:04 ` Rob Herring
2021-08-31 20:57 ` Rob Herring
2021-09-01 10:56 ` Mark Kettenis
2021-08-31 20:58 ` Rob Herring
2021-08-27 17:15 ` [PATCH v4 2/4] dt-bindings: interrupt-controller: msi: Add msi-ranges property Mark Kettenis
2021-08-31 21:16 ` Rob Herring
2021-09-21 17:52 ` Mark Kettenis
2021-08-27 17:15 ` [PATCH v4 3/4] dt-bindings: pci: Add DT bindings for apple,pcie Mark Kettenis
2021-08-27 17:58 ` Alyssa Rosenzweig
2021-08-27 18:22 ` Mark Kettenis
2021-08-31 21:21 ` Rob Herring
2021-09-01 11:29 ` Mark Kettenis
2021-09-12 20:13 ` Marc Zyngier
2021-09-13 20:55 ` Rob Herring
2021-08-27 17:15 ` [PATCH v4 4/4] arm64: apple: Add PCIe node Mark Kettenis
2021-08-27 17:59 ` Alyssa Rosenzweig
2021-08-27 18:24 ` Mark Kettenis
2021-08-27 20:09 ` Alyssa Rosenzweig
2021-08-30 11:37 ` Marc Zyngier
2021-08-30 14:57 ` Mark Kettenis
2021-08-30 20:40 ` Marc Zyngier
2021-08-30 15:57 ` Rob Herring
2021-08-30 20:20 ` Marc Zyngier
2021-09-12 21:30 ` Marc Zyngier
2021-09-13 18:35 ` Mark Kettenis
2021-09-21 11:01 ` Marc Zyngier [this message]
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