linux-pci.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Stanimir Varbanov <svarbanov@mm-sol.com>
To: ansuelsmth@gmail.com, 'Andy Gross' <agross@kernel.org>
Cc: 'Sham Muthayyan' <smuthayy@codeaurora.org>,
	'Bjorn Andersson' <bjorn.andersson@linaro.org>,
	'Bjorn Helgaas' <bhelgaas@google.com>,
	'Rob Herring' <robh+dt@kernel.org>,
	'Mark Rutland' <mark.rutland@arm.com>,
	'Lorenzo Pieralisi' <lorenzo.pieralisi@arm.com>,
	'Andrew Murray' <amurray@thegoodpenguin.co.uk>,
	'Philipp Zabel' <p.zabel@pengutronix.de>,
	linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: R: R: [PATCH v2 01/10] PCIe: qcom: add missing ipq806x clocks in PCIe driver
Date: Wed, 8 Apr 2020 16:06:24 +0300	[thread overview]
Message-ID: <98b7eba1-4ab4-8d39-655f-01d31ca12406@mm-sol.com> (raw)
In-Reply-To: <000401d60da5$0669a4c0$133cee40$@gmail.com>



On 4/8/20 3:55 PM, ansuelsmth@gmail.com wrote:
>> in PCIe driver
>>
>> Hi Ansuel,
>>
>> On 4/8/20 3:36 PM, ansuelsmth@gmail.com wrote:
>>>> PCIe driver
>>>>
>>>> Ansuel,
>>>>
>>>> On 4/2/20 3:11 PM, Ansuel Smith wrote:
>>>>> Aux and Ref clk are missing in pcie qcom driver.
>>>>> Add support in the driver to fix pcie inizialization in ipq806x.
>>>>>
>>>>> Fixes: 82a82383 PCI: qcom: Add Qualcomm PCIe controller driver
>>>>
>>>> this should be:
>>>>
>>>> Fixes: 82a823833f4e PCI: qcom: Add Qualcomm PCIe controller driver
>>>>
>>>> and add:
>>>>
>>>> Cc: stable@vger.kernel.org # v4.5+
>>>>
>>>> But, I wonder, as apq8064 shares the same ops_2_1_0 how it worked
>> until
>>>> now. Something more I cannot find such clocks for apq8064, which
>> means
>>>> that this patch will break it.
>>>>
>>>> One option is to use those new clocks only for ipq806x.
>>>>
>>>
>>> How to add this new clocks only for ipq806x? Check the compatible and
>> add
>>> them accordingly?
>>>
>>
>> Yes, through of_device_is_compatible(). See how we done this in
>> qcom_pcie_get_resources_2_4_0.
>>
>> I thought about second option though - encoder what clocks we have for
>> any SoC but if you take into that direction you have to change the whole
>> driver :)
>>
>> Another option is to use clk_get_optional() for the clocks which you
>> have on ipq806x (and don't have on apq8064). Please research this one
>> first.
>>
>> --
>> regards,
>> Stan
> 
> Ok I will use get optional for the extra clocks. Should I add a warning if they 
> are not present? Also what about the extra reset? Should I follow the same
> approach? 
> Thx for the suggestions. 
> 

No warnings please. You should follow the same rules for resets.

-- 
regards,
Stan

  reply	other threads:[~2020-04-08 13:06 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-04-02 12:11 [PATCH v2 00/10] Multiple fixes in PCIe qcom driver Ansuel Smith
2020-04-02 12:11 ` [PATCH v2 01/10] PCIe: qcom: add missing ipq806x clocks in PCIe driver Ansuel Smith
2020-04-08  8:50   ` Stanimir Varbanov
2020-04-08 12:36     ` R: " ansuelsmth
2020-04-08 12:48       ` Stanimir Varbanov
2020-04-08 12:55         ` R: " ansuelsmth
2020-04-08 13:06           ` Stanimir Varbanov [this message]
2020-04-02 12:11 ` [PATCH v2 02/10] devicetree: bindings: pci: add missing clks to qcom,pcie Ansuel Smith
2020-04-02 12:11 ` [PATCH v2 03/10] PCIe: qcom: change duplicate PCI reset to phy reset Ansuel Smith
2020-04-02 12:11 ` [PATCH v2 04/10] PCIe: qcom: Fixed pcie_phy_clk branch issue Ansuel Smith
2020-04-02 12:11 ` [PATCH v2 05/10] PCIe: qcom: add missing reset for ipq806x Ansuel Smith
2020-04-02 12:11 ` [PATCH v2 06/10] devicetree: bindings: pci: add ext reset to qcom,pcie Ansuel Smith
2020-04-02 12:11 ` [PATCH v2 07/10] PCIe: qcom: fix init problem with missing PARF programming Ansuel Smith
2020-04-08  8:50   ` Stanimir Varbanov
2020-04-08 12:38     ` R: " ansuelsmth
2020-04-08 13:18       ` Stanimir Varbanov
2020-04-02 12:11 ` [PATCH v2 08/10] PCIe: qcom: add ipq8064 rev2 variant and set tx term offset Ansuel Smith
2020-04-02 12:11 ` [PATCH v2 09/10] devicetree: bindings: pci: add ipq8064 rev 2 variant to qcom,pcie Ansuel Smith
2020-04-14 17:07   ` Rob Herring
2020-04-02 12:11 ` [PATCH v2 10/10] PCIe: qcom: add Force GEN1 support Ansuel Smith
2020-04-03  9:01   ` Stanimir Varbanov
2020-04-14 17:09     ` Rob Herring
2020-04-03  9:01 ` [PATCH v2 00/10] Multiple fixes in PCIe qcom driver Stanimir Varbanov

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=98b7eba1-4ab4-8d39-655f-01d31ca12406@mm-sol.com \
    --to=svarbanov@mm-sol.com \
    --cc=agross@kernel.org \
    --cc=amurray@thegoodpenguin.co.uk \
    --cc=ansuelsmth@gmail.com \
    --cc=bhelgaas@google.com \
    --cc=bjorn.andersson@linaro.org \
    --cc=devicetree@vger.kernel.org \
    --cc=linux-arm-msm@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-pci@vger.kernel.org \
    --cc=lorenzo.pieralisi@arm.com \
    --cc=mark.rutland@arm.com \
    --cc=p.zabel@pengutronix.de \
    --cc=robh+dt@kernel.org \
    --cc=smuthayy@codeaurora.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).